[all-commits] [llvm/llvm-project] c8ea11: AMDGPU: Introduce a pass to replace VGPR MFMAs wit...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c8ea114741cecf9c812b5e90eaa28919328df650
      https://github.com/llvm/llvm-project/commit/c8ea114741cecf9c812b5e90eaa28919328df650
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-06-27 (Fri, 27 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    A llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
    M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
    M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn

  Log Message:
  -----------
  AMDGPU: Introduce a pass to replace VGPR MFMAs with AGPR (#145024)

In gfx90a-gfx950, it's possible to emit MFMAs which use AGPRs or VGPRs
for vdst and src2. We do not want to do use the AGPR form, unless
required by register pressure as it requires cross bank register
copies from most other instructions. Currently we select the AGPR
or VGPR version depending on a crude heuristic for whether it's possible
AGPRs will be required. We really need the register allocation to
be complete to make a good decision, which is what this pass is for.
    
This adds the pass, but does not yet remove the selection patterns
for AGPRs. This is a WIP, and NFC-ish. It should be a no-op on any
currently selected code. It also does not yet trigger on the real
examples of interest, which require handling batches of MFMAs at
once.



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