[all-commits] [llvm/llvm-project] 5b025c: AMDGPU: Introduce a pass to replace VGPR MFMAs wit...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu-add-pass-rewrite-vgpr-mfma-to-agpr
  Home:   https://github.com/llvm/llvm-project
  Commit: 5b025cccf0df21c6c5e3dbac2685dcae2ca32fab
      https://github.com/llvm/llvm-project/commit/5b025cccf0df21c6c5e3dbac2685dcae2ca32fab
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-06-27 (Fri, 27 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    A llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
    M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
    M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn

  Log Message:
  -----------
  AMDGPU: Introduce a pass to replace VGPR MFMAs with AGPR

In gfx90a-gfx950, it's possible to emit MFMAs which use AGPRs or VGPRs
for vdst and src2. We do not want to do use the AGPR form, unless
required by register pressure as it requires cross bank register
copies from most other instructions. Currently we select the AGPR
or VGPR version depending on a crude heuristic for whether it's possible
AGPRs will be required. We really need the register allocation to
be complete to make a good decision, which is what this pass is for.

This adds the pass, but does not yet remove the selection patterns
for AGPRs. This is a WIP, and NFC-ish. It should be a no-op on any
currently selected code. It also does not yet trigger on the real
examples of interest, which require handling batches of MFMAs at
once.


  Commit: 1947b6f37f31f2a4a09939f350dbfee8f6dfcb32
      https://github.com/llvm/llvm-project/commit/1947b6f37f31f2a4a09939f350dbfee8f6dfcb32
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-06-27 (Fri, 27 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp

  Log Message:
  -----------
  Fix copy from physreg


Compare: https://github.com/llvm/llvm-project/compare/eb4ea2b964c2...1947b6f37f31

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