[all-commits] [llvm/llvm-project] 063cee: [AMDGPU][MC] Allow opsel for v_max_i16 etc in GFX1...

[Jun Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 063cee7bdeefa8696845ec1006d3baaf1e6d251a
      https://github.com/llvm/llvm-project/commit/063cee7bdeefa8696845ec1006d3baaf1e6d251a
  Author: Jun Wang <jwang86 at yahoo.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
    M llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt

  Log Message:
  -----------
  [AMDGPU][MC] Allow opsel for v_max_i16 etc in GFX10 (#143982)

In GFX10, a number of VOP3 instructions should allow opsel, including
V_MAX_I16, V_MAX_U16, V_MIN_I16, V_MIN_U16, V_MUL_LO_U16, V_LSHLREV_B16,
V_LSHRREV_B16, and V_ASHRREV_I16.



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