[all-commits] [llvm/llvm-project] 928a7e: [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR1...

[Tomer Shafir via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 928a7e6cb9333480f6eb883f93ca6560a696b0fc
      https://github.com/llvm/llvm-project/commit/928a7e6cb9333480f6eb883f93ca6560a696b0fc
  Author: Tomer Shafir <tomer.shafir8 at gmail.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64Features.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64Processors.td
    A llvm/test/CodeGen/AArch64/arm64-zero-cycle-regmov-fpr.ll

  Log Message:
  -----------
  [AArch64] Use 0-cycle reg2reg MOVs for FPR32, FPR16, FPR8 (#144152)

This change emits optimized copy instructions for FPR32, FPR16, FPR8
register classes on targets that support it. The implementation is
similar to what has been done for GPR32. It adds 2 regression tests for
FPR32 and FPR16.

Depends on: https://github.com/llvm/llvm-project/pull/143680 to resolve
the test structure.



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