[all-commits] [llvm/llvm-project] f8fbb5: [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns

[Fabian Ritter via All-commits]

  Branch: refs/heads/users/ritter-x2a/06-12-_amdgpu_sdag_handle_isd_ptradd_in_vop3_patterns
  Home:   https://github.com/llvm/llvm-project
  Commit: f8fbb5733c03f68f8ff12401e0ff3468bf392027
      https://github.com/llvm/llvm-project/commit/f8fbb5733c03f68f8ff12401e0ff3468bf392027
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
    M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll

  Log Message:
  -----------
  [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns

This patch mirrors similar patterns for ISD::ADD. The main difference is
that ISD::ADD is commutative, so that a pattern definition for, e.g.,
(add (mul x, y), z), automatically also handles (add z, (mul x, y)).
ISD::PTRADD is not commutative, so we would need to handle these cases
explicitly. This patch only implements (ptradd z, (op x, y)) patterns,
where the nested operation (shift or multiply) is the offset of the
ptradd (i.e., the right operand), since base pointers that are the
result of a shift or multiply seem less likely.

For SWDEV-516125.



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