[all-commits] [llvm/llvm-project] a28fb2: [AMDGPU][SDAG] Add ISD::PTRADD DAG combines

[Fabian Ritter via All-commits]

  Branch: refs/heads/users/ritter-x2a/06-04-_amdgpu_sdag_add_isd_ptradd_dag_combines
  Home:   https://github.com/llvm/llvm-project
  Commit: a28fb2fb8443e54660de9b5e41c63a41acd9bcd6
      https://github.com/llvm/llvm-project/commit/a28fb2fb8443e54660de9b5e41c63a41acd9bcd6
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll

  Log Message:
  -----------
  [AMDGPU][SDAG] Add ISD::PTRADD DAG combines

This patch focuses on generic DAG combines, plus an AMDGPU-target-specific one
that is closely connected.

The generic DAG combine is based on a part of PR #105669 by @rgwott, which was
adapted from work by @jrtc27, @arichardson, @davidchisnall in the CHERI/Morello
LLVM tree. I added some parts and removed several disjuncts from the
reassociation condition:
- `isNullConstant(X)`, since there are address spaces where 0 is a perfectly
  normal value that shouldn't be treated specially,
- `(YIsConstant && ZOneUse)` and `(N0OneUse && ZOneUse && !ZIsConstant)`, since
  they cause regressions in AMDGPU.

For SWDEV-516125.


  Commit: 704dd1c53e95d60fa862d6de7a9b4171e42775f6
      https://github.com/llvm/llvm-project/commit/704dd1c53e95d60fa862d6de7a9b4171e42775f6
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  Remove undef/poison operand handling from the PTRADD dag combine

Those are folded earlier already.


  Commit: b5d5466a8eef4df16201dab8b1a64a5f456d283e
      https://github.com/llvm/llvm-project/commit/b5d5466a8eef4df16201dab8b1a64a5f456d283e
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  Log Message:
  -----------
  Bail out early in the generic combine to reduce identation, add a comment referring to the target-specific reassociation there, and remove a currently unused variable in the target-specific combine.


  Commit: 654c3708f9b0af3fae37f34c25a3c201c19461f4
      https://github.com/llvm/llvm-project/commit/654c3708f9b0af3fae37f34c25a3c201c19461f4
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  Add an explicit PtrVT == IntVT to the (ptradd 0, x) -> x fold


  Commit: bb8a8d70e52eeb34ca7436f3bc052911eb415230
      https://github.com/llvm/llvm-project/commit/bb8a8d70e52eeb34ca7436f3bc052911eb415230
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    A llvm/test/CodeGen/AMDGPU/ptradd-sdag-undef-poison.ll

  Log Message:
  -----------
  Add a test for poison/undef folds.


  Commit: 49fb4c4fd3b334f060401e42ecde2bc80f2f2282
      https://github.com/llvm/llvm-project/commit/49fb4c4fd3b334f060401e42ecde2bc80f2f2282
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  Log Message:
  -----------
  Implement reviewer suggestions


  Commit: 61ad2a3980eaf5539719ac9340f3d64548a3f620
      https://github.com/llvm/llvm-project/commit/61ad2a3980eaf5539719ac9340f3d64548a3f620
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/test/CodeGen/AArch64/cpa-selectiondag.ll

  Log Message:
  -----------
  Update new AArch64/cpa-selectiondag.ll test


Compare: https://github.com/llvm/llvm-project/compare/2c35c976368c...61ad2a3980ea

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