[all-commits] [llvm/llvm-project] 7ddf84: [AMDGPU][SDAG] Add ISD::PTRADD DAG combines

[Fabian Ritter via All-commits]

  Branch: refs/heads/users/ritter-x2a/06-04-_amdgpu_sdag_add_isd_ptradd_dag_combines
  Home:   https://github.com/llvm/llvm-project
  Commit: 7ddf844514121fb43f7d252c6e1ac4b48fdd2812
      https://github.com/llvm/llvm-project/commit/7ddf844514121fb43f7d252c6e1ac4b48fdd2812
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll

  Log Message:
  -----------
  [AMDGPU][SDAG] Add ISD::PTRADD DAG combines

This patch focuses on generic DAG combines, plus an AMDGPU-target-specific one
that is closely connected.

The generic DAG combine is based on a part of PR #105669 by @rgwott, which was
adapted from work by @jrtc27, @arichardson, @davidchisnall in the CHERI/Morello
LLVM tree. I added some parts and removed several disjuncts from the
reassociation condition:
- `isNullConstant(X)`, since there are address spaces where 0 is a perfectly
  normal value that shouldn't be treated specially,
- `(YIsConstant && ZOneUse)` and `(N0OneUse && ZOneUse && !ZIsConstant)`, since
  they cause regressions in AMDGPU.

For SWDEV-516125.


  Commit: 558ba7d33ad280a7378e466f87aed688184de491
      https://github.com/llvm/llvm-project/commit/558ba7d33ad280a7378e466f87aed688184de491
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  Remove undef/poison operand handling from the PTRADD dag combine

Those are folded earlier already.


  Commit: 8afb2ac2f6e6b7cba51cae4e6d785e0703605398
      https://github.com/llvm/llvm-project/commit/8afb2ac2f6e6b7cba51cae4e6d785e0703605398
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  Log Message:
  -----------
  Bail out early in the generic combine to reduce identation, add a comment referring to the target-specific reassociation there, and remove a currently unused variable in the target-specific combine.


  Commit: 51eed4dfeab66a4c366542de747282baaa5e6386
      https://github.com/llvm/llvm-project/commit/51eed4dfeab66a4c366542de747282baaa5e6386
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  Add an explicit PtrVT == IntVT to the (ptradd 0, x) -> x fold


  Commit: f018563dc2880acad17508c453aae78e8be06def
      https://github.com/llvm/llvm-project/commit/f018563dc2880acad17508c453aae78e8be06def
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    A llvm/test/CodeGen/AMDGPU/ptradd-sdag-undef-poison.ll

  Log Message:
  -----------
  Add a test for poison/undef folds.


  Commit: 26c5d701602a502b4e1a1de5a22421fb7340ae92
      https://github.com/llvm/llvm-project/commit/26c5d701602a502b4e1a1de5a22421fb7340ae92
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  Log Message:
  -----------
  Implement reviewer suggestions


  Commit: 2c35c976368cc99aa9b059d9dd564883400b841b
      https://github.com/llvm/llvm-project/commit/2c35c976368cc99aa9b059d9dd564883400b841b
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-26 (Thu, 26 Jun 2025)

  Changed paths:
    M llvm/test/CodeGen/AArch64/cpa-selectiondag.ll

  Log Message:
  -----------
  Update new AArch64/cpa-selectiondag.ll test


Compare: https://github.com/llvm/llvm-project/compare/1a1da8f5960e...2c35c976368c

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