[all-commits] [llvm/llvm-project] c82432: [RISCV] Remove separate immediate condition codes ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c8243251cb25f3c171df16ff24ecbb39fbf68d4c
      https://github.com/llvm/llvm-project/commit/c8243251cb25f3c171df16ff24ecbb39fbf68d4c
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-06-25 (Wed, 25 Jun 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/lib/Target/RISCV/RISCVLateBranchOpt.cpp
    M llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp

  Log Message:
  -----------
  [RISCV] Remove separate immediate condition codes from RISCVCC. NFC (#145762)

This wasn't scalable and made the RISCVCC enum effectively just
a different way of spelling the branch opcodes.
    
This patch reduces RISCVCC back down to 6 enum values. The primary user
is select pseudoinstructions which now share the same encoding across
all
vendor extensions. The select opcode and condition code are used to
determine the branch opcode when expanding the pseudo.
    
The Cond SmallVector returned by analyzeBranch now returns the opcode
instead of the RISCVCC. reverseBranchCondition now works directly on
opcodes. getOppositeBranchCondition is also retained.

Stacked on #145622



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