[all-commits] [llvm/llvm-project] fcae83: [fixup] Skip the two-stage LLVM IR generation, map...

[Momchil Velikov via All-commits]

  Branch: refs/heads/users/momchil-velikov/bfmmla-sve
  Home:   https://github.com/llvm/llvm-project
  Commit: fcae83d1364a35585b98e950e473b1ee1c6c0583
      https://github.com/llvm/llvm-project/commit/fcae83d1364a35585b98e950e473b1ee1c6c0583
  Author: Momchil Velikov <momchil.velikov at arm.com>
  Date:   2025-06-25 (Wed, 25 Jun 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
    M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
    M mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
    M mlir/test/Dialect/ArmSVE/roundtrip.mlir

  Log Message:
  -----------
  [fixup] Skip the two-stage LLVM IR generation, map the op directly to the LLVM IR intrinsic



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