[all-commits] [llvm/llvm-project] f2a5cd: [AMDGPU][SDAG] Add ISD::PTRADD DAG combines

[Fabian Ritter via All-commits]

  Branch: refs/heads/users/ritter-x2a/06-04-_amdgpu_sdag_add_isd_ptradd_dag_combines
  Home:   https://github.com/llvm/llvm-project
  Commit: f2a5cd0593df32394e2fa9f5b98bf745b492fd1b
      https://github.com/llvm/llvm-project/commit/f2a5cd0593df32394e2fa9f5b98bf745b492fd1b
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-24 (Tue, 24 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll

  Log Message:
  -----------
  [AMDGPU][SDAG] Add ISD::PTRADD DAG combines

This patch focuses on generic DAG combines, plus an AMDGPU-target-specific one
that is closely connected.

The generic DAG combine is based on a part of PR #105669 by @rgwott, which was
adapted from work by @jrtc27, @arichardson, @davidchisnall in the CHERI/Morello
LLVM tree. I added some parts and removed several disjuncts from the
reassociation condition:
- `isNullConstant(X)`, since there are address spaces where 0 is a perfectly
  normal value that shouldn't be treated specially,
- `(YIsConstant && ZOneUse)` and `(N0OneUse && ZOneUse && !ZIsConstant)`, since
  they cause regressions in AMDGPU.

For SWDEV-516125.


  Commit: 4bc9ba53c940daf1d2576985b0beb5703086e3d3
      https://github.com/llvm/llvm-project/commit/4bc9ba53c940daf1d2576985b0beb5703086e3d3
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-24 (Tue, 24 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  Remove undef/poison operand handling from the PTRADD dag combine

Those are folded earlier already.


  Commit: d587af3ac406d87de377202ad577b051adf5481c
      https://github.com/llvm/llvm-project/commit/d587af3ac406d87de377202ad577b051adf5481c
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-24 (Tue, 24 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  Log Message:
  -----------
  Bail out early in the generic combine to reduce identation, add a comment referring to the target-specific reassociation there, and remove a currently unused variable in the target-specific combine.


  Commit: 5bf47c81d85111b053d3b2369d4e2f8d19cb827c
      https://github.com/llvm/llvm-project/commit/5bf47c81d85111b053d3b2369d4e2f8d19cb827c
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-24 (Tue, 24 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  Add an explicit PtrVT == IntVT to the (ptradd 0, x) -> x fold


  Commit: ecf87d1a6e48596f10a40f2858c5c0a90558efa9
      https://github.com/llvm/llvm-project/commit/ecf87d1a6e48596f10a40f2858c5c0a90558efa9
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-24 (Tue, 24 Jun 2025)

  Changed paths:
    A llvm/test/CodeGen/AMDGPU/ptradd-sdag-undef-poison.ll

  Log Message:
  -----------
  Add a test for poison/undef folds.


  Commit: b546212a80c470b7286725cceedd8bd5f54b364c
      https://github.com/llvm/llvm-project/commit/b546212a80c470b7286725cceedd8bd5f54b364c
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-24 (Tue, 24 Jun 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  Log Message:
  -----------
  Implement reviewer suggestions


  Commit: 506c77e57f27afb90b5634a05d885d823003ac1d
      https://github.com/llvm/llvm-project/commit/506c77e57f27afb90b5634a05d885d823003ac1d
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-06-24 (Tue, 24 Jun 2025)

  Changed paths:
    M llvm/test/CodeGen/AArch64/cpa-selectiondag.ll

  Log Message:
  -----------
  Update new AArch64/cpa-selectiondag.ll test


Compare: https://github.com/llvm/llvm-project/compare/00afb5a69752...506c77e57f27

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