[all-commits] [llvm/llvm-project] 43ae00: [RISCV] Make All VType Parts Optional (#144971)

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 43ae009a9b3165fdf1db415e081cd9ed6ad20245
      https://github.com/llvm/llvm-project/commit/43ae009a9b3165fdf1db415e081cd9ed6ad20245
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2025-06-23 (Mon, 23 Jun 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    M llvm/test/MC/RISCV/rvv/invalid.s
    M llvm/test/MC/RISCV/rvv/vsetvl.s

  Log Message:
  -----------
  [RISCV] Make All VType Parts Optional (#144971)

This matches the current binutils behaviour, and the orignal ratified
spec that states that LMUL=1 when the lmul operand is omitted. A variety
of previously invalid vtype instructions are now accepted by the
assembler.

To match binutils, at least one of the vtype operands must be provided.

Also fixes the MCOperandPredicate definition in VTypeIOp, which had one
logic issue and one syntax issue. This is not used by the MC layer
currently, so this change should not affect the existing implementation.

Fixes #143744



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