[all-commits] [llvm/llvm-project] 95c6c1: [X86] combineConcatVectorOps - only always concat ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 95c6c11c747dee61133cff56f1a7ea7445c7ae79
      https://github.com/llvm/llvm-project/commit/95c6c11c747dee61133cff56f1a7ea7445c7ae79
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-06-20 (Fri, 20 Jun 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-fshl-256.ll
    M llvm/test/CodeGen/X86/vector-fshr-256.ll

  Log Message:
  -----------
  [X86] combineConcatVectorOps - only always concat logic ops on AVX512 targets (#145036)

We should only concat logic ops if at least one operand will freely
concatenate. We've now addressed the remaining regressions on AVX2
targets, but still have a number on AVX512 targets which can
aggressively use VPTERNLOG in many cases.



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