[all-commits] [llvm/llvm-project] dfb5ca: [SPARC][IAS] Properly set implied feature sets for...
Koakuma via All-commits
all-commits at lists.llvm.org
Thu Jun 19 15:13:12 PDT 2025
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: dfb5cadf5e816e542e46d3f0551b6a148a93ce3d
https://github.com/llvm/llvm-project/commit/dfb5cadf5e816e542e46d3f0551b6a148a93ce3d
Author: Koakuma <koachan at protonmail.com>
Date: 2025-06-20 (Fri, 20 Jun 2025)
Changed paths:
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/test/CodeGen/SPARC/ctlz.ll
M llvm/test/CodeGen/SPARC/cttz.ll
M llvm/test/CodeGen/SPARC/inlineasm-v9.ll
M llvm/test/CodeGen/SPARC/inlineasm.ll
M llvm/test/MC/Sparc/Relocations/relocation-specifier.s
M llvm/test/MC/Sparc/sparcv9-instructions.s
Log Message:
-----------
[SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232)
Some SPARC ISA levels and/or extensions are defined in a way such that
the availability of it implies the availability of other, more fundamental
ISA features (for example, targeting 64-bit environment implies that
V9 instructions are available).
Properly set those in the TableGen definitions.
Fixes https://github.com/llvm/llvm-project/issues/142388.
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