[all-commits] [llvm/llvm-project] 7c5c8e: [MLIR][AArch64] Simplify LowerContractionToSVEI8MM...
Momchil Velikov via All-commits
all-commits at lists.llvm.org
Thu Jun 19 08:12:41 PDT 2025
Branch: refs/heads/users/momchil-velikov/sve-i8mm-get-ext-operand-refactor
Home: https://github.com/llvm/llvm-project
Commit: 7c5c8eecfcce07d5552efc2d5b00f0e468ff7e8b
https://github.com/llvm/llvm-project/commit/7c5c8eecfcce07d5552efc2d5b00f0e468ff7e8b
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-06-19 (Thu, 19 Jun 2025)
Changed paths:
M mlir/lib/Dialect/ArmSVE/Transforms/LowerContractionToSVEI8MMPattern.cpp
Log Message:
-----------
[MLIR][AArch64] Simplify LowerContractionToSVEI8MMPattern.cpp:getExtOperand (NFC)
Just recently learned about `isSignlessInteger`, use that instead
of comparing to types obtained via `rewriter.getI<N>Type()`.
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