[all-commits] [llvm/llvm-project] faf929: [RISCV] Fix a bug where AVL is the last MI in MBB....

[MingYan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: faf9295f4e3a23a972d29e2be85052beef409d08
      https://github.com/llvm/llvm-project/commit/faf9295f4e3a23a972d29e2be85052beef409d08
  Author: MingYan <99472920+NexMing at users.noreply.github.com>
  Date:   2025-06-19 (Thu, 19 Jun 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir

  Log Message:
  -----------
  [RISCV] Fix a bug where AVL is the last MI in MBB. (#144668)

When `AVL` is the last MI, `std::next(II)` equals `MBB.end()`, and
calling `II->getParent()` at that point will cause an error.

---------

Co-authored-by: yanming <ming.yan at terapines.com>



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications