[all-commits] [llvm/llvm-project] b5aaf9: [InstCombine] Implement vp.reverse reordering/elim...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b5aaf9d988ff2dc652c86271b181bf0497eb97cb
      https://github.com/llvm/llvm-project/commit/b5aaf9d988ff2dc652c86271b181bf0497eb97cb
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-06-18 (Wed, 18 Jun 2025)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
    M llvm/test/Transforms/InstCombine/vp-reverse.ll

  Log Message:
  -----------
  [InstCombine] Implement vp.reverse reordering/elimination through binop/unop (#143963)

This simply copies the structure of the vector.reverse patterns from
just above, and reimplements them for the vp.reverse intrinsics when the
mask is all ones and the EVLs exactly match.

Its unfortunate that we have three different ways to represent a reverse
(shuffle, vector.reverse, and vp.reverse) but I don't see an obvious way
to remove any them because the semantics are slightly different.

This significantly improves vectorization in TSVC_2's s112 and s1112
loops when using EVL tail folding.



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