[all-commits] [llvm/llvm-project] 147a4c: [rtsan] Fix issue where close test would lead to c...
Amir Ayupov via All-commits
all-commits at lists.llvm.org
Mon Jun 16 23:56:39 PDT 2025
Branch: refs/heads/users/aaupov/spr/bolt-explicitly-check-for-returns-when-extending-call-continuation-profile
Home: https://github.com/llvm/llvm-project
Commit: 147a4c7743c44af3537bae69dcf513153b03b00e
https://github.com/llvm/llvm-project/commit/147a4c7743c44af3537bae69dcf513153b03b00e
Author: Chris Apple <cja-private at pm.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Fix issue where close test would lead to crash (#144017)
Commit: b983431c281a0acb9e446c7c9d72474f4d09e8e0
https://github.com/llvm/llvm-project/commit/b983431c281a0acb9e446c7c9d72474f4d09e8e0
Author: Chris Apple <cja-private at pm.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M compiler-rt/test/rtsan/fork_exec.cpp
Log Message:
-----------
[rtsan] Fix issue when intercepted function was not execve in test (#144018)
Commit: 567647888ea3dd292827bbac445d316d6a6b0ecb
https://github.com/llvm/llvm-project/commit/567647888ea3dd292827bbac445d316d6a6b0ecb
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/cxx17.cpp
Log Message:
-----------
[clang][bytecode] Avoid revisiting decomposition decl in visitDeclRef (#144226)
This simple patch removes the code to revisit `DecompositionDecl` in
`visitDeclRef`. The revisit will try to emit the initializer of the
`DecompositionDecl`, which could result in evaluation errors if the
`DecompositionDecl` is not within a constexpr context.
Commit: 886174a835208ecd2d06b378d2094b10611030d5
https://github.com/llvm/llvm-project/commit/886174a835208ecd2d06b378d2094b10611030d5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
Log Message:
-----------
[X86] shuffle-blend.ll - regenerate test checks
Commit: 2669664605d00e1b3a9c479545b95a6844786d0c
https://github.com/llvm/llvm-project/commit/2669664605d00e1b3a9c479545b95a6844786d0c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang-tools-extra/modularize/Modularize.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
Log Message:
-----------
[modularize] Use range-based for loops (NFC) (#144244)
Commit: fef5df9d843745b2c4ed163911ed1305028350ca
https://github.com/llvm/llvm-project/commit/fef5df9d843745b2c4ed163911ed1305028350ca
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[TableGen] Use range-based for loops (NFC) (#144250)
Commit: d78eec864c60729685487c884724f27edd53b3b8
https://github.com/llvm/llvm-project/commit/d78eec864c60729685487c884724f27edd53b3b8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/SyntheticSections.cpp
M lld/MachO/SyntheticSections.cpp
M lld/wasm/Driver.cpp
Log Message:
-----------
[lld] Use range-based for loops (NFC) (#144251)
Commit: 8f5c338b89a22abc3191a0d931071c09630d6195
https://github.com/llvm/llvm-project/commit/8f5c338b89a22abc3191a0d931071c09630d6195
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[Sema] Use a range-based for loop (NFC) (#144252)
Note that LLVM Coding Standards discourages for_each.
Commit: b16d43a874748a496da5cd774dd864c95b78d6b0
https://github.com/llvm/llvm-project/commit/b16d43a874748a496da5cd774dd864c95b78d6b0
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
Log Message:
-----------
VE: Rename VEMCExpr::VK_ to VE::S_
Prepare for removing VEMCExpr. Adopt the newer naming convention adopted
by AMDGPU/WebAssembly.
Commit: df54a2d9357fe7f56ca3c6fa2f07889449b50325
https://github.com/llvm/llvm-project/commit/df54a2d9357fe7f56ca3c6fa2f07889449b50325
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Only skip induction phis in planContainsAdditionalSimps (NFC).
Skip induction phis when checking for simplifications, as they may not
be lowered directly be lowered to a corresponding PHI recipe. Reductions
and first-order recurrences will get lowered to phi recipes, unless they
are removed. Considering them for simplifications allows removing them
if there are no remaining users.
NFC as currently reduction and recurrence phis are not
simplified/removed if dead.
Commit: 254a92d49a4c1e1f7f747b1c2f1ccbfd7f217880
https://github.com/llvm/llvm-project/commit/254a92d49a4c1e1f7f747b1c2f1ccbfd7f217880
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcTargetObjectFile.cpp
Log Message:
-----------
MC: Add MCSpecifierExpr::create
as a target-agnostic implementation to replace target-specific
XXXMCExpr::create.
Commit: 72de33a406383cb8555234c40e7b31db593e164f
https://github.com/llvm/llvm-project/commit/72de33a406383cb8555234c40e7b31db593e164f
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEMCInstLower.cpp
Log Message:
-----------
MC: Add MCAsmInfo::evaluateAsRelocatableImpl and replace VEMCExpr with MCSpecifierExpr
Expressions with specifier can only be folded during relocation
generatin. At parse time the `MCAssembler *` argument might be null, and
targets should not rely on the evaluateAsRelocatable result.
Therefore, we can move evaluateAsRelocatableImpl from MCSpecifierExpr to
MCAsmInfo, so that targets do not need to inherit from MCSpecifierExpr.
Commit: 490d7bb89a029edd037ed5e46747d0085a649ee8
https://github.com/llvm/llvm-project/commit/490d7bb89a029edd037ed5e46747d0085a649ee8
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
Log Message:
-----------
Xtensa: Remove unneeded XtensaMCExpr::create calls
MCSpecifierExpr and its subclasses should only be used with the
relocation specifier is not zero.
Commit: cf9665dd2bcef3ff2f3e22d3f44e8603f4ba9577
https://github.com/llvm/llvm-project/commit/cf9665dd2bcef3ff2f3e22d3f44e8603f4ba9577
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
R llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
Log Message:
-----------
Xtensa: Migrate to newer relocation specifier representation
* Rename specifier constants from XtensaMCExpr::Specifier::VK_ to
Xtensa::S_, following Sparc and VE.
* Use MCAsmInfo::printSpecifierExpr instead of MCExpr::print.
* Remove unneeded XtensaMCExpr. Just use MCSpecifierExpr when a
specifier is needed.
Commit: 7c22612b2948d8657b4a22ce59870ddd708c4677
https://github.com/llvm/llvm-project/commit/7c22612b2948d8657b4a22ce59870ddd708c4677
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
Log Message:
-----------
SPARC: Remove dead specifier code from asm operand printer
We don't currently print %specifier( ) for asm operands.
The old code was also incorrect - as it did not print "(".
Commit: d3e9e2d433a666d6620afb00a1533ef4937c667f
https://github.com/llvm/llvm-project/commit/d3e9e2d433a666d6620afb00a1533ef4937c667f
Author: Ross Kirsling <ross.kirsling at sony.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp
Log Message:
-----------
[Clang] Fix typo in is_replaceable diagnostic (#144247)
Adjustment to #143265; `because it not` should be `because it is not`.
Commit: 5cf138a68744904562e81436181df668b00cdb1f
https://github.com/llvm/llvm-project/commit/5cf138a68744904562e81436181df668b00cdb1f
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.h
Log Message:
-----------
M68k: Replace M68kMCExpr::VK_ to M68k::S_
Prepare for removing VEMCExpr. Adopt the newer naming convention adopted
by AMDGPU/WebAssembly/VE.
Commit: 444c6ae530e4814af2cfd6918e3f852ef14ff50d
https://github.com/llvm/llvm-project/commit/444c6ae530e4814af2cfd6918e3f852ef14ff50d
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.h
Log Message:
-----------
M68k: Remove M68kMCExpr
Commit: b839632bf44f56e6f17777857f4b23d4eccb6f33
https://github.com/llvm/llvm-project/commit/b839632bf44f56e6f17777857f4b23d4eccb6f33
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
Log Message:
-----------
PowerPC: Rename PPCMCExpr::VK_ to PPC::S_
Prepare for removing PPCMCExpr. Adopt the newer naming convention with
AMDGPU/WebAssembly/VE/M68k.
Commit: a8d76acdd88b25a98e50ac2da9e6f311fc2c2cb8
https://github.com/llvm/llvm-project/commit/a8d76acdd88b25a98e50ac2da9e6f311fc2c2cb8
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
Log Message:
-----------
PowerPC: Replace MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7a102c0052e5ae0e76ef1297902ffeb22d
Commit: 087a6ac420ad99c523b9dd517351e0c6d1f1a980
https://github.com/llvm/llvm-project/commit/087a6ac420ad99c523b9dd517351e0c6d1f1a980
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
Log Message:
-----------
[LV] Add users to some first-order recurrence tests.
Add extra users to ensure the recurrence cannot be DCE'd.
Also re-generates some checks.
Commit: 790df93298b3ad6c57dafb55fc6d18bddff16c4a
https://github.com/llvm/llvm-project/commit/790df93298b3ad6c57dafb55fc6d18bddff16c4a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
Log Message:
-----------
[VPlan] Mark VPFirstOrderRecurrencePHI as not reading/writing memory.
First-order recurrence phis don't have side-effects and don't read or
write memory. Mark them as such.
Commit: f4a63523b88631e224496435bea0940ac05897bf
https://github.com/llvm/llvm-project/commit/f4a63523b88631e224496435bea0940ac05897bf
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
Log Message:
-----------
PowerPC: Migrate to newer relocation specifier representation
* Use MCAsmInfo::printSpecifierExpr instead of MCExpr::print.
* Replace PPCMCExpr with MCSpecifierExpr.
Commit: 34c85ed2bc1adfa375745db6de7f62d350a8f768
https://github.com/llvm/llvm-project/commit/34c85ed2bc1adfa375745db6de7f62d350a8f768
Author: Vladimir Vuksanovic <109677816+vvuksanovic at users.noreply.github.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
A clang-tools-extra/test/clang-reorder-fields/MacroExpansionField.cpp
Log Message:
-----------
[clang-reorder-fields] Use expanded location for macros (#142147)
Fixes macros being replaced instead of their expansion.
Closes #52632
Commit: e448c3e5fc2ab4244356e29c9c9135b6ccf5f6ff
https://github.com/llvm/llvm-project/commit/e448c3e5fc2ab4244356e29c9c9135b6ccf5f6ff
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.h
Log Message:
-----------
LoongArch: Migrate to MCAsmInfo::printExpr
Commit: e3025c95090f74b26e36106d2aa394b213f713a1
https://github.com/llvm/llvm-project/commit/e3025c95090f74b26e36106d2aa394b213f713a1
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
RISCV: Rename RISCVMCExpr::VK_ to RISCV::S_
Prepare for removing RISCVMCExpr. Adopt the newer naming convention (S_)
used by AMDGPU/WebAssembly/VE/M68k/PowerPC.
Commit: 4635b6076dc1933b7ebd9fcca9f22ec93e2f9c0c
https://github.com/llvm/llvm-project/commit/4635b6076dc1933b7ebd9fcca9f22ec93e2f9c0c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
Log Message:
-----------
RISCV: Rename RISCVMCExpr::VK_ to RISCV::S_
Commit: fedf6c68ddfb43730578837aad394afcd97fe65a
https://github.com/llvm/llvm-project/commit/fedf6c68ddfb43730578837aad394afcd97fe65a
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
RISCV: Move RISCVMCExpr functions to RISCVMCAsmInfo or RISCVMCAsmBackend
* Move getPCRelHiFixup closer to the only caller RISCVAsmBackend::evaluateTargetFixup.
* Declare getSpecifierForName in RISCVMCAsmInfo, in align with other
targets that have migrated to the new relocation specifier representation.
Commit: 51b63bbee56c2253643f41c53bc3592af261b82d
https://github.com/llvm/llvm-project/commit/51b63bbee56c2253643f41c53bc3592af261b82d
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
RISCV: Replace MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7a102c0052e5ae0e76ef1297902ffeb22d
Commit: f11dd116e0aa8cf35bdb82dba0a3a926538c05c2
https://github.com/llvm/llvm-project/commit/f11dd116e0aa8cf35bdb82dba0a3a926538c05c2
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
R llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
Log Message:
-----------
RISCV: Replace RISCVMCExpr with MCSpecifierExpr
Commit: 489dcc9e5233b52152272e6e5377784a56a12f1d
https://github.com/llvm/llvm-project/commit/489dcc9e5233b52152272e6e5377784a56a12f1d
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
Log Message:
-----------
AArch64: Replace MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7a102c0052e5ae0e76ef1297902ffeb22d
Commit: 9a87c94622863cf712c6ab432931dfdb704fae3e
https://github.com/llvm/llvm-project/commit/9a87c94622863cf712c6ab432931dfdb704fae3e
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
Log Message:
-----------
MIPS: Replace MCExpr::print with MCAsmInfo::printExpr
Commit: 81d8c89da056a7751f6c7714fccb30c071dbc31a
https://github.com/llvm/llvm-project/commit/81d8c89da056a7751f6c7714fccb30c071dbc31a
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
Log Message:
-----------
M68k: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7a102c0052e5ae0e76ef1297902ffeb22d
Commit: 95acd6199f3799da00e45b62fd1045ece7142cad
https://github.com/llvm/llvm-project/commit/95acd6199f3799da00e45b62fd1045ece7142cad
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
Log Message:
-----------
AMDGPU: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: 0894094efdfb1ff4f93f818cef9f2aec9c1ea1a8
https://github.com/llvm/llvm-project/commit/0894094efdfb1ff4f93f818cef9f2aec9c1ea1a8
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
Log Message:
-----------
X86: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: dcb8cd8ecdd74eb2ceca2365e0fb4c9545e3cd97
https://github.com/llvm/llvm-project/commit/dcb8cd8ecdd74eb2ceca2365e0fb4c9545e3cd97
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
Log Message:
-----------
ARM: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: a7e5de472314a891604abee390beb8af5493b29a
https://github.com/llvm/llvm-project/commit/a7e5de472314a891604abee390beb8af5493b29a
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
Log Message:
-----------
SystemZ: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: dca2b261d77a9b758587b660e5b88b6a312d057c
https://github.com/llvm/llvm-project/commit/dca2b261d77a9b758587b660e5b88b6a312d057c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.cpp
Log Message:
-----------
Lanai: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: 178fac3d61aa7fc4eb9e4a3d385ae02e660c0d3a
https://github.com/llvm/llvm-project/commit/178fac3d61aa7fc4eb9e4a3d385ae02e660c0d3a
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp
Log Message:
-----------
Hexagon: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: 22ad0359f9006f47a1707170896f359abbd6e10d
https://github.com/llvm/llvm-project/commit/22ad0359f9006f47a1707170896f359abbd6e10d
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXMCExpr.cpp
Log Message:
-----------
NVPTX: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: c9d511bc642fbf612014eee4749ad7ee2646af32
https://github.com/llvm/llvm-project/commit/c9d511bc642fbf612014eee4749ad7ee2646af32
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M bolt/lib/Passes/RetpolineInsertion.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
Log Message:
-----------
Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: d793168e3b1a0343debfdfe143d7fb4127f9038c
https://github.com/llvm/llvm-project/commit/d793168e3b1a0343debfdfe143d7fb4127f9038c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
Log Message:
-----------
MIPS: Rename MipsMCExpr::MEK_ to Mips::S_
Prepare for removing MipsMCExpr. Adopt the newer naming convention (S_)
used by AMDGPU/WebAssembly/VE/M68k/PowerPC/LoongArch/RISCV.
Commit: ad94f77a6a0c421e1f5815d1b8e5aa86d8dd2e92
https://github.com/llvm/llvm-project/commit/ad94f77a6a0c421e1f5815d1b8e5aa86d8dd2e92
Author: Tom Vijlbrief <tvijlbrief at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/test/Misc/target-invalid-cpu-note/avr.c
M llvm/lib/Target/AVR/AVRDevices.td
Log Message:
-----------
[AVR] Add many new AVR MCU model definitions (#144229)
1. Added the missing XMEGA2 definition. The avr64 devices use xmega2 which has SPM(X) defined.
2. The avr16/avr32 devices do have SPM and SPMX features, but the current xmega3 definition has not.
Xmega3 is also used for modern attiny series which do not have SPM(X), so that is correct.
Leave the avr16/avr32 devices unchanged (using xmega3 to be in sync with gcc definitions).
Fixes https://github.com/llvm/llvm-project/issues/116116
Commit: 1506ba95d7c3dca1abff0190550945f6cc263a99
https://github.com/llvm/llvm-project/commit/1506ba95d7c3dca1abff0190550945f6cc263a99
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
Log Message:
-----------
[clang-format][NFC] Clean up DisallowLineBreaks lambda (#144255)
See also
https://github.com/llvm/llvm-project/pull/141576/files#r2141808121
Commit: f23b841f0fa7576b90fe226e66192b861a8cf1cf
https://github.com/llvm/llvm-project/commit/f23b841f0fa7576b90fe226e66192b861a8cf1cf
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
Log Message:
-----------
MIPS: Move MipsMCExpr functions to MipsMCAsmInfo
Commit: ba7369c49c6f638a4ce6f6be3acbdab5e0b5f418
https://github.com/llvm/llvm-project/commit/ba7369c49c6f638a4ce6f6be3acbdab5e0b5f418
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
R lld/test/wasm/lto/Inputs/libcall-return-addr.ll
R lld/test/wasm/lto/libcall-return-addr.ll
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
Log Message:
-----------
WebAssembly: Move runtime libcall setting out of TargetLowering (#142624)
RuntimeLibcallInfo needs to be correct outside of codegen contexts.
Commit: 993c158a30b9ddc881e55efcd33e33abc10f3a5c
https://github.com/llvm/llvm-project/commit/993c158a30b9ddc881e55efcd33e33abc10f3a5c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsMCInstLower.h
Log Message:
-----------
MIPS: Reduce MipsMCExpr uses
Commit: cf679e66fade71220535775cca895628bf7692af
https://github.com/llvm/llvm-project/commit/cf679e66fade71220535775cca895628bf7692af
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
Log Message:
-----------
SystemZ: Rename SystemZMCExpr::VK_ to SystemZ::S_
Prepare for removing SystemZMCExpr. Adopt the newer naming convention
used by most other targets.
Commit: d64ee2cd4fe488b6dc21e7a8173fbb9cf3610ba0
https://github.com/llvm/llvm-project/commit/d64ee2cd4fe488b6dc21e7a8173fbb9cf3610ba0
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
Log Message:
-----------
[RISCV] Add GetVTypeMinimalPredicates for the operation supported by zvfhmin. NFC. (#143847)
This patch adds a new `GetVTypeMinimalPredicates` for `f16` operation
supported by `Zvfhmin`. Split the type predicates for minimal support
and full compute support. This is a refactor patch for implementing
vector compute support for bf16 (Zvfbfa), that we can check `bf16` type
whether with `Zvfbfa` extension in `GetVTypePredicates`.
Commit: b591f6dad4079401fadc4a516b32d3900b7946de
https://github.com/llvm/llvm-project/commit/b591f6dad4079401fadc4a516b32d3900b7946de
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.h
Log Message:
-----------
SystemZ: Migrate to newer relocation specifier representation
z/OS creates SystemZMCExpr objects (https://reviews.llvm.org/D153788)
while ELF doesn't. Define the SystemZMCAsmInfoGOFF hooks
instead of the legacy MCSpecifierExpr:: hooks.
Commit: 167223f8c2c2350a3de9478355885c63b35ca6a9
https://github.com/llvm/llvm-project/commit/167223f8c2c2350a3de9478355885c63b35ca6a9
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn
Log Message:
-----------
[gn build] Port b591f6dad407
Commit: 9adde28df784f5c0cc960bdabd413ac131a5852e
https://github.com/llvm/llvm-project/commit/9adde28df784f5c0cc960bdabd413ac131a5852e
Author: Ming-Yi Lai <ming-yi.lai at mediatek.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/test/ELF/riscv-feature-zicfilp-func-sig.s
M lld/test/ELF/riscv-feature-zicfilp-unlabeled.s
M lld/test/ELF/riscv-feature-zicfiss.s
Log Message:
-----------
[LLD][ELF][RISCV][Zicfilp][Zicfiss] Support `-z zicfilp=` and `-z zicfiss=` to force enable/disable features (#143114)
+ If `-z zicfilp=implicit` or option not specified, the output would
have the ZICFILP feature enabled/disabled based on input objects
+ If `-z zicfilp=<never|unlabeled|func-sig>`, the output would have
ZICFILP feature forced <off|on to the "unlabeled" scheme|on to the
"func-sig" scheme>
+ If `-z zicfiss=implicit` or option not specified, the output would
have the ZICFISS feature enabled/disabled based on input objects
+ If `-z zicfiss=<never|always>`, the output would have the ZICFISS
feature forced <off|on>
Commit: f71fb2dc01e117481f56e040c25391883d43c1c5
https://github.com/llvm/llvm-project/commit/f71fb2dc01e117481f56e040c25391883d43c1c5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Tooling/ArgumentsAdjusters.cpp
Log Message:
-----------
[clang] Use StringRef in range-based for loops (NFC) (#144242)
When we iterate over std::vector<std::string>, we can directly assign
each element to StringRef. We do not need to go through separate
statements.
Commit: 7a4a83b551eaf159ce10b612def3be62d80706d4
https://github.com/llvm/llvm-project/commit/7a4a83b551eaf159ce10b612def3be62d80706d4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/CodeGenInstruction.h
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/DAGISelMatcher.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/X86DisassemblerTables.cpp
Log Message:
-----------
[TableGen] Use range-based for loops (NFC) (#144283)
Commit: c01532177ff61a768d5dc1ea541f9a8d986497fa
https://github.com/llvm/llvm-project/commit/c01532177ff61a768d5dc1ea541f9a8d986497fa
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Edit/EditedSource.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/InstallAPI/DiagnosticBuilderWrappers.cpp
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/InstallAPI/FileList.cpp
M clang/lib/InstallAPI/Frontend.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Interpreter/Value.cpp
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
Log Message:
-----------
[clang] Remove unused includes (NFC) (#144285)
These are identified by misc-include-cleaner. I've filtered out those
that break builds. Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
Commit: cab09e76e0c4c95f44cf90bf2bf7a6eaa15b14b2
https://github.com/llvm/llvm-project/commit/cab09e76e0c4c95f44cf90bf2bf7a6eaa15b14b2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/double-float-shrink-2.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
Log Message:
-----------
[InstCombine] Propagate FMF from fptrunc when folding `fptrunc fabs(X) -> fabs(fptrunc X)` (#143352)
Alive2: https://alive2.llvm.org/ce/z/DWV3G3
fptrunc yields infinity when the input cannot fit in the target type. So
ninf should be propagated from fptrunc. For other intrinsics, the
previous check ensures that the result is never an infinity:
https://github.com/llvm/llvm-project/blob/5d3899d293e902124c3602b466031b6b799fb123/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp#L1910-L1917
Closes https://github.com/llvm/llvm-project/issues/143122.
Commit: e2afda6fc95ef63b54d449fc1a9eb13cd0ff3639
https://github.com/llvm/llvm-project/commit/e2afda6fc95ef63b54d449fc1a9eb13cd0ff3639
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vslideup.c
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/rvv/vrgatherei16.ll
M llvm/test/CodeGen/RISCV/rvv/vslidedown.ll
M llvm/test/CodeGen/RISCV/rvv/vslideup.ll
Log Message:
-----------
[RISCV] Fix incorrect predicates for fp16 permutation intrinsics (#144063)
vrgatherei16, vslideup and vslidedown should be supported with fp16 type
for Zvfhmin.
Fixes https://github.com/llvm/llvm-project/issues/143975.
Commit: 29fcad000ca63078d28dd231e0727b7811df43b0
https://github.com/llvm/llvm-project/commit/29fcad000ca63078d28dd231e0727b7811df43b0
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
Log Message:
-----------
AVR: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: f8e0518120cd2850a7f674322bf428bc7d7d3326
https://github.com/llvm/llvm-project/commit/f8e0518120cd2850a7f674322bf428bc7d7d3326
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCInst.cpp
M llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll
M llvm/test/CodeGen/Mips/llvm-ir/load.ll
M llvm/test/CodeGen/Mips/llvm-ir/store.ll
M llvm/test/MC/Lanai/conditional_inst.s
M llvm/test/MC/Lanai/memory.s
Log Message:
-----------
MC: Adjust -show-inst output for MCExpr
This dump feature does not pass MCAsmInfo to the printer function.
When we remove MCSpecifierExpr subclasses (and the printImpl overrides),
we will not be able to print target-specific specifier strings.
Just print a textual representation.
Commit: 05a9ad977624c4f6def7c0f4cf7103e28d6c6541
https://github.com/llvm/llvm-project/commit/05a9ad977624c4f6def7c0f4cf7103e28d6c6541
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
R llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.cpp
R llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.h
Log Message:
-----------
Lanai: Migrate to the new relocation specifier representation
Use MCSpecifierExpr directly and remove the LanaiMCExpr subclass. Define
MCSpecifierExpr::printImpl to print the relocation specifier in decimal
for llvm-mc -show-inst. The output is not guaranteed to be stable.
Depends on f8e0518120cd2850a7f674322bf428bc7d7d3326
("MC: Adjust -show-inst output for MCExpr")
Commit: 945b12f6c823c49336a878e7afe2a96e4d3382ea
https://github.com/llvm/llvm-project/commit/945b12f6c823c49336a878e7afe2a96e4d3382ea
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn
Log Message:
-----------
[gn build] Port 05a9ad977624
Commit: 4ea616d072d126a31149174ca2efdbdace9ce568
https://github.com/llvm/llvm-project/commit/4ea616d072d126a31149174ca2efdbdace9ce568
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
Log Message:
-----------
AArch64: Move AArch64MCExpr functions to AArch64MCAsmInfo
To migrate away from the legacy
XXXMCExpr::printImpl/evaluateAsRelocatableImpl overrides and align with
other targets.
While the AArch64MCAsmInfoXXX hooks introduce some duplication, they
enable better separation for object file formats.
Commit: 4f9e6bad8438f4440bfd68be2f0ebdca0d588d47
https://github.com/llvm/llvm-project/commit/4f9e6bad8438f4440bfd68be2f0ebdca0d588d47
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Fix calling operator new with nothrow/align parameter (#144271)
Discard all the parameters we don't care about.
Commit: f3021e79fd5a4cab5537f37df2e6010a325d0a7c
https://github.com/llvm/llvm-project/commit/f3021e79fd5a4cab5537f37df2e6010a325d0a7c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
Log Message:
-----------
ARM: Rename ARMMCExpr::VK_ to ARM::S_
Prepare for removing ARMMCExpr. Adopt the new naming convention (S_
instead of VK_; the relocation specifier was previously named
`VariantKind`)) used by most other targets.
Make ARMMCAsmInfo.h include ARMMCExpr.h and change .cpp files to include
ARMMCAsmInfo.h. We will eventually remove ARMMCExpr.h.
Commit: 7efc861ec45e05be9dae59fc7483a98510066160
https://github.com/llvm/llvm-project/commit/7efc861ec45e05be9dae59fc7483a98510066160
Author: David Green <david.green at arm.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage for fdiv-combine.ll. NFC
Commit: f875efe1d82d920790e368f9ab2b31f173a523e1
https://github.com/llvm/llvm-project/commit/f875efe1d82d920790e368f9ab2b31f173a523e1
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Use `GetVTypeMinimalPredicates` instead of `GetVTypePredicates` for vrgatherei16/vslideup/vslidedown. NFC.
Commit: 7d9a451d875368baece310ca7226e3adbc00e1bf
https://github.com/llvm/llvm-project/commit/7d9a451d875368baece310ca7226e3adbc00e1bf
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/MC/RISCV/xqcilsm-invalid.s
Log Message:
-----------
[RISCV] Change input register type for QC_SWM and QC_SWMI (#144294)
Version 0.13 of the `Xqci` spec changes the register type of input
operand `rs3` from `GPR` to `GPRNoX0` for these two instructions.
The spec can be found at
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.13.0
Commit: 222ab28a9240e03479341cba2f487b8350635fce
https://github.com/llvm/llvm-project/commit/222ab28a9240e03479341cba2f487b8350635fce
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
A llvm/test/CodeGen/AArch64/arm64ec-builtins.ll
Log Message:
-----------
[aarch64] Fix Arm64EC libcall lowering after recent refactoring. (#143977)
The refactored code accidentally tokenized a string instead of just
concatenating it.
Add a regression test and some assertions to ensure consistency.
Fixes #143890 .
Commit: 9fcd14d9b013d0c4b8ec245772b3be3d5c31b885
https://github.com/llvm/llvm-project/commit/9fcd14d9b013d0c4b8ec245772b3be3d5c31b885
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M mlir/docs/DefiningDialects/Constraints.md
M mlir/include/mlir/IR/Constraints.td
A mlir/test/mlir-tblgen/attr-constraints.td
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
Log Message:
-----------
[MLIR][ODS] Optionally generate public C++ functions for attribute constraints (#144275)
Add `gen-attr-constraint-decls` and `gen-attr-constraint-defs`, which
generate public C++ functions for attribute constraints. The name of the C++
function is specified in the `cppFunctionName` field.
This generalize `cppFunctionName` from `TypeConstraint` introduced in
https://github.com/llvm/llvm-project/pull/104577 to be usable also in `AttrConstraint`.
Commit: 0bb4d9c30207c4a69731e6848ba7cb6ef52b5906
https://github.com/llvm/llvm-project/commit/0bb4d9c30207c4a69731e6848ba7cb6ef52b5906
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
R llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
R llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn
Log Message:
-----------
ARM: Migrate to the new relocation specifier representation
Use MCSpecifierExpr directly and remove the ARMMCExpr subclass. Define
printImpl and evaluateAsRelocationImpl within ARM*MCAsmInfo classes.
While there is some duplication, it enables better separation for
object file formats.
Commit: ee2d7a6975f37c11bffbf3207879696aca7fcc65
https://github.com/llvm/llvm-project/commit/ee2d7a6975f37c11bffbf3207879696aca7fcc65
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
Log Message:
-----------
MIPS: Remove unneeded printImpl
Follow-up to 05a9ad977624c4f6def7c0f4cf7103e28d6c6541
Commit: 4e0dd007ac6a7b7e0a284062b61c6d22250337df
https://github.com/llvm/llvm-project/commit/4e0dd007ac6a7b7e0a284062b61c6d22250337df
Author: mayanksolanki393 <mayanksolanki393 at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/logical-select.ll
A llvm/test/Transforms/InstCombine/trunc-lshr.ll
Log Message:
-----------
[InstCombine] Combine trunc (lshr X, BW-1) to i1 --> icmp slt X, 0 (#142593) (#143846)
Fixes #142593, the issue was fixed using the suggestion on the ticket
itself.
Godbolt: https://godbolt.org/z/oW5b74jc4
alive2 proof: https://alive2.llvm.org/ce/z/QHnD7e
Commit: e61405033bbaec3604c79a0b323a3e21efc720bc
https://github.com/llvm/llvm-project/commit/e61405033bbaec3604c79a0b323a3e21efc720bc
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/CodeGen/X86/avx-cxx-record.cpp
Log Message:
-----------
[clang] Fix -fclang-abi-compat for clang 20 (#144109)
The value was known already, but it was parsed as latest which is
incorrect because we are already doing clang 21.
Commit: fbade95ebf2bc959fada5206e47f792a2090d72e
https://github.com/llvm/llvm-project/commit/fbade95ebf2bc959fada5206e47f792a2090d72e
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Strip unnecessary make_{pair,optional} (NFC) (#141924)
Commit: cca454b54c7d58930e261c7fa72f44a1a8976997
https://github.com/llvm/llvm-project/commit/cca454b54c7d58930e261c7fa72f44a1a8976997
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
Log Message:
-----------
[ValueTracking] Remove opcode whitelist from matchSimpleRecurrence. (#144031)
This also patches HashRecognize to avoid it mishandling some opcodes.
Commit: 0952992ac6e1470d9f776a99c5793745a6b58d98
https://github.com/llvm/llvm-project/commit/0952992ac6e1470d9f776a99c5793745a6b58d98
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M bolt/lib/Utils/CMakeLists.txt
Log Message:
-----------
[BOLT] Fix LLVM_APPEND_VC_REV support (#142410)
The CMake flag LLVM_APPEND_VC_REV can be passed when building BOLT a
BOLT to prevent including a VC Revision. This patch enables this
functionality.
Usage: `-DLLVM_APPEND_VC_REV=OFF` when running CMake.
Commit: 383b3268794da1ca763deb91cec777742e6e54a8
https://github.com/llvm/llvm-project/commit/383b3268794da1ca763deb91cec777742e6e54a8
Author: Javier Lopez-Gomez <javier.lopez.gomez at proton.me>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLine.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVLocation.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVObject.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVRange.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVSymbol.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVType.h
M llvm/lib/DebugInfo/LogicalView/Core/LVObject.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVOptions.cpp
Log Message:
-----------
[llvm-debuginfo-analyzer] Fix ODR violation in llvm::logicalview::LVObject (#140265)
Some data members are only part of a class definition in a Debug build,
e.g. `LVObject::ID`. If `debuginfologicalview` is used as a library,
`NDEBUG` cannot be used for this purpose, as this PP macro may have a
different definition in a downstream project, which in turn triggers an
ODR violation. Fix it by
- Making `LVObject::ID` an unconditional data member.
- Making `LVObject::dump()` non-virtual. Rationale: `virtual` is not
needed (and it calls `print()`, which is virtual anyway).
Fixes #139098.
Commit: f12dd8f86a2911f69349807359d3bc792e6b773d
https://github.com/llvm/llvm-project/commit/f12dd8f86a2911f69349807359d3bc792e6b773d
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking] Remove unused variable in matchSimpleRecurrence (NFC). (#144316)
Commit: 3dd61c1876446fb9db7c87b89006ad6d81f72f0d
https://github.com/llvm/llvm-project/commit/3dd61c1876446fb9db7c87b89006ad6d81f72f0d
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
Log Message:
-----------
[LV] Fix MVE regression from #132190 (#141736)
Register pressure was only considered if the vector bandwidth was being
maximised (chosen either by the target or user options), but #132190
inadvertently caused high pressure VFs to be pruned even when max
bandwidth wasn't enabled. This PR returns to the previous behaviour.
Commit: a75e0627f97ccc36ec222a53c6a1106157a380ac
https://github.com/llvm/llvm-project/commit/a75e0627f97ccc36ec222a53c6a1106157a380ac
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
Log Message:
-----------
[LV] Use vscale for tuning when updating profile information (#143690)
In fixVectorizedLoop we call setProfileInfoAfterUnrolling to update the
profile information after vectorising, however for scalable VFs we
pessimistically assume vscale=1. We can improve upon this by using the
value of vscale used for tuning, i.e. when targeting neoverse-v1 the
expected value is 2.
Commit: 79a2b15a4c2d63784fe2a92a72828a14b72412df
https://github.com/llvm/llvm-project/commit/79a2b15a4c2d63784fe2a92a72828a14b72412df
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M libcxx/include/__config
M libcxx/include/__utility/pair.h
Log Message:
-----------
[libc++] Remove a few workarounds for old Clang versions (#143858)
Commit: eddab9b757722da7b908723a5a61d280540b48cf
https://github.com/llvm/llvm-project/commit/eddab9b757722da7b908723a5a61d280540b48cf
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
M clang/test/SemaCXX/ptrauth-triviality.cpp
A clang/test/SemaCXX/trivially-relocatable-ptrauth.cpp
Log Message:
-----------
[clang] Fix PointerAuth semantics of cpp_trivially_relocatable (#143969)
This adds a number of functions to ASTContext to query whether a
type contains data protected with address discriminated pointer
authentication, and whether the protected values are just vtable
pointers, or if there are other address discriminated types included.
For the standardized version, __builtin_is_cpp_trivially_relocatable
this means accepting types where the only address discriminated
values are vtable pointers. Other address discriminated types are
not considered relocatable. In addition to that any union containing
any address discriminated data, including vtable pointers, is not
relocatable.
For the old deprecated __builtin_is_trivially_relocatable we reject
any type containing any address discriminated value, as it is
semantically intended as being a "is this memcopyable" which is
not true for anything with address discrimination.
This PR does not update the codegen for __builtin_trivially_relocate,
that will be in a follow on PR that is much more complex.
Commit: b2bf017acd0369fff89b933cf7c653f62b49f8d3
https://github.com/llvm/llvm-project/commit/b2bf017acd0369fff89b933cf7c653f62b49f8d3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86FixupInstTuning.cpp
M llvm/test/CodeGen/X86/combine-or-shuffle.ll
M llvm/test/CodeGen/X86/dpbusd.ll
M llvm/test/CodeGen/X86/dpbusd_const.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll
M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
M llvm/test/CodeGen/X86/vector-reduce-add-zext.ll
M llvm/test/CodeGen/X86/vector-reduce-add.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
Log Message:
-----------
[X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)
On many Intel AVX2 targets (Haswell+), VPBLENDD has notably better throughput than VPBLENDW - and the remaining Intel/AMD targets have no preference.
This patch replaces VPBLENDW shuffles if the shuffle mask can be safely widened from vXi16 to vXi32 and that the scheduler model doesn't consider it a regression (I haven't found any target where this is true, but we should retain the model check).
Noticed while working on #142972 where VMOVSS nodes were regressing to VPBLENDW nodes during domain switching.
Commit: 3824a2dbcefe266849b9f8b3eaa1dd23354b15de
https://github.com/llvm/llvm-project/commit/3824a2dbcefe266849b9f8b3eaa1dd23354b15de
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
Log Message:
-----------
[MemoryBuiltins] Support allocas in getInitialValueOfAllocation (NFC)
Commit: 299a55a88fae4fc423c440436b2632d2a6bd800a
https://github.com/llvm/llvm-project/commit/299a55a88fae4fc423c440436b2632d2a6bd800a
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/docs/InstCombineContributorGuide.md
Log Message:
-----------
[InstCombine][Docs] Update InstCombine contributor guide (#144228)
Update the guideline to reduce the chance of miscompilation/performance
regression.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Co-authored-by: Antonio Frighetto <me at antoniofrighetto.com>
Commit: e00853859e89114d8db24aa0b863b618175f79c7
https://github.com/llvm/llvm-project/commit/e00853859e89114d8db24aa0b863b618175f79c7
Author: Rolf Morel <rolf.morel at intel.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/python/mlir/dialects/transform/__init__.py
M mlir/test/Dialect/Transform/test-pass-application.mlir
M mlir/test/python/dialects/transform.py
Log Message:
-----------
[MLIR][Transform] apply_registered_pass: support ListOptions (#144026)
Interpret an option value with multiple values, either in the form of an
`ArrayAttr` (either static or passed through a param) or as the multiple
attrs associated to a param, as a comma-separated list, i.e. as a
ListOption on a pass.
Commit: ddea4fe85a01f645a1c5e2c4a8ea607a85cf986f
https://github.com/llvm/llvm-project/commit/ddea4fe85a01f645a1c5e2c4a8ea607a85cf986f
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Serialize.cpp
Log Message:
-----------
Fix some "not all control paths return" warnings; NFC
Commit: 4f7b5e6d8327f8cea41ba31fdbbb0ee9c1f754c3
https://github.com/llvm/llvm-project/commit/4f7b5e6d8327f8cea41ba31fdbbb0ee9c1f754c3
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
Fix a tablegen pattern that results in a warning; NFC
We were generating `1 || 1` which caused some issues for -Werror builds
Commit: 01f9dff61fb028f69493a44616014256dee5fb2a
https://github.com/llvm/llvm-project/commit/01f9dff61fb028f69493a44616014256dee5fb2a
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M flang/test/CMakeLists.txt
Log Message:
-----------
[Flang] Add llvm-profdata to list of tools to be built (#144325)
Fixes #144179
Commit: 329dfa16564da74451d26b601cab2d8af0e5f4d3
https://github.com/llvm/llvm-project/commit/329dfa16564da74451d26b601cab2d8af0e5f4d3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/test/CodeGen/X86/fixup-blend.ll
Log Message:
-----------
[X86] fixup-blend.ll - add commuted load test coverage
Commit: d57b86701a7b5bf7d98fea032f33e726b2abb424
https://github.com/llvm/llvm-project/commit/d57b86701a7b5bf7d98fea032f33e726b2abb424
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
Log Message:
-----------
Revert "AArch64: Move AArch64MCExpr functions to AArch64MCAsmInfo"
This reverts commit 4ea616d072d126a31149174ca2efdbdace9ce568.
This change is causing buildbot failures on MacOS:
- https://lab.llvm.org/buildbot/#/builders/190/builds/21510
- http://45.33.8.238/macm1/108620/step_10.txt
Commit: a54712c8ec25a94ab55a4783bfd9d5467d2ec968
https://github.com/llvm/llvm-project/commit/a54712c8ec25a94ab55a4783bfd9d5467d2ec968
Author: John Brawn <john.brawn at arm.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
A llvm/test/Transforms/LoopStrengthReduce/AArch64/postidx-load.ll
Log Message:
-----------
[LSR] Make canHoistIVInc allow non-integer types (#143707)
canHoistIVInc was made to only allow integer types to avoid a crash in
isIndexedLoadLegal/isIndexedStoreLegal due to them failing an assertion
in getValueType (or rather in MVT::getVT which gets called from that)
when passed a struct type. Adjusting these functions to pass
AllowUnknown=true to getValueType means we don't get an assertion
failure (MVT::Other is returned which TLI->isIndexedLoadLegal should
then return false for), meaning we can remove this check for integer
type.
Commit: 39ad3151e073e9f721d1e2e2849fb4bdc9443ae3
https://github.com/llvm/llvm-project/commit/39ad3151e073e9f721d1e2e2849fb4bdc9443ae3
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/Common/PredicateExpander.h
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
Log Message:
-----------
[TableGen] Use default member initializers. NFC. (#144349)
Automated with clang-tidy -fix -checks=-*,modernize-use-default-member-init
Commit: 595a273d9232a7378c583fb109212370d6d2f4e4
https://github.com/llvm/llvm-project/commit/595a273d9232a7378c583fb109212370d6d2f4e4
Author: Andrey Timonin <timonina1909 at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/test/Dialect/EmitC/ops.mlir
Log Message:
-----------
[mlir][emitc] Support 'emitc::LValueType' in 'emitc::VerbatimOp' (#144151)
This PR introduces support for `emitc::LvalueType` in
`emitc::VerbatimOp`, providing a mechanism to reduce the number of
operations required when working with verbatim operations whose
arguments are of type `emitc::LvalueType`.
Before:
```mlir
emitc.func @foo() {
%a = "emitc.variable"() <{value = #emitc.opaque<"1">}> : () -> !emitc.lvalue<i32>
%loaded_a = load %a : !emitc.lvalue<i32>
emitc.verbatim "{} + {};" args %loaded_a, %loaded_a : i32, i32
return
}
```
After:
```mlir
emitc.func @bar() {
%a = "emitc.variable"() <{value = #emitc.opaque<"1">}> : () -> !emitc.lvalue<i32>
emitc.verbatim "{} + {};" args %a, %a : !emitc.lvalue<i32>, !emitc.lvalue<i32>
return
}
```
You can now write something like this:
```mlir
emitc.func @baz() {
%a = "emitc.variable"() <{value = #emitc.opaque<"1">}> : () -> !emitc.lvalue<i32>
emitc.verbatim "++{};" args %a : !emitc.lvalue<i32>
return
}
```
Commit: 8e333e3cedec69f9e538ed79ed9f577956215edb
https://github.com/llvm/llvm-project/commit/8e333e3cedec69f9e538ed79ed9f577956215edb
Author: Max191 <44243577+Max191 at users.noreply.github.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
Log Message:
-----------
[mlir] Expose linearize/delinearize lowering transforms (#144156)
Moves the transformation logic from the AffineLinearizeOp and
AffineDelinearizeOp lowerings into separate transform functions that can
now be called separately. This provides a more controlled way to apply
the op lowerings.
---------
Signed-off-by: Max Dawkins <max.dawkins at gmail.com>
Commit: 7c25db3fbfc63f76b270940e341f267e497e95d9
https://github.com/llvm/llvm-project/commit/7c25db3fbfc63f76b270940e341f267e497e95d9
Author: Xu Zhang <simonzgx at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/aarch64-bitwisenot-fold.ll
M llvm/test/CodeGen/LoongArch/ctlz-cttz-ctpop.ll
Log Message:
-----------
[DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))). (#141476)
Fixes #140639
---------
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: f2734aa25e808e8c1967f7125fdea6c8b2dab9e1
https://github.com/llvm/llvm-project/commit/f2734aa25e808e8c1967f7125fdea6c8b2dab9e1
Author: Acthinks Yang <yangzhh at mail.ustc.edu.cn>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
A llvm/test/Transforms/InstCombine/icmp-subadd.ll
Log Message:
-----------
[InstCombine] fold icmp with add/sub instructions having the same operands (#143241)
Closes #143211.
Commit: 4692f0d3448e32381a2b21c7359c7daed07a8850
https://github.com/llvm/llvm-project/commit/4692f0d3448e32381a2b21c7359c7daed07a8850
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
R llvm/test/CodeGen/AMDGPU/promote-alloca-structs.ll
Log Message:
-----------
Revert "[AMDGPU] Extended vector promotion to aggregate types." (#144366)
Reverts llvm/llvm-project#143784
Patch fails some internal tests. Will investigate more thoroughly before
attempting to remerge.
Commit: 38fa7533fbac525198206200cf2caf04071fcdb1
https://github.com/llvm/llvm-project/commit/38fa7533fbac525198206200cf2caf04071fcdb1
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticGroups.td
Log Message:
-----------
Fix diagnostic documentation build errors
Commit: f0373295e82315f95a97ce1b34c78ff46f475863
https://github.com/llvm/llvm-project/commit/f0373295e82315f95a97ce1b34c78ff46f475863
Author: Iris Shi <0.0 at owo.li>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDeclCXX.cpp
A clang/test/Parser/cxx-invalid-using-decl-in-constexpr-crash.cpp
Log Message:
-----------
[clang][Parser] Fix crash on malformed using declaration in constexpr function (#144286)
Commit: 6f1b5ed7e127b7806ae36783c6b9406434416c95
https://github.com/llvm/llvm-project/commit/6f1b5ed7e127b7806ae36783c6b9406434416c95
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] LowerCONCAT_VECTORS - pull out repeated SDLoc(). NFC.
Commit: 404597061f974470e8bd1198e44d024fac8319a1
https://github.com/llvm/llvm-project/commit/404597061f974470e8bd1198e44d024fac8319a1
Author: Pranav Bhandarkar <pranav.bhandarkar at amd.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/omptarget-depend.mlir
M mlir/test/Target/LLVMIR/omptarget-nowait-llvm.mlir
A mlir/test/Target/LLVMIR/omptarget-nowait.mlir
M mlir/test/Target/LLVMIR/omptargetdata-nowait-llvm.mlir
Log Message:
-----------
[OMPIRBuilder] - Make offloading input data persist for deferred target tasks (#133499)
When we offload to the target, the pointers to data used by the kernel
are passed in arrays created by `OMPIRBuilder`. These arrays of pointers
are allocated on the stack on the host. This is fine for the most part
because absent the `nowait` clause, the default behavior is that target
tasks are included tasks. That is, the host is blocked until the
offloaded target kernel is done. In turn, this means that the host's
stack frame is intact and accessing the array of pointers when
offloading is safe. However, when `nowait` is used on the `!$ omp
target` instance, then the target task is a deferred task meaning, the
generating task on the host does not have to wait for the target task
to finish. In such cases, it is very likely that the stack frame of the
function invoking the target call is wound up thereby leading to memory
access errors as shown below.
```
AMDGPU error: Error in hsa_amd_memory_pool_allocate: HSA_STATUS_ERROR_INVALID_ALLOCATION: The requested allocation is not valid.
AMDGPU error: Error in hsa_amd_memory_pool_allocate: HSA_STATUS_ERROR_INVALID_ALLOCATION: The requested allocation is not valid. "PluginInterface" error: Failure to allocate device memory: Failed to allocate from memory manager
fort.cod.out: /llvm/llvm-project/offload/plugins-nextgen/common/src/PluginInterface.cpp:1434: Error llvm::omp::target::plugin::PinnedAllocationMapTy::lockMappedHostBuffer(void *, size_t): Assertion `HstPtr && "Invalid pointer"' failed.
Aborted (core dumped)
```
This PR implements support in `OMPIRBuilder` to store these arrays of
pointers in the task structure that is passed to the target task thereby
ensuring it is available to the target task when the target task is
eventually scheduled.
---------
Co-authored-by: Sergio Afonso <safonsof at amd.com>
Commit: c7d85813fda88329979ae6c091d59a60833a9765
https://github.com/llvm/llvm-project/commit/c7d85813fda88329979ae6c091d59a60833a9765
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
A llvm/test/Transforms/IndVarSimplify/simplify-icmp-operands-order.ll
Log Message:
-----------
[IndVars] Add tests showing missed simplifications.
Commit: a5f0525d4b3edba50706cb0e4b9a48f0691e2b4c
https://github.com/llvm/llvm-project/commit/a5f0525d4b3edba50706cb0e4b9a48f0691e2b4c
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-partial-reduce.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-wide-add.ll
Log Message:
-----------
[AArch64][SelectionDAG] Enable new partial reduction lowering by default (#143565)
Commit: 58d23476f0ce76c847497a880f975550a645c796
https://github.com/llvm/llvm-project/commit/58d23476f0ce76c847497a880f975550a645c796
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] Add unroll patterns for scatter ops (#143602)
Add unrolling support for create_tdesc, load, store, prefetch, and update_offset.
---------
Co-authored-by: Adam Siemieniuk <adam.siemieniuk at intel.com>
Co-authored-by: Chao Chen <chao.chen at intel.com>
Commit: fc6aac72cc2c9a7a9dab443bca52f813a18461ef
https://github.com/llvm/llvm-project/commit/fc6aac72cc2c9a7a9dab443bca52f813a18461ef
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/test/CodeGen/DirectX/flatten-array.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
Log Message:
-----------
[DirectX] Fix bug where Flatten arrays was only using last index (#144146)
fixes #142836
We added a function called `collectIndicesAndDimsFromGEP` which builds
the Indicies and Dims up for the recursive case and the base case.
really to solve #142836 we didn't need to add it to the recursive case.
The recursive cases exists for gep chains which are ussually two
indicies per gep ie ptr index and array index. adding
collectIndicesAndDimsFromGEP to the recursive cases means we can now do
some mixed mode indexing say we get a case where its not the ussual 2
indicies but instead 3 we can now treat those last two indicies as part
of the computation for the flat array index.
Commit: 2dd50bf79edefa28beffdbba4edfc2c753adae61
https://github.com/llvm/llvm-project/commit/2dd50bf79edefa28beffdbba4edfc2c753adae61
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMP] Fix warnings
This patch fixes:
llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp:7233:9: error: unused
variable 'TaskTy' [-Werror,-Wunused-variable]
llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp:7666:15: error: unused
variable 'ArrayType' [-Werror,-Wunused-variable]
Commit: dfb14b65bc0a277f920c797b4557e79685055b4f
https://github.com/llvm/llvm-project/commit/dfb14b65bc0a277f920c797b4557e79685055b4f
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M flang/test/Preprocessing/bug518.F
Log Message:
-----------
[Flang] NFC: Update test to work on Mac (#144253)
`%flang` expands to `flang -isysroot <SDK location>` in Mac and probably
other OS as well. `fc1` is only accepted as the first argument and hence
in this case it fails.
Use the `%flang_fc1` option to correctly expand to `flang -fc1 -isysroot
<SDK location>`.
Commit: 711f6a8603717a6dc7e6202c614433ea2f9c0967
https://github.com/llvm/llvm-project/commit/711f6a8603717a6dc7e6202c614433ea2f9c0967
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
A llvm/test/DebugInfo/X86/DW_AT_object_pointer-non-standard-index.ll
M llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
M llvm/test/tools/llvm-dwarfdump/X86/statistics.ll
Log Message:
-----------
[llvm][DebugInfo] Encode DW_AT_object_pointer on method declarations with DW_FORM_implicit_const (#124790)
We started attaching `DW_AT_object_pointer`s on method declarations in
https://github.com/llvm/llvm-project/pull/122742. However, that caused
the `.debug_info` section size to increase significantly (by around ~10%
on some projects). This was mainly due to the large number of new
`DW_FORM_ref4` values. This patch tries to address that regression by
changing the `DW_FORM_ref4` to a `DW_FORM_implicit_const` for
declarations. The value of `DW_FORM_implicit_const` will be the *index*
of the object parameter in the list of formal parameters of the
subprogram (i.e., if the first `DW_TAG_formal_parameter` is the object
pointer, the `DW_FORM_implicit_const` would be `0`). The DWARFv5 spec
only mentions the use of the `reference` attribute class to for
`DW_AT_object_pointer`. So using a `DW_FORM_impilicit_const` would be an
extension to (and not something mandated/specified by) the standard.
Though it'd make sense to extend the wording in the spec to allow for
this optimization.
That way we don't pay for the 4 byte references on every attribute
occurrence. In a local build of clang this barely affected the
`.debug_info` section size (but did increase `.debug_abbrev` by up to
10%, which doesn't impact the total debug-info size much however).
We guarded this on LLDB tuning (since using `DW_FORM_implicit_const` for
this purpose may surprise consumers) and DWARFv5 (since that's where
`DW_FORM_implicit_const` was first standardized).
Commit: c9ac1679b5d3a3839640486dd4bd931a19f4725a
https://github.com/llvm/llvm-project/commit/c9ac1679b5d3a3839640486dd4bd931a19f4725a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb] Remove a redundant control flow statement (NFC) (#144284)
Commit: 05cd32adb7ce2354563814ab6e0b818f2ed6fa26
https://github.com/llvm/llvm-project/commit/05cd32adb7ce2354563814ab6e0b818f2ed6fa26
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[llvm] Remove unused includes (NFC) (#144293)
These are identified by misc-include-cleaner. I've filtered out those
that break builds. Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
Commit: ec32d8858559e4e6b5e520dfd36bfb64056fbdbb
https://github.com/llvm/llvm-project/commit/ec32d8858559e4e6b5e520dfd36bfb64056fbdbb
Author: Karlo Basioli <k.basioli at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
Annotate potentially unused variables introduced in #133499 (#144379)
Commit: 5acdd8d0cf785595b06c1a28326b560f720b4f16
https://github.com/llvm/llvm-project/commit/5acdd8d0cf785595b06c1a28326b560f720b4f16
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRMCInstLower.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.h
Log Message:
-----------
AVR: Rename AVRMCExpr::VK_ to AVR::S_
Prepare for removing AVRMCExpr. Adopt the new naming convention (S_
instead of VK_; the relocation specifier was previously named
`VariantKind`)) used by most other targets.
Make AVRMCAsmInfo.h include AVRMCExpr.h and change .cpp files to include
AVRMCAsmInfo.h. We will eventually remove AVRMCExpr.h.
Commit: 25dcd231bfee1120c21b102e074542c54fb7c5c2
https://github.com/llvm/llvm-project/commit/25dcd231bfee1120c21b102e074542c54fb7c5c2
Author: zGoldthorpe <Zach.Goldthorpe at amd.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
A llvm/test/Transforms/Attributor/AMDGPU/tag-invariant-loads.ll
M llvm/test/Transforms/Attributor/dereferenceable-1.ll
M llvm/test/Transforms/Attributor/value-simplify-local-remote.ll
Log Message:
-----------
[IPO] Added attributor for identifying invariant loads (#141800)
The attributor conservatively marks pointers whose loads are eligible to
be marked as `!invariant.load`.
It does so by identifying:
1. Pointers marked `noalias` and `readonly`
2. Pointers whose underlying objects are all eligible for invariant
loads.
The attributor then manifests this attribute at non-atomic non-volatile
load instructions.
Commit: 1bd4f9719faac77f368a7bdfdb47ead56a808375
https://github.com/llvm/llvm-project/commit/1bd4f9719faac77f368a7bdfdb47ead56a808375
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/OpenMP/implicit-dsa.f90
A flang/test/Lower/OpenMP/taskgroup02.f90
M flang/test/Semantics/OpenMP/implicit-dsa.f90
Log Message:
-----------
[flang][OpenMP] Put taskgroup in a new scope (#144122)
Although taskgroup is a privatizing construct, because of
task_reduction clause, a new scope was not being created for it.
This could cause an extra privatization of variables when
taskgroup was lowered, because its scope would be the same as of
the parent privatizing construct.
This fixes regressions in tests 1052_0201 and 1052_0205, from
Fujitsu testsuite.
This issue didn't happen before because implicit symbols were
being created in a different way before #142154.
Commit: 22d9ea1b636d2c72a24fb0a8ce5216d609164635
https://github.com/llvm/llvm-project/commit/22d9ea1b636d2c72a24fb0a8ce5216d609164635
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVGLCanonicalization.cpp
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Dialect/SPIRV/Transforms/gl-canonicalize.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
Log Message:
-----------
[mlir][spirv] Add definition for GL Length (#144041)
A canonicalization pattern from `spirv.GL.Length` to `spirv.GL.FAbs` for scalar operands is also added.
Commit: 8bbef3d1c9115b3c64365e9b8e4ee84275a4d001
https://github.com/llvm/llvm-project/commit/8bbef3d1c9115b3c64365e9b8e4ee84275a4d001
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
A llvm/test/Transforms/InstCombine/AMDGPU/ptr-replace-alloca.ll
Log Message:
-----------
[InstCombine] Iterative replacement in PtrReplacer (#137215)
This patch enhances the PtrReplacer as follows:
1. Users are now collected iteratively to be generous on the stack. In
the case of PHIs with incoming values which have not yet been visited,
they are pushed back into the stack for reconsideration.
2. Replace users of the pointer root in a reverse-postorder traversal,
instead of a simple traversal over the collected users. This reordering
ensures that the operands of an instruction are replaced before
replacing the instruction itself.
3. During the replacement of PHI, use the same incoming value if it does
not have a replacement.
This patch specifically fixes the case when an incoming value of a PHI
is addrspacecasted.
Commit: d1dc080a858ca47c314334fb14f1ecb605fb4371
https://github.com/llvm/llvm-project/commit/d1dc080a858ca47c314334fb14f1ecb605fb4371
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
Log Message:
-----------
[lldb-dap] show function name in the instruction comment. (#144070)
putting the function name is the dissassembly instruction messes up the
alignment making it less readable. put it instead with the comment.
This also aligns the opcodes and instruction to the left matching the
cli
Commit: 20a1b357c0ff3c3f71de45bae42cb2dead7b66c9
https://github.com/llvm/llvm-project/commit/20a1b357c0ff3c3f71de45bae42cb2dead7b66c9
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
Log Message:
-----------
AArch64: Move AArch64MCExpr functions to AArch64MCAsmInfo
To migrate away from the legacy
XXXMCExpr::printImpl/evaluateAsRelocatableImpl overrides and align with
other targets.
While the AArch64MCAsmInfoXXX hooks introduce some duplication, they
enable better separation for object file formats.
Note: While AArch64MCAsmInfoDarwin uses the `@specifier` notation, it
might use AArch64MCExpr with specifier VK_ABS.
test/tools/llvm-mca/AArch64/Exynos/zero-latency-move.s abuses a parser
behavior that :lo12: is also parsed for Mach-O (though it will fail for
-filetype=obj).
Commit: a733c6c7bb1c533ec28c96c49d3c5de7babd8b7f
https://github.com/llvm/llvm-project/commit/a733c6c7bb1c533ec28c96c49d3c5de7babd8b7f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/test/Analysis/CostModel/RISCV/cast-half.ll
M llvm/test/Analysis/CostModel/RISCV/cast.ll
M llvm/test/Analysis/CostModel/RISCV/cmp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
Log Message:
-----------
[TargetLowering][RISCV] Allow scalable non-simple EVTs to be split even if the element type isn't a legal scalar type. (#144007)
This fixes an inconsistency in i64 vector handling between RV32 and
RV64. Even if i64 isn't legal as a scalar, we should still be able
to split a large i64 vector to get down to a legal vector type. We only
need to give up if we need to split a vscale x 1 vector.
Commit: c62a6138d9d02bcc0fb6660bbed78b4e979fc3dc
https://github.com/llvm/llvm-project/commit/c62a6138d9d02bcc0fb6660bbed78b4e979fc3dc
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
R llvm/test/Transforms/InstCombine/AMDGPU/ptr-replace-alloca.ll
Log Message:
-----------
Revert "[InstCombine] Iterative replacement in PtrReplacer" (#144394)
Reverts llvm/llvm-project#137215
This commit caused a failure in the LLVM CI:
https://lab.llvm.org/buildbot/#/builders/10/builds/7442
Commit: 6f9cd79fa2f43b8128be3e4386ee182ad5a843cc
https://github.com/llvm/llvm-project/commit/6f9cd79fa2f43b8128be3e4386ee182ad5a843cc
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/vp-reverse.ll
Log Message:
-----------
[InstSimplify] Add basic simplifications for vp.reverse (#144112)
Directly modeled after what we do for vector.reverse, but with
restrictions on EVL and mask added.
Commit: 90d62e0ae352e67d808f94ffb6d215d033f4ec22
https://github.com/llvm/llvm-project/commit/90d62e0ae352e67d808f94ffb6d215d033f4ec22
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
Log Message:
-----------
[RISCV][TTI] Refine reverse shuffle costing for high LMUL (#144155)
This contains two closely related changes:
1) Explicitly recurse on the i1 case - "3" happens to be the right
magic constant at m1, but is not otherwise correct, and we're
better off deferring this to existing logic.
2) Match the lowering for high LMUL shuffles - we've switched to using
a linear number of m1 vrgather instead of a single big vrgather.
This results in substantially faster (but also larger) code for
reverse shuffles larger than m1. Note that fixed vectors need
a slide at the end, but scalable ones don't.
This will have the effect of biasing the vectorizer towards larger
(particularly scalable larger) vector factors. This increases VF for the
s112 and s1112 loops from TSVC_2 (in all configurations).
We could refine the high LMUL estimates a bit more, but I think getting
the linear scaling right is probably close enough for the moment.
Commit: 267b859fc60acda510027bd6139c54d660c6fb21
https://github.com/llvm/llvm-project/commit/267b859fc60acda510027bd6139c54d660c6fb21
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
A clang/test/CIR/Transforms/vector-cmp-fold.cir
Log Message:
-----------
[CIR] Implement folder for VecCmpOp (#143322)
This change adds a folder for the VecCmpOp
Issue https://github.com/llvm/llvm-project/issues/136487
Commit: 4cd3e41bce449a10f431a3112b6cb8d7bc1b09cf
https://github.com/llvm/llvm-project/commit/4cd3e41bce449a10f431a3112b6cb8d7bc1b09cf
Author: sribee8 <145801438+sribee8 at users.noreply.github.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M libc/src/__support/HashTable/CMakeLists.txt
M libc/src/__support/HashTable/table.h
M libc/test/src/__support/HashTable/table_test.cpp
Log Message:
-----------
[libc] Removed public function calls in table.h (#144168)
Removed strcmp, strlen, and memset calls from table.h and replaced them
with internal functions.
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: ffc4d87f9b2b57f7020fa5fd0f1d3003370c2d80
https://github.com/llvm/llvm-project/commit/ffc4d87f9b2b57f7020fa5fd0f1d3003370c2d80
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Pass.h
M llvm/include/llvm/PassAnalysisSupport.h
M llvm/include/llvm/PassRegistry.h
M llvm/include/llvm/PassSupport.h
M llvm/include/llvm/Passes/OptimizationLevel.h
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/Passes/PassPlugin.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
Log Message:
-----------
[llvm] annotate interfaces in Passes for DLL export (#143794)
## Purpose
This patch is one in a series of code-mods that annotate LLVM’s public
interface for export. This patch annotates the `llvm/Passes` library and
other pass-related headers. These annotations currently have no
meaningful impact on the LLVM build; however, they are a prerequisite to
support an LLVM Windows DLL (shared library) build.
## Background
This effort is tracked in #109483. Additional context is provided in
[this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).
The bulk of these changes were generated automatically using the
[Interface Definition Scanner (IDS)](https://github.com/compnerd/ids)
tool, followed formatting with `git clang-format`.
The following manual adjustments were also applied after running IDS on
Linux:
- Remove the redundant declaration of the `initializeKCFIPass` function
from llvm/include/llvm/InitializePasses.h because IDS only
auto-annotates the first declaration it encounters, and the second
un-annotated declaration results in an MSVC warning
- Add `LLVM_ABI` to a number of private `AnalysisKey` fields in classes
that extend the `AnalysisInfoMixin` template class.
- Add `LLVM_ABI` to the `ChangeReporter` and `TextChangeReporter`
template class definitions in
llvm/include/llvm/Passes/StandardInstrumentations.h and remove the
extern template instantiations. This is the only way I've found to get
everything compiling warning-free when building a DLL because both
template classes have methods implemented out-of-line.
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: febb7e8443c4e8ff55e6b21bec4e2233b62d832b
https://github.com/llvm/llvm-project/commit/febb7e8443c4e8ff55e6b21bec4e2233b62d832b
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/XRay/BlockIndexer.h
M llvm/include/llvm/XRay/BlockPrinter.h
M llvm/include/llvm/XRay/BlockVerifier.h
M llvm/include/llvm/XRay/FDRRecordConsumer.h
M llvm/include/llvm/XRay/FDRRecordProducer.h
M llvm/include/llvm/XRay/FDRRecords.h
M llvm/include/llvm/XRay/FDRTraceWriter.h
M llvm/include/llvm/XRay/FileHeaderReader.h
M llvm/include/llvm/XRay/InstrumentationMap.h
M llvm/include/llvm/XRay/Profile.h
M llvm/include/llvm/XRay/RecordPrinter.h
M llvm/include/llvm/XRay/Trace.h
Log Message:
-----------
[llvm] annotate interfaces in XRay for DLL export (#143765)
## Purpose
This patch is one in a series of code-mods that annotate LLVM’s public
interface for export. This patch annotates the `llvm/XRay` library.
These annotations currently have no meaningful impact on the LLVM build;
however, they are a prerequisite to support an LLVM Windows DLL (shared
library) build.
## Background
This effort is tracked in #109483. Additional context is provided in
[this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).
The bulk of these changes were generated automatically using the
[Interface Definition Scanner (IDS)](https://github.com/compnerd/ids)
tool, followed formatting with `git clang-format`.
Additionally, I manually added `LLVM_ABI_FRIEND` to friend member
functions declared with `LLVM_ABI`.
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: 695c4f2309718c441bc2e5b7dd3e3267737a12e6
https://github.com/llvm/llvm-project/commit/695c4f2309718c441bc2e5b7dd3e3267737a12e6
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/Utils/Utils.h
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
Log Message:
-----------
[NFC][mlir][tensor] Use `ValueRange` instead of `SmallVector` in `tensor::createPadHighOp` (#144397)
Use `ValueRange` instead of `SmallVector` in `tensor::createPadHighOp`
for the `dynOutDims` arg.
Commit: 492d25bbe12af7702a392fa7ad41eb9e09a48cf2
https://github.com/llvm/llvm-project/commit/492d25bbe12af7702a392fa7ad41eb9e09a48cf2
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/ObjectYAML/CodeViewYAMLDebugSections.h
M llvm/include/llvm/ObjectYAML/CodeViewYAMLSymbols.h
M llvm/include/llvm/ObjectYAML/CodeViewYAMLTypes.h
M llvm/include/llvm/ObjectYAML/DWARFEmitter.h
M llvm/include/llvm/ObjectYAML/DWARFYAML.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/include/llvm/ObjectYAML/YAML.h
M llvm/include/llvm/ObjectYAML/yaml2obj.h
Log Message:
-----------
[llvm] annotate interfaces in llvm/ObjectYAML for DLL export (#143763)
## Purpose
This patch is one in a series of code-mods that annotate LLVM’s public
interface for export. This patch annotates the `llvm/ObjectYAML`
library. These annotations currently have no meaningful impact on the
LLVM build; however, they are a prerequisite to support an LLVM Windows
DLL (shared library) build.
## Background
This effort is tracked in #109483. Additional context is provided in
[this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).
These were generated automatically using the [Interface Definition
Scanner (IDS)](https://github.com/compnerd/ids) tool, followed
formatting with `git clang-format`.
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: fccab5d757778204666d70e2f1592952fc8b336d
https://github.com/llvm/llvm-project/commit/fccab5d757778204666d70e2f1592952fc8b336d
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/test/CIR/CodeGen/complex.cpp
Log Message:
-----------
[CIR] Upstream ComplexType ImaginaryLiteral (#144223)
This change adds support for ComplexType ImaginaryLiteral
https://github.com/llvm/llvm-project/issues/141365
Commit: 3f794759f4f2c0ba248a21fb3ec9eb4ff7e35724
https://github.com/llvm/llvm-project/commit/3f794759f4f2c0ba248a21fb3ec9eb4ff7e35724
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/IR/DebugLoc.h
M llvm/lib/IR/DebugLoc.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
Log Message:
-----------
[build] Fixed LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING handling. (#144391)
Change in #107278 modified the CMake CACHE variable with values
that are not supported for it as documented. This patch renames the
derived vars so that they do not conflict with the CACHE variable.
Commit: a3d35b87eacece8cdbb4615ff6c65003773f5cbf
https://github.com/llvm/llvm-project/commit/a3d35b87eacece8cdbb4615ff6c65003773f5cbf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (#144401)
Commit: 539cf824259cbb23ccc68b83ef3cde575ca50842
https://github.com/llvm/llvm-project/commit/539cf824259cbb23ccc68b83ef3cde575ca50842
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/test/API/tools/lldb-dap/stepInTargets/TestDAP_stepInTargets.py
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb-dap] Use structured types for stepInTargets request (#144072)
uses the `SendTargetCapabilities` from #142831
Commit: b5c6245cb46354923940b95a89213fa0924e5c5f
https://github.com/llvm/llvm-project/commit/b5c6245cb46354923940b95a89213fa0924e5c5f
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
Log Message:
-----------
[CIR][NFC] Refactor constant pointer l-value handling (#144165)
This change introduces a ConstantLValueEmitter class, which will be
needed for emitting CIR for non-trivial constant pointers. This change
introduces the class with most branches reaching an NYI diagnostic. The
only path that is currently implemented is the case where an absolute
pointer (usually a null pointer) is emitted. This corresponds to the
existing handler for emitting l-value constants.
Commit: 00582728767599bb0e88beb96e8264dbe676da53
https://github.com/llvm/llvm-project/commit/00582728767599bb0e88beb96e8264dbe676da53
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/unittests/Object/ELFObjectFileTest.cpp
Log Message:
-----------
[NFC] Remove unused test code from ELFObjectFileTest.cpp
Commit: 8ed43c47dec36bc38bbae4c6f024cdb824555a76
https://github.com/llvm/llvm-project/commit/8ed43c47dec36bc38bbae4c6f024cdb824555a76
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
Log Message:
-----------
[Matrix] Hoist IRBuilder<> out of Visit* functions. NFC (#144369)
Commit: 63b80dd01dafc92104ee43e4f0f5296d644c25ec
https://github.com/llvm/llvm-project/commit/63b80dd01dafc92104ee43e4f0f5296d644c25ec
Author: Finn Plummer <finn.c.plum at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Frontend/HLSL/HLSLRootSignatureUtils.cpp
Log Message:
-----------
[NFC][RootSignature] Use `llvm::EnumEntry` for serialization of Root Signature Elements (#144106)
It has pointed out
[here](https://github.com/llvm/llvm-project/pull/143198#discussion_r2132877388)
that we may be able to use `llvm::EnumEntry` so that we can re-use the
printing logic across enumerations.
- Enables re-use of `printEnum` and `printFlags` methods via templates
- Allows easy definition of `getEnumName` function for enum-to-string
conversion, eliminating the need to use a string stream for constructing
the Name SmallString
- Also, does a small fix-up of the operands for descriptor table clause
to be consistent with other `Build*` methods
For reference, the
[test-cases](https://github.com/llvm/llvm-project/blob/main/llvm/unittests/Frontend/HLSLRootSignatureDumpTest.cpp)
that must not change expected output.
Commit: fcc10e55cabb90f3097a8da4c114e827a1d746eb
https://github.com/llvm/llvm-project/commit/fcc10e55cabb90f3097a8da4c114e827a1d746eb
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
Log Message:
-----------
Remove unnecessary BOM from file; NFC
Fixes #144373
Commit: f83d09a1f60aee28a8ed9020cd72971ec2885f24
https://github.com/llvm/llvm-project/commit/f83d09a1f60aee28a8ed9020cd72971ec2885f24
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/test/Driver/print-enabled-extensions/riscv-andes-a25.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-a45.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-ax25.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-ax45.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-n45.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-nx45.c
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/tools/llvm-mca/RISCV/Andes45/gpr.s
Log Message:
-----------
Revert "[RISCV] Remove B and Zbc extension from Andes series cpus." (#144402)
Reverts llvm/llvm-project#144022
This has been failing postcommit CI for two days:
https://lab.llvm.org/buildbot/#/builders/63
Commit: e8362234f60612a250d832cc8d0f68fe7fa9ea17
https://github.com/llvm/llvm-project/commit/e8362234f60612a250d832cc8d0f68fe7fa9ea17
Author: Scott Linder <scott.linder at amd.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Object/RelocationResolver.cpp
A llvm/test/DebugInfo/AMDGPU/dwarfdump-rel.yaml
Log Message:
-----------
[Object][AMDGPU] Support REL relocations (#143966)
Shaders compiled with DXC/LLPC generate these relocations, and even if
that changes in the future we want to handle existing binaries. The
friction to support this and the maintenance cost long term both seem
incredibly low, considering other targets like ARM support both REL/RELA
static relocations behind the same interface.
Commit: a00b736a797d252d9e26cc13fb45993d7b02ede2
https://github.com/llvm/llvm-project/commit/a00b736a797d252d9e26cc13fb45993d7b02ede2
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/test/Dialect/Vector/scalar-vector-transfer-to-memref.mlir
Log Message:
-----------
[mlir][Vector] Support `vector.extract(xfer_read)` folding with dynamic indices (#143269)
This PR is part of the last step to remove `vector.extractelement` and `vector.insertelement` ops.
RFC: https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops
It adds support for folding `vector.transfer_read(vector.extract) ->
memref.load` with dynamic indices, which is currently supported by
`vector.extractelement`.
Commit: a0662ceba83cf8782da4047b8ee6d175591f168f
https://github.com/llvm/llvm-project/commit/a0662ceba83cf8782da4047b8ee6d175591f168f
Author: Daniel Rodríguez Troitiño <danielrodriguez at meta.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.h
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/test/tools/llvm-objcopy/MachO/strip-with-encryption-info.test
Log Message:
-----------
[objcopy][MachO] Revert special handling of encryptable binaries (#144058)
Code originally added in #120995 and later corrected in #130517 but
apparently still not correct according to #141494 and
rust-lang/rust#141913.
Revert the special handling because the test written in #120995 and
#130517 still passes without those changes. Kept the test and improved
it with a `__DATA` section to keep the current behaviour checked in case
other changes modify the behaviour and break this edge case.
Commit: 402c376daa659c0c3a477ad038a415079ffa0a48
https://github.com/llvm/llvm-project/commit/402c376daa659c0c3a477ad038a415079ffa0a48
Author: William Huynh <William.Huynh at arm.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M libc/src/stdio/baremetal/printf.cpp
M libc/src/stdio/baremetal/putchar.cpp
M libc/src/stdio/baremetal/puts.cpp
M libc/src/stdio/baremetal/vprintf.cpp
Log Message:
-----------
[libc] Change default behaviour of baremetal/printf to use stdout (#143703)
In #94078, `write_to_stdout` had not been fully implemented. However,
now that it has been implemented, to conform with the C standard
(7.23.6.3. The printf function, specifically point 2), we use `stdout`.
This issue is tracked in #94685.
- Also prefer `static constexpr`
- Made it explicit that we are writing to `stdout`
Commit: 25781221d68a700eae679a19f701d4ad67e91dc9
https://github.com/llvm/llvm-project/commit/25781221d68a700eae679a19f701d4ad67e91dc9
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Log Message:
-----------
[instcombine] Delete dead transform for reverse of binop (#143967)
We canonicalize reverse to after a binop in foldVectorBinop, and
simplify reverse pairs in InstSimplify, so these elimination transforms
are redundant.
Commit: b0378e7ca953c2390168f352c5a88fd325cde894
https://github.com/llvm/llvm-project/commit/b0378e7ca953c2390168f352c5a88fd325cde894
Author: Matthias Braun <matze at braunis.de>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
A clang/test/CodeGen/aarch64-always-inline-feature-bug.c
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64TargetParser]Fix reconstructFromParsedFeatures ignoring negative features (#142236)
The `targetFeatureToExtension` function used by
reconstructFromParsedFeatures only found positive `+FEATURE` strings,
but not negative `-FEATURE` strings. Extend the function to handle both
to fix `reconstructFromParsedFeatures`.
Commit: a637584fadb1f0b9a4fc526a2952345b14147634
https://github.com/llvm/llvm-project/commit/a637584fadb1f0b9a4fc526a2952345b14147634
Author: DrSergei <serzhdruzhok at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M lldb/tools/lldb-dap/package.json
Log Message:
-----------
[lldb-dap] Add supported languages in package.json (#144414)
This patch fixes the [problem]. It was caused by missing supported
languages list in `package.json`. VSCode uses `guessDebugger` [function]
to find supported debuggers based on supported languages in case of
opened file. It uses `interestedInLanguage` [function][1] to do that, so
we should provide list of supported languages. Also, fixed typo in
`fortran`.
[problem]: https://github.com/llvm/llvm-project/issues/144239
[function]: https://github.com/microsoft/vscode/blob/main/src/vs/workbench/contrib/debug/browser/debugAdapterManager.ts#L344
[1]: https://github.com/microsoft/vscode/blob/main/src/vs/workbench/contrib/debug/common/debugger.ts#L171
Commit: 8adccaee2a9e2d967ac54a783ffb71ac6ff79e85
https://github.com/llvm/llvm-project/commit/8adccaee2a9e2d967ac54a783ffb71ac6ff79e85
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M libc/src/__support/wchar/CMakeLists.txt
M libc/src/__support/wchar/character_converter.cpp
M libc/src/__support/wchar/character_converter.h
M libc/src/__support/wchar/mbstate.h
R libc/src/__support/wchar/utf_ret.h
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/wchar/CMakeLists.txt
A libc/test/src/__support/wchar/utf32_to_8_test.cpp
Log Message:
-----------
[libc] Implemented CharacterConverter push/pop for utf32->utf8 conversions (#143971)
Implemented CharacterConverter methods for conversion between utf32 ->
utf8
Added tests
---------
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: 1e60dd4f236dcca0215decc0e4885fb2dcdc1528
https://github.com/llvm/llvm-project/commit/1e60dd4f236dcca0215decc0e4885fb2dcdc1528
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp:89:2:
error: extra ';' outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
Commit: d3bc834ece48cb993fcabcf20311bdcc9e591a21
https://github.com/llvm/llvm-project/commit/d3bc834ece48cb993fcabcf20311bdcc9e591a21
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-no-remaining-iterations.ll
Log Message:
-----------
[LV] Update check to find epilogue resume value to check all incoming.
This fixes a crash where all incoming values for the epilogue resume
value are zero, because there are no remaining iterations to execute for
the epilogue loop.
Commit: 34be09ad731d631d7b950a334cfe25673ebe5519
https://github.com/llvm/llvm-project/commit/34be09ad731d631d7b950a334cfe25673ebe5519
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/stepInTargets/TestDAP_stepInTargets.py
Log Message:
-----------
[lldb-dap][test] fix not supported error. (#144419)
Fixes #144072
buildbot error.
Commit: a027eb4472ee8fa504c98bef655cac8c8bfe333a
https://github.com/llvm/llvm-project/commit/a027eb4472ee8fa504c98bef655cac8c8bfe333a
Author: Steven Perron <stevenperron at google.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/ArrayTemporary.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/ArrayOutputArguments.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/InitLists.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/OutputArguments.hlsl
M clang/test/CodeGenHLSL/Bool.hlsl
M clang/test/CodeGenHLSL/BoolVector.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/basic_types.hlsl
M clang/test/CodeGenHLSL/builtins/AddUint64.hlsl
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/GroupMemoryBarrierWithGroupSync.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/abs.hlsl
M clang/test/CodeGenHLSL/builtins/all.hlsl
M clang/test/CodeGenHLSL/builtins/and.hlsl
M clang/test/CodeGenHLSL/builtins/any.hlsl
M clang/test/CodeGenHLSL/builtins/ceil-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/ceil.hlsl
M clang/test/CodeGenHLSL/builtins/clamp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/clamp.hlsl
M clang/test/CodeGenHLSL/builtins/clip-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/clip.hlsl
M clang/test/CodeGenHLSL/builtins/cos-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/cos.hlsl
M clang/test/CodeGenHLSL/builtins/cross.hlsl
M clang/test/CodeGenHLSL/builtins/degrees-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/degrees.hlsl
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/exp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/exp.hlsl
M clang/test/CodeGenHLSL/builtins/exp2-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/exp2.hlsl
M clang/test/CodeGenHLSL/builtins/floor-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/floor.hlsl
M clang/test/CodeGenHLSL/builtins/fmod.hlsl
M clang/test/CodeGenHLSL/builtins/frac-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/frac.hlsl
M clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
M clang/test/CodeGenHLSL/builtins/isinf-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/isinf.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/lerp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/log-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/log.hlsl
M clang/test/CodeGenHLSL/builtins/log10-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/log10.hlsl
M clang/test/CodeGenHLSL/builtins/log2-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/log2.hlsl
M clang/test/CodeGenHLSL/builtins/max-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/max.hlsl
M clang/test/CodeGenHLSL/builtins/min-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/min.hlsl
M clang/test/CodeGenHLSL/builtins/normalize-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/normalize.hlsl
M clang/test/CodeGenHLSL/builtins/or.hlsl
M clang/test/CodeGenHLSL/builtins/pow-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/pow.hlsl
M clang/test/CodeGenHLSL/builtins/radians-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/radians.hlsl
M clang/test/CodeGenHLSL/builtins/rcp.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/reversebits.hlsl
M clang/test/CodeGenHLSL/builtins/round-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/round.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
M clang/test/CodeGenHLSL/builtins/sign.hlsl
M clang/test/CodeGenHLSL/builtins/sin-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/sin.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
M clang/test/CodeGenHLSL/builtins/splitdouble.hlsl
M clang/test/CodeGenHLSL/builtins/sqrt-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/sqrt.hlsl
M clang/test/CodeGenHLSL/builtins/step-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/step.hlsl
M clang/test/CodeGenHLSL/builtins/trunc-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/trunc.hlsl
M clang/test/CodeGenHLSL/builtins/wave_get_lane_index_do_while.hlsl
M clang/test/CodeGenHLSL/builtins/wave_get_lane_index_simple.hlsl
M clang/test/CodeGenHLSL/builtins/wave_get_lane_index_subcall.hlsl
M clang/test/CodeGenHLSL/cbuffer.hlsl
M clang/test/CodeGenHLSL/cbuffer_and_namespaces.hlsl
M clang/test/CodeGenHLSL/cbuffer_with_packoffset.hlsl
M clang/test/CodeGenHLSL/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/convergence/do.while.hlsl
M clang/test/CodeGenHLSL/convergence/for.hlsl
M clang/test/CodeGenHLSL/convergence/while.hlsl
M clang/test/CodeGenHLSL/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/default_cbuffer_with_layout.hlsl
M clang/test/CodeGenHLSL/export.hlsl
M clang/test/CodeGenHLSL/group_shared.hlsl
M clang/test/CodeGenHLSL/implicit-norecurse-attrib.hlsl
M clang/test/CodeGenHLSL/inline-functions.hlsl
M clang/test/CodeGenHLSL/inline-spirv/SpirvType.hlsl
M clang/test/CodeGenHLSL/no_int_promotion.hlsl
M clang/test/CodeGenHLSL/out-of-line-static.hlsl
M clang/test/CodeGenHLSL/shift-mask.hlsl
M clang/test/CodeGenHLSL/this-assignment-overload.hlsl
M clang/test/CodeGenHLSL/vk-input-builtin.hlsl
M clang/test/Options/enable_16bit_types_validation_spirv.hlsl
M llvm/lib/Target/DirectX/DXILFinalizeLinkage.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/DirectX/finalize-linkage-remove-dead-lib.ll
M llvm/test/CodeGen/DirectX/finalize-linkage-remove-dead.ll
M llvm/test/CodeGen/DirectX/finalize_linkage.ll
Log Message:
-----------
[HLSL] Use hidden visibility for external linkage. (#140292)
Implements
https://github.com/llvm/wg-hlsl/blob/main/proposals/0026-symbol-visibility.md.
The change is to stop using the `hlsl.export` attribute. Instead,
symbols with "program linkage" in HLSL will have export linkage with
default visibility, and symbols with "external linkage" in HLSL will
have export linkage with hidden visibility.
Commit: 60a59e350bfa909d3caf5b5b0dba8b473746ea0f
https://github.com/llvm/llvm-project/commit/60a59e350bfa909d3caf5b5b0dba8b473746ea0f
Author: Yuta Saito <kateinoigakukun at gmail.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform.h
Log Message:
-----------
[ASan] Recognize WASI platform in sanitizer_platform.h (#139017)
Commit: 38daa6d4ef1f3386cc50198199c5ec61dcb012af
https://github.com/llvm/llvm-project/commit/38daa6d4ef1f3386cc50198199c5ec61dcb012af
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M libc/hdr/types/char8_t.h
M libc/src/__support/wchar/character_converter.cpp
Log Message:
-----------
[libc] build fix: always use our char8_t headers even in overlay mode (#144433)
Build fix caused by certain platforms not providing char8_t when
expected
Temporary fix to just always use our own definition, even in overlay
mode.
Commit: 95418bc8a8fd765d5e60e0c8ac7f8b77d2c15ef2
https://github.com/llvm/llvm-project/commit/95418bc8a8fd765d5e60e0c8ac7f8b77d2c15ef2
Author: Justin King <jcking at wulver.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M compiler-rt/lib/lsan/lsan_allocator.cpp
M compiler-rt/lib/lsan/lsan_allocator.h
M compiler-rt/lib/lsan/lsan_interceptors.cpp
M compiler-rt/lib/lsan/lsan_malloc_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_malloc_mac.inc
Log Message:
-----------
lsan: Support free_sized and free_aligned_sized from C23 (#144415)
Adds support to LSan for `free_sized` and `free_aligned_sized` from C23.
Other sanitizers will be handled with their own separate PRs.
For #144435
Signed-off-by: Justin King <jcking at google.com>
Commit: 9c25ca78f9bdfe74e5dbaa60a864411bdbae4943
https://github.com/llvm/llvm-project/commit/9c25ca78f9bdfe74e5dbaa60a864411bdbae4943
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/modfile79.F90
Log Message:
-----------
[flang] Don't generate module file for hermetic USE'd dependency (#144143)
It's possible for the module file generation code to think that it needs
to (re)generate a module file for a dependent module read from a
hermetic module file, if it defines contains a procedure imported via
renaming due to a name clash. Adjust the logic that determines whether a
module file should be written to include a check for having originated
in a module file.
Commit: 65b06cd983e59c25f30b680167559a4db2b44609
https://github.com/llvm/llvm-project/commit/65b06cd983e59c25f30b680167559a4db2b44609
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M flang-rt/lib/runtime/allocatable.cpp
M flang/lib/Semantics/check-allocate.cpp
M flang/test/Semantics/allocate11.f90
Log Message:
-----------
[flang][runtime] Check SOURCE= conformability on ALLOCATE (#144113)
The SOURCE= expression of an ALLOCATE statement, when present and not
scalar, must conform to the shape of the allocated objects. Check this
at runtime, and return a recoverable error, or crash, when appropriate.
Fixes https://github.com/llvm/llvm-project/issues/143900.
Commit: 2bf3ccabfa37ee1b2d74da7b370cdb16a5cc8ac0
https://github.com/llvm/llvm-project/commit/2bf3ccabfa37ee1b2d74da7b370cdb16a5cc8ac0
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/include/flang-rt/runtime/stat.h
M flang-rt/include/flang-rt/runtime/type-info.h
A flang-rt/include/flang-rt/runtime/work-queue.h
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/assign.cpp
M flang-rt/lib/runtime/derived.cpp
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/descriptor-io.h
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/namelist.cpp
M flang-rt/lib/runtime/tools.cpp
M flang-rt/lib/runtime/type-info.cpp
A flang-rt/lib/runtime/work-queue.cpp
M flang-rt/unittests/Runtime/ExternalIOTest.cpp
M flang/docs/Extensions.md
M flang/include/flang/Runtime/assign.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Semantics/runtime-type-info.cpp
M flang/lib/Semantics/tools.cpp
M flang/module/__fortran_type_info.f90
M flang/test/Lower/volatile-openmp.f90
M flang/test/Semantics/typeinfo01.f90
M flang/test/Semantics/typeinfo03.f90
M flang/test/Semantics/typeinfo04.f90
M flang/test/Semantics/typeinfo05.f90
M flang/test/Semantics/typeinfo06.f90
M flang/test/Semantics/typeinfo07.f90
M flang/test/Semantics/typeinfo08.f90
M flang/test/Semantics/typeinfo11.f90
A flang/test/Semantics/typeinfo12.f90
M flang/test/Semantics/typeinfo13.f90
Log Message:
-----------
[flang] Restructure runtime to avoid recursion (relanding) (#143993)
Recursion, both direct and indirect, prevents accurate stack size
calculation at link time for GPU device code. Restructure these
recursive (often mutually so) routines in the Fortran runtime with new
implementations based on an iterative work queue with
suspendable/resumable work tickets: Assign, Initialize, initializeClone,
Finalize, and Destroy.
Default derived type I/O is also recursive, but already disabled. It can
be added to this new framework later if the overall approach succeeds.
Note that derived type FINAL subroutine calls, defined assignments, and
defined I/O procedures all perform callbacks into user code, which may
well reenter the runtime library. This kind of recursion is not handled
by this change, although it may be possible to do so in the future using
thread-local work queues.
(Relanding this patch after reverting initial attempt due to some test
failures that needed some time to analyze and fix.)
Fixes https://github.com/llvm/llvm-project/issues/142481.
Commit: 6cbb67f84c53d88e67b0d5a9f0ad2cf4782e6f66
https://github.com/llvm/llvm-project/commit/6cbb67f84c53d88e67b0d5a9f0ad2cf4782e6f66
Author: Vlad Lazar <lazar_2004 at list.ru>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
Log Message:
-----------
[mlir][emitc] Fix the emitc::ExpressionOp (#143894)
Fix the lack of verification that the definingOp of the return value
belongs to emitc::ExpressionOp.
Commit: a383b1a95b63cf120b3dea554c2d66ccfaee066b
https://github.com/llvm/llvm-project/commit/a383b1a95b63cf120b3dea554c2d66ccfaee066b
Author: Finn Plummer <finn.c.plum at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/lib/Parse/CMakeLists.txt
M clang/unittests/Parse/CMakeLists.txt
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignatureUtils.h
M llvm/lib/Frontend/HLSL/HLSLRootSignatureUtils.cpp
M llvm/unittests/Frontend/HLSLRootSignatureDumpTest.cpp
Log Message:
-----------
Reland "[HLSL][RootSignature] Implement serialization of RootConstants and RootFlags" (#143019)
This relands #141130.
The initial commit uncovered that we are missing the correct linking of
FrontendHLSL into clang/lib/Parse and clang/lib/unittests/Parse.
This change addreses this by linking them accordingly.
It was also checked and ensured that the LexHLSLRootSignature libraries
do not depend on FrontendHLSL and so we are not required to link there.
Resolves: #138190 and #138192
Commit: 30b16ec3415e7ddb597d096f818d011b1b4e6a63
https://github.com/llvm/llvm-project/commit/30b16ec3415e7ddb597d096f818d011b1b4e6a63
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/first-order-recurrence-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
Log Message:
-----------
[VPlan] Simplify trivial VPFirstOrderRecurrencePHI recipes.
VPFirstOrderRecurrencePHIRecipes where the incoming values are the same
can be simplified and removed.
Fixes https://github.com/llvm/llvm-project/issues/144212.
The new test is added together with other related tests from
first-order-recurrence.ll
Commit: 4bcf9732c7361b3ea5208ced592245e0302fc7a2
https://github.com/llvm/llvm-project/commit/4bcf9732c7361b3ea5208ced592245e0302fc7a2
Author: Morris Hafner <mmha at users.noreply.github.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/test/CIR/CodeGen/builtin_call.cpp
A clang/test/CIR/CodeGen/builtin_printf.cpp
Log Message:
-----------
[CIR] Add Support For Library Builtins (#143984)
This patch upstreams support for builtins that map to a standard library
function. Examples would be abort() and printf().
It also fixes a minor issue with the errorNYI for all remaining
unimplemented builtins using the mlir::Location instead of the clang AST
SourceLocation.
Commit: 2488f26d15e7e12aef9ead3fcb2d1b6da51812fb
https://github.com/llvm/llvm-project/commit/2488f26d15e7e12aef9ead3fcb2d1b6da51812fb
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/epilog-unwind.c
M clang/test/Driver/cl-options.c
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/lib/IR/Module.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV2.cpp
A llvm/test/CodeGen/X86/win64-eh-unwindv2-errors.mir
A llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-epilogs.mir
Log Message:
-----------
[win][x64] Unwind v2 3/n: Add support for requiring unwind v2 to be used (equivalent to MSVC's /d2epilogunwindrequirev2) (#143577)
#129142 added support for emitting Windows x64 unwind v2 information,
but it was "best effort". If any function didn't follow the requirements
for v2 it was silently downgraded to v1.
There are some parts of Windows (specifically kernel-mode code running
on Xbox) that require v2, hence we need the ability to fail the
compilation if v2 can't be used.
This change also adds a heuristic to check if there might be too many
unwind codes, it's currently conservative (i.e., assumes that certain
prolog instructions will use the maximum number of unwind codes).
Future work: attempting to chain unwind info across multiple tables if
there are too many unwind codes due to epilogs and adding a heuristic to
detect if an epilog will be too far from the end of the function.
Commit: 98eee4b554be18f734088455cb4cd9dc634e7602
https://github.com/llvm/llvm-project/commit/98eee4b554be18f734088455cb4cd9dc634e7602
Author: sribee8 <145801438+sribee8 at users.noreply.github.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M libc/src/__support/wchar/character_converter.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/wchar/CMakeLists.txt
A libc/test/src/__support/wchar/utf8_to_32_test.cpp
Log Message:
-----------
[libc] utf8 to 32 CharacterConverter (#143973)
Implemented push and pop for utf8 to 32 conversion and tests.
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: 6e124423546e5d22b4b6dc64d6cedfe93e627d58
https://github.com/llvm/llvm-project/commit/6e124423546e5d22b4b6dc64d6cedfe93e627d58
Author: sribee8 <145801438+sribee8 at users.noreply.github.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M libc/src/__support/wchar/character_converter.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/wchar/CMakeLists.txt
R libc/test/src/__support/wchar/utf8_to_32_test.cpp
Log Message:
-----------
Revert "[libc] utf8 to 32 CharacterConverter" (#144446)
Reverts llvm/llvm-project#143973
This merge broke the build and I'm currently looking into the issue to
fix it.
Commit: 99e53cb4139eda491f97cb33ee42ea424d352200
https://github.com/llvm/llvm-project/commit/99e53cb4139eda491f97cb33ee42ea424d352200
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/StackProtector.cpp
A llvm/test/Transforms/StackProtector/cross-dso-cfi-stack-chk-fail.ll
A llvm/test/Transforms/StackProtector/stack-chk-fail-alias.ll
Log Message:
-----------
[llvm][StackProtector] Add noreturn to __stack_chk_fail call (#143976)
It's possible for __stack_chk_fail to be an alias when using CrossDSOCFI
since it will make a jump table entry for this function and replace it
with an alias. StackProtector can crash since it always expects this to
be a regular function. Instead add the noreturn attribute to the call.
Commit: 964888d01f0b0f81540f8548370f00c315952042
https://github.com/llvm/llvm-project/commit/964888d01f0b0f81540f8548370f00c315952042
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
A llvm/test/Transforms/LowerTypeTests/Inputs/import-thinlto-funcs.yaml
M llvm/test/Transforms/LowerTypeTests/cfi-coff-comdat-rename.ll
Log Message:
-----------
[llvm][CFI] Ensure COFF comdat renaming applies for imported functions (#143421)
I ran into the same issue as
https://github.com/llvm/llvm-project/pull/139962 regarding the comdat
corresponding to a renamed key function but for thinlto. My last patch
had not considered the thinlto case, so this applies the same fix for
imported functions.
Commit: ac7af53d05b94849fd590b1875db7b85957fb0f6
https://github.com/llvm/llvm-project/commit/ac7af53d05b94849fd590b1875db7b85957fb0f6
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M flang/test/Semantics/modfile71.F90
M flang/test/Semantics/modfile75.F90
M flang/test/Semantics/modfile76.F90
M flang/test/Semantics/modfile77.F90
M flang/test/Semantics/modfile78.F90
M flang/test/Semantics/modfile79.F90
Log Message:
-----------
[flang] Fixed LIT tests to create modfiles in a temp dir. (#144448)
Commit: d882670d498a29f4e02f357ef9fe07c43de034c8
https://github.com/llvm/llvm-project/commit/d882670d498a29f4e02f357ef9fe07c43de034c8
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/StackProtector.cpp
R llvm/test/Transforms/StackProtector/cross-dso-cfi-stack-chk-fail.ll
R llvm/test/Transforms/StackProtector/stack-chk-fail-alias.ll
Log Message:
-----------
Revert "[llvm][StackProtector] Add noreturn to __stack_chk_fail call" (#144452)
Reverts llvm/llvm-project#143976
Reverting since this broke a builder:
https://lab.llvm.org/buildbot/#/builders/190/builds/21563
Commit: 6421bd94eabdb71975c75e2c1621a095b3d8b6ad
https://github.com/llvm/llvm-project/commit/6421bd94eabdb71975c75e2c1621a095b3d8b6ad
Author: John Harrison <harjohn at google.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setExceptionBreakpoints.py
M lldb/test/API/tools/lldb-dap/exception/objc/Makefile
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
M lldb/test/API/tools/lldb-dap/exception/objc/main.m
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/ExceptionBreakpoint.cpp
M lldb/tools/lldb-dap/ExceptionBreakpoint.h
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/SetExceptionBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/ProtocolUtils.cpp
M lldb/tools/lldb-dap/ProtocolUtils.h
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb-dap] Creating protocol types for setExceptionBreakpoints. (#144153)
This adds new types for setExceptionBreakpoints and adds support for
`supportsExceptionFilterOptions`, which allows exception breakpoints to
set a condition.
While testing this, I noticed that obj-c exception catch breakpoints may
not be working correctly in lldb-dap.
Commit: 97bfb936af4077e8cb6c75664231f27a9989d563
https://github.com/llvm/llvm-project/commit/97bfb936af4077e8cb6c75664231f27a9989d563
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
DAG: Move soft float predicate management into RuntimeLibcalls (#142905)
Work towards making RuntimeLibcalls the centralized location for
all libcall information. This requires changing the encoding from
tracking the ISD::CondCode to using CmpInst::Predicate.
Commit: 1ffd9f553ccba27c0def5f38e7928af8f3976bac
https://github.com/llvm/llvm-project/commit/1ffd9f553ccba27c0def5f38e7928af8f3976bac
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/lib/IR/RuntimeLibcalls.cpp
Log Message:
-----------
RuntimeLibcalls: Cleanup sincos predicate functions (#143081)
The darwinHasSinCos wasn't actually used for sincos, only the stret
variant. Rename this to reflect that, and introduce a new one for
enabling sincos.
Commit: 9bd234a4330c6882f23ebf1f7861c5ec97e74d95
https://github.com/llvm/llvm-project/commit/9bd234a4330c6882f23ebf1f7861c5ec97e74d95
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
AArch64: Move outline atomic libcalls configuration (#144374)
This de-conditionalizes the setting of the libcall names
on outlineAtomics() && !hasLSE(). The existence of the
libcall is a module level property, which cannot depend on the
subtarget so this is fine. It's better if the initial list of
calls has more entries than will be used than to have missing
ones. There aren't any alternative names set, so this is also
fine.
Currently RuntimeLibcallsInfo conflates the existence of the calls
with the lowering usage decision, so this suboptimally will report
the libcall name on subtargets that should not use the calls. This
doesn't matter in this case though, as the atomic lowering actions
are already separately controlled and aren't based on decisions on
libcall availability. We could be paranoid and clear the names in
TargetLowering.
Also fixes not catching all aarch64 triples in the RuntimeLibcallsInfo
construction; the previous check missed aarch64_be.
Commit: 24631e5440eed3093dfb52e7a631504b71845923
https://github.com/llvm/llvm-project/commit/24631e5440eed3093dfb52e7a631504b71845923
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/CodeGen/AArch64/arm64ec-builtins.ll
Log Message:
-----------
AArch64: Fix outline atomic libcall names for arm64ec (#144378)
Add a missing # prefix to each libcall name
Commit: 6e8cf9c63f643768a1d54a9ce2a73a570429c4bc
https://github.com/llvm/llvm-project/commit/6e8cf9c63f643768a1d54a9ce2a73a570429c4bc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64ec-builtins.ll
Log Message:
-----------
AArch64: Add arm64ec libcall tests for __arm_sc_* functions (#144356)
Commit: d4e2c0b359ea90236fd1b62791a04fb845f5d9f3
https://github.com/llvm/llvm-project/commit/d4e2c0b359ea90236fd1b62791a04fb845f5d9f3
Author: Bryan Chan <bryan.chan at huawei.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/test/Driver/android-link.cpp
Log Message:
-----------
[Driver] Add options to control workaround for Cortex-A53 Erratum 843419 (#143915)
Implement the -mfix-cortex-a53-843419 and -mno-fix-cortex-a53-843419 options,
which have been introduced to GCC to allow the user to control the workaround
for the erratum. If the option is enabled (which is the default, unchanged by
this patch), Clang passes --fix-cortex-a53-843419 to the linker when it cannot
ensure that the target is not a Cortex A53, otherwise it doesn't.
See https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#index-mfix-cortex-a53-843419
for information on the GCC options.
Commit: 8b1528fad99a18d2e094968f1341efb3048a23da
https://github.com/llvm/llvm-project/commit/8b1528fad99a18d2e094968f1341efb3048a23da
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/lib/IR/RuntimeLibcalls.cpp
Log Message:
-----------
RuntimeLibcalls: Use array initializers for default values (#143082)
Commit: f626620e33ba2c76ba226ecaeb09c320b60aa4d9
https://github.com/llvm/llvm-project/commit/f626620e33ba2c76ba226ecaeb09c320b60aa4d9
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.h
Log Message:
-----------
[LLVM][TableGen] Use `StringRef` for CodeGenInstruction::AsmString (#144440)
Commit: 2e3d212e40bc6fca9fbe53978a87c901eb19a01d
https://github.com/llvm/llvm-project/commit/2e3d212e40bc6fca9fbe53978a87c901eb19a01d
Author: Jinyang He <hejinyang at loongson.cn>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/test/MC/LoongArch/Misc/cfi-advance.s
M llvm/test/MC/LoongArch/Relocations/fde-reloc.s
M llvm/test/MC/LoongArch/Relocations/sub-expr.s
Log Message:
-----------
[LoongArch] Allow difference across sections (#141722)
For SecA != SecB but SecB is current section, fallback for pcrel{64,32}
relocations. For linker relaxation being disabled and SecA == SecB,
return directly for avoid record relocations. In other cases, record
relocations which also allows across sections.
Commit: ab7aaaca93a0670e96a454136bb9cf13bb1ae372
https://github.com/llvm/llvm-project/commit/ab7aaaca93a0670e96a454136bb9cf13bb1ae372
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M flang/test/Semantics/modfile75.F90
Log Message:
-----------
[flang][tests] Remove stale module files to fix buildbots.
Commit: 9093bc7eff33b002d7f16d4d62ff1af2a5a993f8
https://github.com/llvm/llvm-project/commit/9093bc7eff33b002d7f16d4d62ff1af2a5a993f8
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
A llvm/test/tools/llvm-exegesis/RISCV/unsupported-opcode.test
M llvm/tools/llvm-exegesis/lib/Target.cpp
Log Message:
-----------
[llvm-exegesis] Ignore the instructions for which InstrDesc.getSchedClass() == 0 (#143840)
This allows llvm-exegesis to skip instructions that lack scheduling
information, avoiding invalid benchmarking. e.g. `InstB` in RISC-V.
Commit: 602c3089f749ec3b61b93652ea9eb5947a61bcf2
https://github.com/llvm/llvm-project/commit/602c3089f749ec3b61b93652ea9eb5947a61bcf2
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M llvm/include/llvm/TargetParser/SubtargetFeature.h
Log Message:
-----------
[TargetParser] Increase MAX_SUBTARGET_FEATURES to 384 (#144326)
There are 314 features in RISC-V backend, which is about to exceed
the maxinum 320 as there are some ongoing new extensions.
We increase the `MAX_SUBTARGET_FEATURES` to 384 so that we won't
surprise anyone.
Commit: a02afb0def589ec28f8240ff15760e5f241b833c
https://github.com/llvm/llvm-project/commit/a02afb0def589ec28f8240ff15760e5f241b833c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.h
Log Message:
-----------
AVR: Migrate to the new relocation specifier representation
Define printImpl and evaluateAsRelocationImpl within AVRMCAsmInfo.
Commit: 199428e0472c80d9b742d0a3e492ab902005fb6a
https://github.com/llvm/llvm-project/commit/199428e0472c80d9b742d0a3e492ab902005fb6a
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lld/BUILD.bazel
Log Message:
-----------
[bazel][lld] Remove unneeded dependencies. (#144455)
As far as I can tell these are not used in any includes in their
respective targets, and building all of LLD with
```
bazel build --config=generic_clang @llvm-project//lld/...
```
still works.
Commit: 30350afd023c4e9583d5a8bbfd56af7c354923fa
https://github.com/llvm/llvm-project/commit/30350afd023c4e9583d5a8bbfd56af7c354923fa
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
Log Message:
-----------
MCSpecifierExpr: Remove unused virtual functions
... now that all targets using MCSpecifierExpr have migrated to
XXXMCAsmInfo::printExpr/evaluateAsRelocatableImpl.
Commit: 7caeec599998bd8aa01d498574e148e4e9c982db
https://github.com/llvm/llvm-project/commit/7caeec599998bd8aa01d498574e148e4e9c982db
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
Log Message:
-----------
[NFC][flang][OpenMP] Unify `genSectionsOp`'s prototype to match other `genXXXOp` functions (#144013)
Unifies the prototype of `genSectionsOp` to match other ops generators.
Doing so, we are able to call `genSectionsOp` directtly from
`genOMPDispatch` instead of the special handling needed now to pass the
section blocks. This is useful because now we can handle symbol mapping
scopes easier for nested OpenMP directives. See
https://github.com/llvm/llvm-project/pull/143706#issuecomment-2965344723
and the following discussion for more info.
Commit: b5dbf8210a57b986b9802304745f4c5c108cf37b
https://github.com/llvm/llvm-project/commit/b5dbf8210a57b986b9802304745f4c5c108cf37b
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
Log Message:
-----------
[flang] Enable delayed localization by default for `do concurrent` (#144074)
Reintroduces changes from
https://github.com/llvm/llvm-project/issues/143897. A fix for the
reported problem in https://github.com/llvm/llvm-project/issues/143897
is hopefully resolved in
https://github.com/llvm/llvm-project/pull/144027.
This PR aims to make it easier and more self-contained to revert the
switch/flag if we discover any problems with enabling it by default.
Commit: 2dc58e02cbce83784a38b4cc33f83529ad1a7c7e
https://github.com/llvm/llvm-project/commit/2dc58e02cbce83784a38b4cc33f83529ad1a7c7e
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/target-parallel-private.f90
R flang/test/Lower/OpenMP/Todo/target-teams-private.f90
A flang/test/Lower/OpenMP/target-parallel-private.f90
A flang/test/Lower/OpenMP/target-teams-private.f90
Log Message:
-----------
[flang][OpenMP] Add symbol table scopes for `teams` and `parallel` (#144015)
Adds symbol map scopes for standalone `teams` and `parallel` constructs.
This is required to properly bind the privatized symbols in both
constructs so that nested constructs can find them.
Resolves https://github.com/llvm/llvm-project/issues/116428.
Commit: 84d879d6999b61cea3f9f200df57653f5a51ee41
https://github.com/llvm/llvm-project/commit/84d879d6999b61cea3f9f200df57653f5a51ee41
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/RISCV_nonstandard.def
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
Log Message:
-----------
[RISCV] Rename Relocation QC_E_JUMP_PLT to QC_E_CALL_PLT (#143998)
The semantics and definition of this relocation are unchanged. The new
name reflects that instructions with the relocation should be assumed to
clobber non-callee-saved registers, as with the R_RISCV_CALL_PLT
relocation.
The name was changed in v0.2 of the ABI extensions:
https://github.com/quic/riscv-elf-psabi-quic-extensions/releases/tag/v0.2
Commit: c0ac95181eededc85027d63fe9f97bc742b7a552
https://github.com/llvm/llvm-project/commit/c0ac95181eededc85027d63fe9f97bc742b7a552
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Update Xqci to v0.13.0 (#144398)
Commit: 98c6c371d6dc09454d541474ef65a0e47c4baae6
https://github.com/llvm/llvm-project/commit/98c6c371d6dc09454d541474ef65a0e47c4baae6
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Xqccmp v0.3 (#137854)
All the changes for v0.2 and v0.3 are either already implemented, or
irrelevant to the compiler implementation.
Commit: e86740e6003739a41139d94e1643a3207f8fd8f8
https://github.com/llvm/llvm-project/commit/e86740e6003739a41139d94e1643a3207f8fd8f8
Author: no92 <no92 at users.noreply.github.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
A clang/lib/Driver/ToolChains/Managarm.cpp
A clang/lib/Driver/ToolChains/Managarm.h
M clang/lib/Lex/InitHeaderSearch.cpp
A clang/test/Driver/Inputs/basic_managarm_tree/lib/aarch64-managarm-mlibc/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/lib/riscv64-managarm-mlibc/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/lib/x86_64-managarm-mlibc/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/lib64/aarch64-managarm-mlibc/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/lib64/riscv64-managarm-mlibc/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/lib64/x86_64-managarm-mlibc/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/usr/include/aarch64-managarm-mlibc/c++/10/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/usr/include/c++/10/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/usr/include/c++/v1/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/usr/include/riscv64-managarm-mlibc/c++/10/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/usr/include/x86_64-managarm-mlibc/c++/10/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/aarch64-managarm-mlibc/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/gcc/aarch64-managarm-mlibc/10/crtbegin.o
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/gcc/aarch64-managarm-mlibc/10/crtbeginS.o
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/gcc/aarch64-managarm-mlibc/10/crtbeginT.o
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/gcc/riscv64-managarm-mlibc/10/crtbegin.o
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/gcc/riscv64-managarm-mlibc/10/crtbeginS.o
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/gcc/riscv64-managarm-mlibc/10/crtbeginT.o
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/gcc/x86_64-managarm-mlibc/10/crtbegin.o
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/gcc/x86_64-managarm-mlibc/10/crtbeginS.o
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/gcc/x86_64-managarm-mlibc/10/crtbeginT.o
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/riscv64-managarm-mlibc/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib/x86_64-managarm-mlibc/.keep
A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib64/.keep
A clang/test/Driver/managarm.cpp
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/predefined-macros-no-warnings.c
Log Message:
-----------
[clang] Add managarm support (#139271)
This PR is part of a series to upstream managarm support, as laid out in
the
[RFC](https://discourse.llvm.org/t/rfc-new-proposed-managarm-support-for-llvm-and-clang-87845/85884/1).
This PR is a follow-up to #87845 and #138854.
Commit: 41b9d28327bf20befe63a683b2a2f90670837b2f
https://github.com/llvm/llvm-project/commit/41b9d28327bf20befe63a683b2a2f90670837b2f
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-06-17 (Tue, 17 Jun 2025)
Changed paths:
M bolt/test/lit.local.cfg
Log Message:
-----------
[BOLT][NFC] Using target_triple in lit config (#144078)
Commit: 7e6c1bd3edf4fc19be70587a4ac33a76bab78c02
https://github.com/llvm/llvm-project/commit/7e6c1bd3edf4fc19be70587a4ac33a76bab78c02
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT][NFCI] Simplify DataAggregator using traces (#143289)
Consistently apply traces as defined in #127125 for branch profile
aggregation. This combines branches and fall-through records into one.
With large input binaries/profiles, the speed up in aggregation time
(`-time-aggr`, wall time):
- perf.data, pre-BOLT input: 154.5528s -> 144.0767s
- pre-aggregated data, pre-BOLT input: 15.1026s -> 9.0711s
- pre-aggregated data, BOLTed input: 15.4871s -> 10.0077s
Test Plan: NFC
Commit: 9cd48ed94de694cc3c2d1d800e8f43768bfad628
https://github.com/llvm/llvm-project/commit/9cd48ed94de694cc3c2d1d800e8f43768bfad628
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Utils/CMakeLists.txt
M bolt/test/lit.local.cfg
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang-tools-extra/modularize/Modularize.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
A clang-tools-extra/test/clang-reorder-fields/MacroExpansionField.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
A clang/lib/Driver/ToolChains/Managarm.cpp
A clang/lib/Driver/ToolChains/Managarm.h
M clang/lib/Edit/EditedSource.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/InstallAPI/DiagnosticBuilderWrappers.cpp
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/InstallAPI/FileList.cpp
M clang/lib/InstallAPI/Frontend.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Interpreter/Value.cpp
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Parse/CMakeLists.txt
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/lib/Tooling/ArgumentsAdjusters.cpp
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/CIR/CodeGen/builtin_call.cpp
A clang/test/CIR/CodeGen/builtin_printf.cpp
M clang/test/CIR/CodeGen/complex.cpp
A clang/test/CIR/Transforms/vector-cmp-fold.cir
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vslideup.c
M clang/test/CodeGen/X86/avx-cxx-record.cpp
A clang/test/CodeGen/aarch64-always-inline-feature-bug.c
M clang/test/CodeGen/epilog-unwind.c
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/ArrayTemporary.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/ArrayOutputArguments.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/InitLists.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/OutputArguments.hlsl
M clang/test/CodeGenHLSL/Bool.hlsl
M clang/test/CodeGenHLSL/BoolVector.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/basic_types.hlsl
M clang/test/CodeGenHLSL/builtins/AddUint64.hlsl
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/GroupMemoryBarrierWithGroupSync.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/abs.hlsl
M clang/test/CodeGenHLSL/builtins/all.hlsl
M clang/test/CodeGenHLSL/builtins/and.hlsl
M clang/test/CodeGenHLSL/builtins/any.hlsl
M clang/test/CodeGenHLSL/builtins/ceil-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/ceil.hlsl
M clang/test/CodeGenHLSL/builtins/clamp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/clamp.hlsl
M clang/test/CodeGenHLSL/builtins/clip-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/clip.hlsl
M clang/test/CodeGenHLSL/builtins/cos-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/cos.hlsl
M clang/test/CodeGenHLSL/builtins/cross.hlsl
M clang/test/CodeGenHLSL/builtins/degrees-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/degrees.hlsl
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/exp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/exp.hlsl
M clang/test/CodeGenHLSL/builtins/exp2-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/exp2.hlsl
M clang/test/CodeGenHLSL/builtins/floor-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/floor.hlsl
M clang/test/CodeGenHLSL/builtins/fmod.hlsl
M clang/test/CodeGenHLSL/builtins/frac-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/frac.hlsl
M clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
M clang/test/CodeGenHLSL/builtins/isinf-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/isinf.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/lerp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/log-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/log.hlsl
M clang/test/CodeGenHLSL/builtins/log10-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/log10.hlsl
M clang/test/CodeGenHLSL/builtins/log2-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/log2.hlsl
M clang/test/CodeGenHLSL/builtins/max-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/max.hlsl
M clang/test/CodeGenHLSL/builtins/min-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/min.hlsl
M clang/test/CodeGenHLSL/builtins/normalize-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/normalize.hlsl
M clang/test/CodeGenHLSL/builtins/or.hlsl
M clang/test/CodeGenHLSL/builtins/pow-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/pow.hlsl
M clang/test/CodeGenHLSL/builtins/radians-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/radians.hlsl
M clang/test/CodeGenHLSL/builtins/rcp.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/reversebits.hlsl
M clang/test/CodeGenHLSL/builtins/round-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/round.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
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A clang/test/Driver/Inputs/basic_managarm_tree/usr/lib64/.keep
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A clang/test/Parser/cxx-invalid-using-decl-in-constexpr-crash.cpp
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M clang/test/Preprocessor/predefined-macros-no-warnings.c
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A clang/test/SemaCXX/trivially-relocatable-ptrauth.cpp
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A flang-rt/include/flang-rt/runtime/work-queue.h
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A flang-rt/lib/runtime/work-queue.cpp
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M lld/ELF/Arch/ARM.cpp
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M lld/ELF/Driver.cpp
M lld/ELF/SyntheticSections.cpp
M lld/MachO/SyntheticSections.cpp
M lld/test/ELF/riscv-feature-zicfilp-func-sig.s
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M lldb/tools/lldb-dap/ExceptionBreakpoint.cpp
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M llvm/lib/Target/DirectX/DXILFinalizeLinkage.cpp
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
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M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsMCInstLower.h
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXMCExpr.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
R llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcTargetObjectFile.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.h
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEMCInstLower.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86FixupInstTuning.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV2.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
R llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/CostModel/RISCV/cast-half.ll
M llvm/test/Analysis/CostModel/RISCV/cast.ll
M llvm/test/Analysis/CostModel/RISCV/cmp.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
A llvm/test/CodeGen/AArch64/aarch64-bitwisenot-fold.ll
A llvm/test/CodeGen/AArch64/arm64ec-builtins.ll
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-partial-reduce.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-wide-add.ll
R llvm/test/CodeGen/AMDGPU/promote-alloca-structs.ll
M llvm/test/CodeGen/DirectX/finalize-linkage-remove-dead-lib.ll
M llvm/test/CodeGen/DirectX/finalize-linkage-remove-dead.ll
M llvm/test/CodeGen/DirectX/finalize_linkage.ll
M llvm/test/CodeGen/DirectX/flatten-array.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/LoongArch/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll
M llvm/test/CodeGen/Mips/llvm-ir/load.ll
M llvm/test/CodeGen/Mips/llvm-ir/store.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/vrgatherei16.ll
M llvm/test/CodeGen/RISCV/rvv/vslidedown.ll
M llvm/test/CodeGen/RISCV/rvv/vslideup.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
M llvm/test/CodeGen/X86/combine-or-shuffle.ll
M llvm/test/CodeGen/X86/dpbusd.ll
M llvm/test/CodeGen/X86/dpbusd_const.ll
M llvm/test/CodeGen/X86/fixup-blend.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll
M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
M llvm/test/CodeGen/X86/vector-reduce-add-zext.ll
M llvm/test/CodeGen/X86/vector-reduce-add.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv2-errors.mir
A llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-epilogs.mir
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
A llvm/test/DebugInfo/AMDGPU/dwarfdump-rel.yaml
A llvm/test/DebugInfo/X86/DW_AT_object_pointer-non-standard-index.ll
M llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
M llvm/test/MC/Lanai/conditional_inst.s
M llvm/test/MC/Lanai/memory.s
M llvm/test/MC/LoongArch/Misc/cfi-advance.s
M llvm/test/MC/LoongArch/Relocations/fde-reloc.s
M llvm/test/MC/LoongArch/Relocations/sub-expr.s
M llvm/test/MC/RISCV/xqcilsm-invalid.s
A llvm/test/Transforms/Attributor/AMDGPU/tag-invariant-loads.ll
M llvm/test/Transforms/Attributor/dereferenceable-1.ll
M llvm/test/Transforms/Attributor/value-simplify-local-remote.ll
A llvm/test/Transforms/IndVarSimplify/simplify-icmp-operands-order.ll
M llvm/test/Transforms/InstCombine/double-float-shrink-2.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
A llvm/test/Transforms/InstCombine/icmp-subadd.ll
M llvm/test/Transforms/InstCombine/logical-select.ll
A llvm/test/Transforms/InstCombine/trunc-lshr.ll
M llvm/test/Transforms/InstSimplify/vp-reverse.ll
A llvm/test/Transforms/LoopStrengthReduce/AArch64/postidx-load.ll
A llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-no-remaining-iterations.ll
A llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
A llvm/test/Transforms/LoopVectorize/first-order-recurrence-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
A llvm/test/Transforms/LowerTypeTests/Inputs/import-thinlto-funcs.yaml
M llvm/test/Transforms/LowerTypeTests/cfi-coff-comdat-rename.ll
M llvm/test/tools/llvm-dwarfdump/X86/statistics.ll
A llvm/test/tools/llvm-exegesis/RISCV/unsupported-opcode.test
M llvm/test/tools/llvm-mca/RISCV/Andes45/gpr.s
M llvm/test/tools/llvm-objcopy/MachO/strip-with-encryption-info.test
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/unittests/Frontend/HLSLRootSignatureDumpTest.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.h
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/Common/DAGISelMatcher.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/Common/PredicateExpander.h
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/X86DisassemblerTables.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn
M mlir/docs/DefiningDialects/Constraints.md
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/include/mlir/Dialect/Tensor/Utils/Utils.h
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/include/mlir/IR/Constraints.td
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVGLCanonicalization.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/python/mlir/dialects/transform/__init__.py
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/ops.mlir
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Dialect/SPIRV/Transforms/gl-canonicalize.mlir
M mlir/test/Dialect/Transform/test-pass-application.mlir
M mlir/test/Dialect/Vector/scalar-vector-transfer-to-memref.mlir
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/Target/LLVMIR/omptarget-depend.mlir
M mlir/test/Target/LLVMIR/omptarget-nowait-llvm.mlir
A mlir/test/Target/LLVMIR/omptarget-nowait.mlir
M mlir/test/Target/LLVMIR/omptargetdata-nowait-llvm.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
A mlir/test/mlir-tblgen/attr-constraints.td
M mlir/test/python/dialects/transform.py
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M utils/bazel/llvm-project-overlay/lld/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Commit: f7754e947cb6a12c6b34aa42d7a161802ba9800e
https://github.com/llvm/llvm-project/commit/f7754e947cb6a12c6b34aa42d7a161802ba9800e
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Utils/CMakeLists.txt
M bolt/test/lit.local.cfg
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang-tools-extra/modularize/Modularize.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
A clang-tools-extra/test/clang-reorder-fields/MacroExpansionField.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
A clang/lib/Driver/ToolChains/Managarm.cpp
A clang/lib/Driver/ToolChains/Managarm.h
M clang/lib/Edit/EditedSource.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/InstallAPI/DiagnosticBuilderWrappers.cpp
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/InstallAPI/FileList.cpp
M clang/lib/InstallAPI/Frontend.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Interpreter/Value.cpp
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Parse/CMakeLists.txt
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/lib/Tooling/ArgumentsAdjusters.cpp
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/CIR/CodeGen/builtin_call.cpp
A clang/test/CIR/CodeGen/builtin_printf.cpp
M clang/test/CIR/CodeGen/complex.cpp
A clang/test/CIR/Transforms/vector-cmp-fold.cir
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslideup.c
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M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCInst.cpp
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.h
M llvm/lib/ObjCopy/MachO/MachOReader.cpp
M llvm/lib/Object/RelocationResolver.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
R llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
R llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRDevices.td
M llvm/lib/Target/AVR/AVRMCInstLower.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.h
M llvm/lib/Target/DirectX/DXILFinalizeLinkage.cpp
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
R llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.cpp
R llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.h
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.h
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsMCInstLower.h
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXMCExpr.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
R llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcTargetObjectFile.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.h
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEMCInstLower.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86FixupInstTuning.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV2.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
R llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/CostModel/RISCV/cast-half.ll
M llvm/test/Analysis/CostModel/RISCV/cast.ll
M llvm/test/Analysis/CostModel/RISCV/cmp.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
A llvm/test/CodeGen/AArch64/aarch64-bitwisenot-fold.ll
A llvm/test/CodeGen/AArch64/arm64ec-builtins.ll
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-partial-reduce.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-wide-add.ll
R llvm/test/CodeGen/AMDGPU/promote-alloca-structs.ll
M llvm/test/CodeGen/DirectX/finalize-linkage-remove-dead-lib.ll
M llvm/test/CodeGen/DirectX/finalize-linkage-remove-dead.ll
M llvm/test/CodeGen/DirectX/finalize_linkage.ll
M llvm/test/CodeGen/DirectX/flatten-array.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/LoongArch/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll
M llvm/test/CodeGen/Mips/llvm-ir/load.ll
M llvm/test/CodeGen/Mips/llvm-ir/store.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/vrgatherei16.ll
M llvm/test/CodeGen/RISCV/rvv/vslidedown.ll
M llvm/test/CodeGen/RISCV/rvv/vslideup.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
M llvm/test/CodeGen/X86/combine-or-shuffle.ll
M llvm/test/CodeGen/X86/dpbusd.ll
M llvm/test/CodeGen/X86/dpbusd_const.ll
M llvm/test/CodeGen/X86/fixup-blend.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll
M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
M llvm/test/CodeGen/X86/vector-reduce-add-zext.ll
M llvm/test/CodeGen/X86/vector-reduce-add.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv2-errors.mir
A llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-epilogs.mir
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
A llvm/test/DebugInfo/AMDGPU/dwarfdump-rel.yaml
A llvm/test/DebugInfo/X86/DW_AT_object_pointer-non-standard-index.ll
M llvm/test/DebugInfo/X86/DW_AT_object_pointer.ll
M llvm/test/MC/Lanai/conditional_inst.s
M llvm/test/MC/Lanai/memory.s
M llvm/test/MC/LoongArch/Misc/cfi-advance.s
M llvm/test/MC/LoongArch/Relocations/fde-reloc.s
M llvm/test/MC/LoongArch/Relocations/sub-expr.s
M llvm/test/MC/RISCV/xqcilsm-invalid.s
A llvm/test/Transforms/Attributor/AMDGPU/tag-invariant-loads.ll
M llvm/test/Transforms/Attributor/dereferenceable-1.ll
M llvm/test/Transforms/Attributor/value-simplify-local-remote.ll
A llvm/test/Transforms/IndVarSimplify/simplify-icmp-operands-order.ll
M llvm/test/Transforms/InstCombine/double-float-shrink-2.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
A llvm/test/Transforms/InstCombine/icmp-subadd.ll
M llvm/test/Transforms/InstCombine/logical-select.ll
A llvm/test/Transforms/InstCombine/trunc-lshr.ll
M llvm/test/Transforms/InstSimplify/vp-reverse.ll
A llvm/test/Transforms/LoopStrengthReduce/AArch64/postidx-load.ll
A llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-no-remaining-iterations.ll
A llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/check-prof-info.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
A llvm/test/Transforms/LoopVectorize/first-order-recurrence-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
A llvm/test/Transforms/LowerTypeTests/Inputs/import-thinlto-funcs.yaml
M llvm/test/Transforms/LowerTypeTests/cfi-coff-comdat-rename.ll
M llvm/test/tools/llvm-dwarfdump/X86/statistics.ll
A llvm/test/tools/llvm-exegesis/RISCV/unsupported-opcode.test
M llvm/test/tools/llvm-mca/RISCV/Andes45/gpr.s
M llvm/test/tools/llvm-objcopy/MachO/strip-with-encryption-info.test
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/unittests/Frontend/HLSLRootSignatureDumpTest.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.h
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/CodeGenSchedule.h
M llvm/utils/TableGen/Common/DAGISelMatcher.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/Common/PredicateExpander.h
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/X86DisassemblerTables.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn
M mlir/docs/DefiningDialects/Constraints.md
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/include/mlir/Dialect/Tensor/Utils/Utils.h
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/include/mlir/IR/Constraints.td
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVGLCanonicalization.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/python/mlir/dialects/transform/__init__.py
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/ops.mlir
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Dialect/SPIRV/Transforms/gl-canonicalize.mlir
M mlir/test/Dialect/Transform/test-pass-application.mlir
M mlir/test/Dialect/Vector/scalar-vector-transfer-to-memref.mlir
M mlir/test/Dialect/XeGPU/xegpu-unroll-patterns.mlir
M mlir/test/Target/LLVMIR/omptarget-depend.mlir
M mlir/test/Target/LLVMIR/omptarget-nowait-llvm.mlir
A mlir/test/Target/LLVMIR/omptarget-nowait.mlir
M mlir/test/Target/LLVMIR/omptargetdata-nowait-llvm.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
A mlir/test/mlir-tblgen/attr-constraints.td
M mlir/test/python/dialects/transform.py
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M utils/bazel/llvm-project-overlay/lld/BUILD.bazel
Log Message:
-----------
rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/1448bf466d86...f7754e947cb6
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