[all-commits] [llvm/llvm-project] 147a4c: [rtsan] Fix issue where close test would lead to c...
Amir Ayupov via All-commits
all-commits at lists.llvm.org
Mon Jun 16 13:29:56 PDT 2025
Branch: refs/heads/users/aaupov/spr/boltnfci-simplify-dataaggregator-using-traces-1
Home: https://github.com/llvm/llvm-project
Commit: 147a4c7743c44af3537bae69dcf513153b03b00e
https://github.com/llvm/llvm-project/commit/147a4c7743c44af3537bae69dcf513153b03b00e
Author: Chris Apple <cja-private at pm.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Fix issue where close test would lead to crash (#144017)
Commit: b983431c281a0acb9e446c7c9d72474f4d09e8e0
https://github.com/llvm/llvm-project/commit/b983431c281a0acb9e446c7c9d72474f4d09e8e0
Author: Chris Apple <cja-private at pm.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M compiler-rt/test/rtsan/fork_exec.cpp
Log Message:
-----------
[rtsan] Fix issue when intercepted function was not execve in test (#144018)
Commit: 567647888ea3dd292827bbac445d316d6a6b0ecb
https://github.com/llvm/llvm-project/commit/567647888ea3dd292827bbac445d316d6a6b0ecb
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/cxx17.cpp
Log Message:
-----------
[clang][bytecode] Avoid revisiting decomposition decl in visitDeclRef (#144226)
This simple patch removes the code to revisit `DecompositionDecl` in
`visitDeclRef`. The revisit will try to emit the initializer of the
`DecompositionDecl`, which could result in evaluation errors if the
`DecompositionDecl` is not within a constexpr context.
Commit: 886174a835208ecd2d06b378d2094b10611030d5
https://github.com/llvm/llvm-project/commit/886174a835208ecd2d06b378d2094b10611030d5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
Log Message:
-----------
[X86] shuffle-blend.ll - regenerate test checks
Commit: 2669664605d00e1b3a9c479545b95a6844786d0c
https://github.com/llvm/llvm-project/commit/2669664605d00e1b3a9c479545b95a6844786d0c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang-tools-extra/modularize/Modularize.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
Log Message:
-----------
[modularize] Use range-based for loops (NFC) (#144244)
Commit: fef5df9d843745b2c4ed163911ed1305028350ca
https://github.com/llvm/llvm-project/commit/fef5df9d843745b2c4ed163911ed1305028350ca
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[TableGen] Use range-based for loops (NFC) (#144250)
Commit: d78eec864c60729685487c884724f27edd53b3b8
https://github.com/llvm/llvm-project/commit/d78eec864c60729685487c884724f27edd53b3b8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/SyntheticSections.cpp
M lld/MachO/SyntheticSections.cpp
M lld/wasm/Driver.cpp
Log Message:
-----------
[lld] Use range-based for loops (NFC) (#144251)
Commit: 8f5c338b89a22abc3191a0d931071c09630d6195
https://github.com/llvm/llvm-project/commit/8f5c338b89a22abc3191a0d931071c09630d6195
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[Sema] Use a range-based for loop (NFC) (#144252)
Note that LLVM Coding Standards discourages for_each.
Commit: b16d43a874748a496da5cd774dd864c95b78d6b0
https://github.com/llvm/llvm-project/commit/b16d43a874748a496da5cd774dd864c95b78d6b0
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
Log Message:
-----------
VE: Rename VEMCExpr::VK_ to VE::S_
Prepare for removing VEMCExpr. Adopt the newer naming convention adopted
by AMDGPU/WebAssembly.
Commit: df54a2d9357fe7f56ca3c6fa2f07889449b50325
https://github.com/llvm/llvm-project/commit/df54a2d9357fe7f56ca3c6fa2f07889449b50325
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Only skip induction phis in planContainsAdditionalSimps (NFC).
Skip induction phis when checking for simplifications, as they may not
be lowered directly be lowered to a corresponding PHI recipe. Reductions
and first-order recurrences will get lowered to phi recipes, unless they
are removed. Considering them for simplifications allows removing them
if there are no remaining users.
NFC as currently reduction and recurrence phis are not
simplified/removed if dead.
Commit: 254a92d49a4c1e1f7f747b1c2f1ccbfd7f217880
https://github.com/llvm/llvm-project/commit/254a92d49a4c1e1f7f747b1c2f1ccbfd7f217880
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcTargetObjectFile.cpp
Log Message:
-----------
MC: Add MCSpecifierExpr::create
as a target-agnostic implementation to replace target-specific
XXXMCExpr::create.
Commit: 72de33a406383cb8555234c40e7b31db593e164f
https://github.com/llvm/llvm-project/commit/72de33a406383cb8555234c40e7b31db593e164f
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEMCInstLower.cpp
Log Message:
-----------
MC: Add MCAsmInfo::evaluateAsRelocatableImpl and replace VEMCExpr with MCSpecifierExpr
Expressions with specifier can only be folded during relocation
generatin. At parse time the `MCAssembler *` argument might be null, and
targets should not rely on the evaluateAsRelocatable result.
Therefore, we can move evaluateAsRelocatableImpl from MCSpecifierExpr to
MCAsmInfo, so that targets do not need to inherit from MCSpecifierExpr.
Commit: 490d7bb89a029edd037ed5e46747d0085a649ee8
https://github.com/llvm/llvm-project/commit/490d7bb89a029edd037ed5e46747d0085a649ee8
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
Log Message:
-----------
Xtensa: Remove unneeded XtensaMCExpr::create calls
MCSpecifierExpr and its subclasses should only be used with the
relocation specifier is not zero.
Commit: cf9665dd2bcef3ff2f3e22d3f44e8603f4ba9577
https://github.com/llvm/llvm-project/commit/cf9665dd2bcef3ff2f3e22d3f44e8603f4ba9577
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
R llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
Log Message:
-----------
Xtensa: Migrate to newer relocation specifier representation
* Rename specifier constants from XtensaMCExpr::Specifier::VK_ to
Xtensa::S_, following Sparc and VE.
* Use MCAsmInfo::printSpecifierExpr instead of MCExpr::print.
* Remove unneeded XtensaMCExpr. Just use MCSpecifierExpr when a
specifier is needed.
Commit: 7c22612b2948d8657b4a22ce59870ddd708c4677
https://github.com/llvm/llvm-project/commit/7c22612b2948d8657b4a22ce59870ddd708c4677
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
Log Message:
-----------
SPARC: Remove dead specifier code from asm operand printer
We don't currently print %specifier( ) for asm operands.
The old code was also incorrect - as it did not print "(".
Commit: d3e9e2d433a666d6620afb00a1533ef4937c667f
https://github.com/llvm/llvm-project/commit/d3e9e2d433a666d6620afb00a1533ef4937c667f
Author: Ross Kirsling <ross.kirsling at sony.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp
Log Message:
-----------
[Clang] Fix typo in is_replaceable diagnostic (#144247)
Adjustment to #143265; `because it not` should be `because it is not`.
Commit: 5cf138a68744904562e81436181df668b00cdb1f
https://github.com/llvm/llvm-project/commit/5cf138a68744904562e81436181df668b00cdb1f
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.h
Log Message:
-----------
M68k: Replace M68kMCExpr::VK_ to M68k::S_
Prepare for removing VEMCExpr. Adopt the newer naming convention adopted
by AMDGPU/WebAssembly/VE.
Commit: 444c6ae530e4814af2cfd6918e3f852ef14ff50d
https://github.com/llvm/llvm-project/commit/444c6ae530e4814af2cfd6918e3f852ef14ff50d
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.h
Log Message:
-----------
M68k: Remove M68kMCExpr
Commit: b839632bf44f56e6f17777857f4b23d4eccb6f33
https://github.com/llvm/llvm-project/commit/b839632bf44f56e6f17777857f4b23d4eccb6f33
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
Log Message:
-----------
PowerPC: Rename PPCMCExpr::VK_ to PPC::S_
Prepare for removing PPCMCExpr. Adopt the newer naming convention with
AMDGPU/WebAssembly/VE/M68k.
Commit: a8d76acdd88b25a98e50ac2da9e6f311fc2c2cb8
https://github.com/llvm/llvm-project/commit/a8d76acdd88b25a98e50ac2da9e6f311fc2c2cb8
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
Log Message:
-----------
PowerPC: Replace MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7a102c0052e5ae0e76ef1297902ffeb22d
Commit: 087a6ac420ad99c523b9dd517351e0c6d1f1a980
https://github.com/llvm/llvm-project/commit/087a6ac420ad99c523b9dd517351e0c6d1f1a980
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
Log Message:
-----------
[LV] Add users to some first-order recurrence tests.
Add extra users to ensure the recurrence cannot be DCE'd.
Also re-generates some checks.
Commit: 790df93298b3ad6c57dafb55fc6d18bddff16c4a
https://github.com/llvm/llvm-project/commit/790df93298b3ad6c57dafb55fc6d18bddff16c4a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
Log Message:
-----------
[VPlan] Mark VPFirstOrderRecurrencePHI as not reading/writing memory.
First-order recurrence phis don't have side-effects and don't read or
write memory. Mark them as such.
Commit: f4a63523b88631e224496435bea0940ac05897bf
https://github.com/llvm/llvm-project/commit/f4a63523b88631e224496435bea0940ac05897bf
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
Log Message:
-----------
PowerPC: Migrate to newer relocation specifier representation
* Use MCAsmInfo::printSpecifierExpr instead of MCExpr::print.
* Replace PPCMCExpr with MCSpecifierExpr.
Commit: 34c85ed2bc1adfa375745db6de7f62d350a8f768
https://github.com/llvm/llvm-project/commit/34c85ed2bc1adfa375745db6de7f62d350a8f768
Author: Vladimir Vuksanovic <109677816+vvuksanovic at users.noreply.github.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
A clang-tools-extra/test/clang-reorder-fields/MacroExpansionField.cpp
Log Message:
-----------
[clang-reorder-fields] Use expanded location for macros (#142147)
Fixes macros being replaced instead of their expansion.
Closes #52632
Commit: e448c3e5fc2ab4244356e29c9c9135b6ccf5f6ff
https://github.com/llvm/llvm-project/commit/e448c3e5fc2ab4244356e29c9c9135b6ccf5f6ff
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.h
Log Message:
-----------
LoongArch: Migrate to MCAsmInfo::printExpr
Commit: e3025c95090f74b26e36106d2aa394b213f713a1
https://github.com/llvm/llvm-project/commit/e3025c95090f74b26e36106d2aa394b213f713a1
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
RISCV: Rename RISCVMCExpr::VK_ to RISCV::S_
Prepare for removing RISCVMCExpr. Adopt the newer naming convention (S_)
used by AMDGPU/WebAssembly/VE/M68k/PowerPC.
Commit: 4635b6076dc1933b7ebd9fcca9f22ec93e2f9c0c
https://github.com/llvm/llvm-project/commit/4635b6076dc1933b7ebd9fcca9f22ec93e2f9c0c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
Log Message:
-----------
RISCV: Rename RISCVMCExpr::VK_ to RISCV::S_
Commit: fedf6c68ddfb43730578837aad394afcd97fe65a
https://github.com/llvm/llvm-project/commit/fedf6c68ddfb43730578837aad394afcd97fe65a
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
RISCV: Move RISCVMCExpr functions to RISCVMCAsmInfo or RISCVMCAsmBackend
* Move getPCRelHiFixup closer to the only caller RISCVAsmBackend::evaluateTargetFixup.
* Declare getSpecifierForName in RISCVMCAsmInfo, in align with other
targets that have migrated to the new relocation specifier representation.
Commit: 51b63bbee56c2253643f41c53bc3592af261b82d
https://github.com/llvm/llvm-project/commit/51b63bbee56c2253643f41c53bc3592af261b82d
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
RISCV: Replace MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7a102c0052e5ae0e76ef1297902ffeb22d
Commit: 4fb61c7104c3ea6b3b3313232c75261e30537821
https://github.com/llvm/llvm-project/commit/4fb61c7104c3ea6b3b3313232c75261e30537821
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang-tools-extra/modularize/Modularize.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
A clang-tools-extra/test/clang-reorder-fields/MacroExpansionField.cpp
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/test/rtsan/fork_exec.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/SyntheticSections.cpp
M lld/MachO/SyntheticSections.cpp
M lld/wasm/Driver.cpp
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.h
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.h
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcTargetObjectFile.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEMCInstLower.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
R llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
Log Message:
-----------
count traces in doTrace
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/596821fbfec1...4fb61c7104c3
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