[all-commits] [llvm/llvm-project] 709ba0: [RISCV] Use RISCVII::getVecPolicyOpNum instead of ...
Iris Shi via All-commits
all-commits at lists.llvm.org
Mon Jun 16 00:38:55 PDT 2025
Branch: refs/heads/users/el-ev/populate-simplify-demanded-bits
Home: https://github.com/llvm/llvm-project
Commit: 709ba084c5632b786f2e6c503d3f9f27e1f1c433
https://github.com/llvm/llvm-project/commit/709ba084c5632b786f2e6c503d3f9f27e1f1c433
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Use RISCVII::getVecPolicyOpNum instead of making assumptions. NFC (#144175)
Commit: ef265ed23038a3719829a08fcbf7384fbdfe0451
https://github.com/llvm/llvm-project/commit/ef265ed23038a3719829a08fcbf7384fbdfe0451
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Simplify macros used by RISCVInstrInfo::convertToThreeAddress. NFC (#144173)
Merge some macros that are only used once by another macro.
Rename macros to remove _MF4 where not needed.
I suspect these are artifacts from FP being split from integer in the
past.
Commit: 35e3c50731870cc37a73ef1286a92f49347ccea4
https://github.com/llvm/llvm-project/commit/35e3c50731870cc37a73ef1286a92f49347ccea4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Simplify macros used for commuting vector multiply-accumulate instructions. NFC (#144169)
Inline some macros that were only instantiated once.
Remove unused macros.
#undef macros when finished with them
Commit: 0bd614a8ee11cfc5cee8719b3209f40b163d5a62
https://github.com/llvm/llvm-project/commit/0bd614a8ee11cfc5cee8719b3209f40b163d5a62
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M llvm/tools/llvm-shlib/CMakeLists.txt
Log Message:
-----------
[Cygwin] Don't use version script for Cygwin target (#143133)
Cygwin is a COFF platform and does not support version-script.
I guess I should use LLVM_HAVE_LINK_VERSION_SCRIPT here, but I don't
know why this is not currently the case.
Commit: 07fa6d1d90c714fa269529c3e5004a063d814c4a
https://github.com/llvm/llvm-project/commit/07fa6d1d90c714fa269529c3e5004a063d814c4a
Author: Konstantin Bogdanov <thevar1able at users.noreply.github.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
Log Message:
-----------
[InstCombine] Avoid folding `select(umin(X, Y), X)` with min/max values in false arm (#143020)
Fixes https://github.com/llvm/llvm-project/issues/139050.
This patch adds a check to avoid folding min/max reduction into select, which may block loop vectorization.
The issue is that the following snippet:
```
declare i8 @llvm.umin.i8(i8, i8)
define i8 @masked_min_fold_bug(i8 %acc, i8 %val, i8 %mask) {
; CHECK-LABEL: @masked_min_fold_bug(
; CHECK: %cond = icmp eq i8 %mask, 0
; CHECK: %masked_val = select i1 %cond, i8 %val, i8 255
; CHECK: call i8 @llvm.umin.i8(i8 %acc, i8 %masked_val)
;
%cond = icmp eq i8 %mask, 0
%masked_val = select i1 %cond, i8 %val, i8 255
%res = call i8 @llvm.umin.i8(i8 %acc, i8 %masked_val)
ret i8 %res
}
```
is being optimized to the following code, which can not be vectorized
later.
```
declare i8 @llvm.umin.i8(i8, i8) #0
define i8 @masked_min_fold_bug(i8 %acc, i8 %val, i8 %mask) {
%cond = icmp eq i8 %mask, 0
%1 = call i8 @llvm.umin.i8(i8 %acc, i8 %val)
%res = select i1 %cond, i8 %1, i8 %acc
ret i8 %res
}
attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
```
Expected:
```
declare i8 @llvm.umin.i8(i8, i8) #0
define i8 @masked_min_fold_bug(i8 %acc, i8 %val, i8 %mask) {
%cond = icmp eq i8 %mask, 0
%masked_val = select i1 %cond, i8 %val, i8 -1
%res = call i8 @llvm.umin.i8(i8 %acc, i8 %masked_val)
ret i8 %res
}
attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
```
https://godbolt.org/z/cYMheKE5r
Commit: 2796c412499a276ad23ae184daac33175c32424f
https://github.com/llvm/llvm-project/commit/2796c412499a276ad23ae184daac33175c32424f
Author: Kunqiu Chen <camsyn at foxmail.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M compiler-rt/test/msan/ifaddrs.cpp
M compiler-rt/test/msan/qsort.cpp
Log Message:
-----------
[MSan] Fix minor issues in testcases (#144073)
Previously,
1. ifaddrs.cpp : mistake `size_t (xxx)` as `sizeof (xxx)`, resulting in
inadequate checks.
2. qsort.cpp : mistake `kSize2` as `kSize1`, resulting in an unexpected
buffer overlow issue.
Commit: 2e7fbb94bc268d37996408a525781961989d8627
https://github.com/llvm/llvm-project/commit/2e7fbb94bc268d37996408a525781961989d8627
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in annotating braces (#144095)
Stop looking for function decls after hitting a BK_BracedInit brace.
Fixes #144057.
Commit: f46c44dbc0d225277178cf5b6646a96f591fdeaa
https://github.com/llvm/llvm-project/commit/f46c44dbc0d225277178cf5b6646a96f591fdeaa
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/NotNullTerminatedResultCheck.cpp
M clang-tools-extra/clang-tidy/hicpp/ExceptionBaseclassCheck.cpp
M clang-tools-extra/clang-tidy/misc/StaticAssertCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseBoolLiteralsCheck.cpp
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] change patterns 'anyOf(..., anything())' to 'optionally(...)' (#143558)
Writing `optionally()` instead of `anyOf(..., anything())` lowers code
size and gives the author's intention better.
Commit: 892513e51864f3e21120eab87c0c5a6aa37cae31
https://github.com/llvm/llvm-project/commit/892513e51864f3e21120eab87c0c5a6aa37cae31
Author: Zhikai Zeng <backlight.zzk at gmail.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/SemaCXX/gh102293.cpp
Log Message:
-----------
[clang] fix infinite recursion (#143244)
fix https://github.com/llvm/llvm-project/issues/141789
The direct cause of infinite recursion is that `T` is changing from
`struct X` and `S<X>` infinitely, this pr add a check that if `T`
visited before then return false directly.
```plaintext
/home/backlight/llvm-project/clang/lib/Sema/SemaDeclCXX.cpp:7196] FD->getType().getAsString()=struct X, T.getAsString()=S<X>, FD->getType().getCanonicalType().getUnqualifiedType().getAsString()=struct X, CanUnqualT.getAsString()=struct S<struct X>,
/home/backlight/llvm-project/clang/lib/Sema/SemaDeclCXX.cpp:7196] FD->getType().getAsString()=S<X>, T.getAsString()=struct X, FD->getType().getCanonicalType().getUnqualifiedType().getAsString()=struct S<struct X>, CanUnqualT.getAsString()=struct X,
```
https://github.com/llvm/llvm-project/pull/104829 fix similar infinite
recursion, but I think it is no longer needed so I kind of revert it.
Commit: 732ebf803b80a8a3fc3aaaceb600cebdf659118e
https://github.com/llvm/llvm-project/commit/732ebf803b80a8a3fc3aaaceb600cebdf659118e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Address post-commit comments for f68848015f62.
Assign sentinel value to named variable to clarify naming and update
comments.
Addresses post-commit comments from
https://github.com/llvm/llvm-project/pull/142291.
Commit: 1bc0b08e19788f2b34f46b183e89f5049468da2a
https://github.com/llvm/llvm-project/commit/1bc0b08e19788f2b34f46b183e89f5049468da2a
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
CMake: Fix LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING to be 1 or 0.
It has been introduced in #107278 but it was passing
"DISABLED" of LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING to cmakedefine01.
cmakadefine01 treats non-false-like strings as 1.
"DISABLED" is replaced with 1.
Commit: 64640667871990e4d73ae6221b9c4f05d0b36ea6
https://github.com/llvm/llvm-project/commit/64640667871990e4d73ae6221b9c4f05d0b36ea6
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/complex.cpp
A clang/test/CIR/Transforms/complex-create-fold.cir
Log Message:
-----------
[CIR] Upstream CreateOp for ComplexType with folder (#143192)
This change adds support for the create op for ComplexType with folder
and support for empty init list
https://github.com/llvm/llvm-project/issues/141365
Commit: 2cb32e29408a6c598072ea0f066a246957be69f9
https://github.com/llvm/llvm-project/commit/2cb32e29408a6c598072ea0f066a246957be69f9
Author: Ross Kirsling <rkirsling at gmail.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M clang/lib/Parse/ParseStmt.cpp
A clang/test/FixIt/fixit-punctuator-spelling.cpp
Log Message:
-----------
[Clang] Fix fix-it hint regression from #143460 (#144069)
Following #143460, `:` began displaying as `colon` in the fix-it hint
for a `case` with a missing colon, as is visible in the description of
(the separate bug) #144052.
This PR simply reverts a line that didn't need to be changed.
Commit: 42595d34bda74e0d6e3b6ec0cf253875330f9c42
https://github.com/llvm/llvm-project/commit/42595d34bda74e0d6e3b6ec0cf253875330f9c42
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M llvm/cmake/modules/FindFFI.cmake
Log Message:
-----------
[llvm] [cmake] Use pkg-config to obtain libffi search hints (#144221)
Extend `FindFFI.cmake` to include the paths obtained from pkg-config
when searching for libffi. This is going to help systems where libffi is
installed in nonstandard directory such as Gentoo, saving us from having
to copy the paths from pkg-config to `FFI_*` variables explicitly. The
logic is inspired by `FindLibEdit.cmake`.
Commit: ff295d2f3429a5a2a93b2c86099af40544f467d4
https://github.com/llvm/llvm-project/commit/ff295d2f3429a5a2a93b2c86099af40544f467d4
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/Parse/ParseOpenMP.cpp
M clang/test/OpenMP/declare_mapper_ast_print.c
M clang/test/OpenMP/declare_mapper_ast_print.cpp
Log Message:
-----------
[OpenMP][clang] declare mapper: fix handling of nested types (#143504)
Fix a crash that happened during parsing of a "declare mapper" construct
for a struct that contains an element for which we also declared a
custom default mapper.
Commit: 10bc17fc3676b82c7240046a948d2925dd2045d3
https://github.com/llvm/llvm-project/commit/10bc17fc3676b82c7240046a948d2925dd2045d3
Author: Tom Vijlbrief <tvijlbrief at gmail.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/Driver/ToolChains/AVR.cpp
M llvm/lib/Target/AVR/AVRDevices.td
Log Message:
-----------
[AVR] Add support for many new AVR MCUs (#143914)
fixes https://github.com/llvm/llvm-project/issues/116116
Commit: 62d8e001dac4b1a68f5b33c8784adba1335003f4
https://github.com/llvm/llvm-project/commit/62d8e001dac4b1a68f5b33c8784adba1335003f4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/Driver/ToolChains/AVR.cpp
M llvm/lib/Target/AVR/AVRDevices.td
Log Message:
-----------
Revert "[AVR] Add support for many new AVR MCUs (#143914)"
This reverts commit 10bc17fc3676b82c7240046a948d2925dd2045d3.
Multiple buildbot failures have been reported:
https://github.com/llvm/llvm-project/pull/143914
Commit: 72f99b75afc12bb15a7730544339bcc1ca11e8ee
https://github.com/llvm/llvm-project/commit/72f99b75afc12bb15a7730544339bcc1ca11e8ee
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-branch-weights.ll
Log Message:
-----------
[LV] Add test case with branch weights.
Add test case with branch weights where the vector loop can
be removed. Exposed a crash with db8d34db26e9
(https://github.com/llvm/llvm-project/pull/143035).
Commit: 577199f9221ebc805a69372a2b19f4c8ebaf1daf
https://github.com/llvm/llvm-project/commit/577199f9221ebc805a69372a2b19f4c8ebaf1daf
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
Reapply "[VPlan] Set branch weight metadata on middle term in VPlan (NFC) (#143035)"
This reverts commit 0604dc199c019b23746f4a54885ba0c75569cdae.
The recommitted version addresses post-commit comments and adjusts the
place the branch weights are added. It now runs before VPlans are optimized
for VF and UF, which may remove the vector loop region, causing a crash
trying to get the middle block after that. Test case added in
72f99b75afc12bb.
Original message:
Manage branch weights for the BranchOnCond in the middle block in VPlan.
This requires updating VPInstruction to inherit from VPIRMetadata, which
in general makes sense as there are a number of opcodes that could take
metadata.
There are other branches (part of the skeleton) that also need branch
weights adding.
PR: https://github.com/llvm/llvm-project/pull/143035
Commit: d6e25c4d21ebe20aaa6cbf6e2b9afde8f6713160
https://github.com/llvm/llvm-project/commit/d6e25c4d21ebe20aaa6cbf6e2b9afde8f6713160
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll
Log Message:
-----------
[SelectionDAG] Take passthru into account when widening ISD::MLOAD (#144170)
#140595 used vp.load in the cases where we need to widen masked.load.
However, we didn't account for the passthru operand so it might
miscompile when the passthru is not undef. While we can simply avoid
using vp.load to widen when passthru is not undef, doing so will ran
into the exact same crash described in #140198 , so for scalable vector,
this patch manually merges the vp.load result with passthru when the
latter is not undef.
Commit: db682a721aabf3c33dfda471bf6a7908fbf656b4
https://github.com/llvm/llvm-project/commit/db682a721aabf3c33dfda471bf6a7908fbf656b4
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M llvm/utils/UpdateTestChecks/asm.py
Log Message:
-----------
[utils] Add "aarch64-apple-macosx" triple to update_llc_test_checks.py (#144023)
Add a missing valid triple "aarch64-apple-macosx" for usability.
Commit: 0ff95c9eb1e3b0785724d3e33df1e1f77f2c7473
https://github.com/llvm/llvm-project/commit/0ff95c9eb1e3b0785724d3e33df1e1f77f2c7473
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/include/clang/Basic/AttributeCommonInfo.h
A clang/include/clang/Basic/AttributeScopeInfo.h
M clang/include/clang/Sema/ParsedAttr.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/test/CXX/module/dcl.dcl/dcl.module/dcl.module.import/p1.cppm
A clang/test/FixIt/fixit-unknown-attributes.cpp
M clang/test/Parser/cxx11-base-spec-attributes.cpp
M clang/test/Parser/objcxx11-attributes.mm
M clang/test/Sema/unknown-attributes.c
M clang/test/SemaCXX/attr-non-x86-no_caller_saved_registers.cpp
Log Message:
-----------
[Clang] add fix-it hints for unknown attributes (#141305)
This patch adds fix-it hints for unknown attribute names when Clang
suggests a correction
Commit: 951ea8b681451ff2db8b895f1dcfe0fbc91d939a
https://github.com/llvm/llvm-project/commit/951ea8b681451ff2db8b895f1dcfe0fbc91d939a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
[mlir][nvvm][NFC] Fix typo in TargetAttr (#144159)
Commit: 4ed10db85919d3d87bf0b3353340b58354a75994
https://github.com/llvm/llvm-project/commit/4ed10db85919d3d87bf0b3353340b58354a75994
Author: Sam James <sam at gentoo.org>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/CMakeLists.txt
Log Message:
-----------
[clang][cmake] Don't pass -fno-strict-aliasing for GCC
This was added a long time ago..
* to the Makefiles in 40fee6313df688d43d1f8bbe85bc35161689afca;
* first to CMake in b3ce035c7155644d5bced46c45ae5ac865b7aedc;
* then moved to only apply when building Clang with GCC in
c5635a6af7c643169f81145bfae8c895f2207792.
This shouldn't be needed these days. If an issue does arise, it really
ought to be documented better and the cause will certainly be different
than it was back then.
The two GCC bugs cited in 40fee6313df688d43d1f8bbe85bc35161689afca were:
* https://gcc.gnu.org/PR41874
* https://gcc.gnu.org/PR41838
and both are long-fixed. Not only that, if those issues did come up again,
we'd be better off doing -Wno-strict-aliasing where appropriate if there
weren't a real code issue or some suppression that was tighter in scope
wasn't appropriate.
Commit: 24c8d900c47edeefb85643a06bc32235d9f42ea3
https://github.com/llvm/llvm-project/commit/24c8d900c47edeefb85643a06bc32235d9f42ea3
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/test/Driver/print-enabled-extensions/riscv-andes-a25.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-a45.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-ax25.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-ax45.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-n45.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-nx45.c
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/tools/llvm-mca/RISCV/Andes45/gpr.s
Log Message:
-----------
[RISCV] Remove B and Zbc extension from Andes series cpus. (#144022)
The Andes CPU is configurable with optional extensions. The minimal
required extension set does not include `B` and `Zbc` extensions. So we
decided to remove them.
Commit: a0c00ccd5ff180c721def8001c870338d5de319e
https://github.com/llvm/llvm-project/commit/a0c00ccd5ff180c721def8001c870338d5de319e
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__functional/reference_wrapper.h
M libcxx/test/std/containers/sequences/array/compare.three_way.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/compare.three_way.refwrap.const_ref.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/compare.three_way.refwrap.refwrap.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/compare.three_way.refwrap.refwrap_const.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/equal.refwrap.const_ref.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/equal.refwrap.refwrap.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/equal.refwrap.refwrap_const.pass.cpp
R libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/helper_concepts.h
R libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/helper_types.h
M libcxx/test/support/test_comparisons.h
M libcxx/test/support/test_container_comparisons.h
Log Message:
-----------
[libc++] P2944R3: Constrained comparisons - update `reference_wrapper` implementation (#139368)
Updates the implementation `std::reference_wrapper` -
[P2944R3](https://wg21.link/P2944R3) as discussed in
https://github.com/llvm/llvm-project/pull/117664#discussion_r1857826166
This PR also refactors the tests in preparation to implements the
constrained comparisons for `optional`, `variant` etc.
- Moves the test helpers (concepts and types) for testing constrained
comparisons to `test_comparisons.h`.
- Updates the `std::reference_wrapper` implementation to use the concept
`__core_convertible_to<bool>` as per comments in #135759.
Closes #138233
# References:
- [refwrap.comparisons](https://wg21.link/refwrap.comparisons)
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Commit: c4ba734993ac7ca39cc101db62797aad3a2a265a
https://github.com/llvm/llvm-project/commit/c4ba734993ac7ca39cc101db62797aad3a2a265a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
Log Message:
-----------
[mlir] Compare std::optional<T> to values directly (NFC) (#144241)
This patch transforms:
X && *X == Y
to:
X == Y
where X is of std::optional<T>, and Y is of T or similar.
Commit: 84ff1bda2977e580265997ad2d4c47b18cd3bf9f
https://github.com/llvm/llvm-project/commit/84ff1bda2977e580265997ad2d4c47b18cd3bf9f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M llvm/lib/TargetParser/RISCVISAInfo.cpp
Log Message:
-----------
[RISCV] Use StringRef in a range-based for loop (NFC) (#144243)
When we iterate over std::vector<std::string>, we can directly assign
each element to StringRef. We do not need to go through a separate
statement.
Commit: 9e16792639242a86314e5d6531010953a0a96216
https://github.com/llvm/llvm-project/commit/9e16792639242a86314e5d6531010953a0a96216
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-06-14 (Sat, 14 Jun 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bzl] Add CAPIIndex rule. (#144248)
Commit: 149cb5c43c3a75ecb827b8b7ae853250c3c09449
https://github.com/llvm/llvm-project/commit/149cb5c43c3a75ecb827b8b7ae853250c3c09449
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/icmp-dom.ll
Log Message:
-----------
[ValueTracking] Infer `X | Y != 0` from `X != Y` (#117443)
Alive2: https://alive2.llvm.org/ce/z/cJ75Ya
Closes https://github.com/llvm/llvm-project/issues/117436.
Commit: 30a41a642358d0f427c3cbc0299ea48fbc0cf79e
https://github.com/llvm/llvm-project/commit/30a41a642358d0f427c3cbc0299ea48fbc0cf79e
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/icmp-sub.ll
Log Message:
-----------
[ValueTracking] Add subtraction support for setLimitsForBinOp (#143618)
We can determine the range from a subtraction if it has nsw or nuw.
https://alive2.llvm.org/ce/z/tXAKVV
Commit: 48e54f3a225062b5d229e6fd3b06140f76c0613b
https://github.com/llvm/llvm-project/commit/48e54f3a225062b5d229e6fd3b06140f76c0613b
Author: David Green <david.green at arm.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/ARC/ARCTargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/BPF/BPFTargetTransformInfo.h
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
M llvm/lib/Target/Mips/MipsTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/VE/VETargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Target/XCore/XCoreTargetTransformInfo.h
Log Message:
-----------
[CostModel] Mark all TTIImpls as final. NFC (#143404)
In the AArch64 version this helps reduce the number of blr instruction
(indirect jumps) in from 325 to 87, and reduces the size of the object
file by 4%. It seems to help make the code more efficient even if it
doesn't greatly affect compile time.
The AMDGPU variants are already marked as final.
Commit: 89f692a24f6a13ae5cf9e37f91abe6f34c403258
https://github.com/llvm/llvm-project/commit/89f692a24f6a13ae5cf9e37f91abe6f34c403258
Author: David Green <david.green at arm.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Log Message:
-----------
[GlobalISel] Split Legalizer debug ouput into paragraphs. NFC (#143427)
This helps keep the legalizer output easier to read, splitting each
instructions legalization into a separate block.
Commit: 147a4c7743c44af3537bae69dcf513153b03b00e
https://github.com/llvm/llvm-project/commit/147a4c7743c44af3537bae69dcf513153b03b00e
Author: Chris Apple <cja-private at pm.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Fix issue where close test would lead to crash (#144017)
Commit: b983431c281a0acb9e446c7c9d72474f4d09e8e0
https://github.com/llvm/llvm-project/commit/b983431c281a0acb9e446c7c9d72474f4d09e8e0
Author: Chris Apple <cja-private at pm.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M compiler-rt/test/rtsan/fork_exec.cpp
Log Message:
-----------
[rtsan] Fix issue when intercepted function was not execve in test (#144018)
Commit: 567647888ea3dd292827bbac445d316d6a6b0ecb
https://github.com/llvm/llvm-project/commit/567647888ea3dd292827bbac445d316d6a6b0ecb
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/cxx17.cpp
Log Message:
-----------
[clang][bytecode] Avoid revisiting decomposition decl in visitDeclRef (#144226)
This simple patch removes the code to revisit `DecompositionDecl` in
`visitDeclRef`. The revisit will try to emit the initializer of the
`DecompositionDecl`, which could result in evaluation errors if the
`DecompositionDecl` is not within a constexpr context.
Commit: 886174a835208ecd2d06b378d2094b10611030d5
https://github.com/llvm/llvm-project/commit/886174a835208ecd2d06b378d2094b10611030d5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
Log Message:
-----------
[X86] shuffle-blend.ll - regenerate test checks
Commit: 2669664605d00e1b3a9c479545b95a6844786d0c
https://github.com/llvm/llvm-project/commit/2669664605d00e1b3a9c479545b95a6844786d0c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang-tools-extra/modularize/Modularize.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
Log Message:
-----------
[modularize] Use range-based for loops (NFC) (#144244)
Commit: fef5df9d843745b2c4ed163911ed1305028350ca
https://github.com/llvm/llvm-project/commit/fef5df9d843745b2c4ed163911ed1305028350ca
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[TableGen] Use range-based for loops (NFC) (#144250)
Commit: d78eec864c60729685487c884724f27edd53b3b8
https://github.com/llvm/llvm-project/commit/d78eec864c60729685487c884724f27edd53b3b8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/SyntheticSections.cpp
M lld/MachO/SyntheticSections.cpp
M lld/wasm/Driver.cpp
Log Message:
-----------
[lld] Use range-based for loops (NFC) (#144251)
Commit: 8f5c338b89a22abc3191a0d931071c09630d6195
https://github.com/llvm/llvm-project/commit/8f5c338b89a22abc3191a0d931071c09630d6195
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[Sema] Use a range-based for loop (NFC) (#144252)
Note that LLVM Coding Standards discourages for_each.
Commit: b16d43a874748a496da5cd774dd864c95b78d6b0
https://github.com/llvm/llvm-project/commit/b16d43a874748a496da5cd774dd864c95b78d6b0
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
Log Message:
-----------
VE: Rename VEMCExpr::VK_ to VE::S_
Prepare for removing VEMCExpr. Adopt the newer naming convention adopted
by AMDGPU/WebAssembly.
Commit: df54a2d9357fe7f56ca3c6fa2f07889449b50325
https://github.com/llvm/llvm-project/commit/df54a2d9357fe7f56ca3c6fa2f07889449b50325
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Only skip induction phis in planContainsAdditionalSimps (NFC).
Skip induction phis when checking for simplifications, as they may not
be lowered directly be lowered to a corresponding PHI recipe. Reductions
and first-order recurrences will get lowered to phi recipes, unless they
are removed. Considering them for simplifications allows removing them
if there are no remaining users.
NFC as currently reduction and recurrence phis are not
simplified/removed if dead.
Commit: 254a92d49a4c1e1f7f747b1c2f1ccbfd7f217880
https://github.com/llvm/llvm-project/commit/254a92d49a4c1e1f7f747b1c2f1ccbfd7f217880
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcTargetObjectFile.cpp
Log Message:
-----------
MC: Add MCSpecifierExpr::create
as a target-agnostic implementation to replace target-specific
XXXMCExpr::create.
Commit: 72de33a406383cb8555234c40e7b31db593e164f
https://github.com/llvm/llvm-project/commit/72de33a406383cb8555234c40e7b31db593e164f
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEMCInstLower.cpp
Log Message:
-----------
MC: Add MCAsmInfo::evaluateAsRelocatableImpl and replace VEMCExpr with MCSpecifierExpr
Expressions with specifier can only be folded during relocation
generatin. At parse time the `MCAssembler *` argument might be null, and
targets should not rely on the evaluateAsRelocatable result.
Therefore, we can move evaluateAsRelocatableImpl from MCSpecifierExpr to
MCAsmInfo, so that targets do not need to inherit from MCSpecifierExpr.
Commit: 490d7bb89a029edd037ed5e46747d0085a649ee8
https://github.com/llvm/llvm-project/commit/490d7bb89a029edd037ed5e46747d0085a649ee8
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
Log Message:
-----------
Xtensa: Remove unneeded XtensaMCExpr::create calls
MCSpecifierExpr and its subclasses should only be used with the
relocation specifier is not zero.
Commit: cf9665dd2bcef3ff2f3e22d3f44e8603f4ba9577
https://github.com/llvm/llvm-project/commit/cf9665dd2bcef3ff2f3e22d3f44e8603f4ba9577
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
R llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
Log Message:
-----------
Xtensa: Migrate to newer relocation specifier representation
* Rename specifier constants from XtensaMCExpr::Specifier::VK_ to
Xtensa::S_, following Sparc and VE.
* Use MCAsmInfo::printSpecifierExpr instead of MCExpr::print.
* Remove unneeded XtensaMCExpr. Just use MCSpecifierExpr when a
specifier is needed.
Commit: 7c22612b2948d8657b4a22ce59870ddd708c4677
https://github.com/llvm/llvm-project/commit/7c22612b2948d8657b4a22ce59870ddd708c4677
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
Log Message:
-----------
SPARC: Remove dead specifier code from asm operand printer
We don't currently print %specifier( ) for asm operands.
The old code was also incorrect - as it did not print "(".
Commit: d3e9e2d433a666d6620afb00a1533ef4937c667f
https://github.com/llvm/llvm-project/commit/d3e9e2d433a666d6620afb00a1533ef4937c667f
Author: Ross Kirsling <ross.kirsling at sony.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp
Log Message:
-----------
[Clang] Fix typo in is_replaceable diagnostic (#144247)
Adjustment to #143265; `because it not` should be `because it is not`.
Commit: 5cf138a68744904562e81436181df668b00cdb1f
https://github.com/llvm/llvm-project/commit/5cf138a68744904562e81436181df668b00cdb1f
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.h
Log Message:
-----------
M68k: Replace M68kMCExpr::VK_ to M68k::S_
Prepare for removing VEMCExpr. Adopt the newer naming convention adopted
by AMDGPU/WebAssembly/VE.
Commit: 444c6ae530e4814af2cfd6918e3f852ef14ff50d
https://github.com/llvm/llvm-project/commit/444c6ae530e4814af2cfd6918e3f852ef14ff50d
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.h
Log Message:
-----------
M68k: Remove M68kMCExpr
Commit: b839632bf44f56e6f17777857f4b23d4eccb6f33
https://github.com/llvm/llvm-project/commit/b839632bf44f56e6f17777857f4b23d4eccb6f33
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
Log Message:
-----------
PowerPC: Rename PPCMCExpr::VK_ to PPC::S_
Prepare for removing PPCMCExpr. Adopt the newer naming convention with
AMDGPU/WebAssembly/VE/M68k.
Commit: a8d76acdd88b25a98e50ac2da9e6f311fc2c2cb8
https://github.com/llvm/llvm-project/commit/a8d76acdd88b25a98e50ac2da9e6f311fc2c2cb8
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
Log Message:
-----------
PowerPC: Replace MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7a102c0052e5ae0e76ef1297902ffeb22d
Commit: 087a6ac420ad99c523b9dd517351e0c6d1f1a980
https://github.com/llvm/llvm-project/commit/087a6ac420ad99c523b9dd517351e0c6d1f1a980
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
Log Message:
-----------
[LV] Add users to some first-order recurrence tests.
Add extra users to ensure the recurrence cannot be DCE'd.
Also re-generates some checks.
Commit: 790df93298b3ad6c57dafb55fc6d18bddff16c4a
https://github.com/llvm/llvm-project/commit/790df93298b3ad6c57dafb55fc6d18bddff16c4a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
Log Message:
-----------
[VPlan] Mark VPFirstOrderRecurrencePHI as not reading/writing memory.
First-order recurrence phis don't have side-effects and don't read or
write memory. Mark them as such.
Commit: f4a63523b88631e224496435bea0940ac05897bf
https://github.com/llvm/llvm-project/commit/f4a63523b88631e224496435bea0940ac05897bf
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
Log Message:
-----------
PowerPC: Migrate to newer relocation specifier representation
* Use MCAsmInfo::printSpecifierExpr instead of MCExpr::print.
* Replace PPCMCExpr with MCSpecifierExpr.
Commit: 34c85ed2bc1adfa375745db6de7f62d350a8f768
https://github.com/llvm/llvm-project/commit/34c85ed2bc1adfa375745db6de7f62d350a8f768
Author: Vladimir Vuksanovic <109677816+vvuksanovic at users.noreply.github.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
A clang-tools-extra/test/clang-reorder-fields/MacroExpansionField.cpp
Log Message:
-----------
[clang-reorder-fields] Use expanded location for macros (#142147)
Fixes macros being replaced instead of their expansion.
Closes #52632
Commit: e448c3e5fc2ab4244356e29c9c9135b6ccf5f6ff
https://github.com/llvm/llvm-project/commit/e448c3e5fc2ab4244356e29c9c9135b6ccf5f6ff
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.h
Log Message:
-----------
LoongArch: Migrate to MCAsmInfo::printExpr
Commit: e3025c95090f74b26e36106d2aa394b213f713a1
https://github.com/llvm/llvm-project/commit/e3025c95090f74b26e36106d2aa394b213f713a1
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
RISCV: Rename RISCVMCExpr::VK_ to RISCV::S_
Prepare for removing RISCVMCExpr. Adopt the newer naming convention (S_)
used by AMDGPU/WebAssembly/VE/M68k/PowerPC.
Commit: 4635b6076dc1933b7ebd9fcca9f22ec93e2f9c0c
https://github.com/llvm/llvm-project/commit/4635b6076dc1933b7ebd9fcca9f22ec93e2f9c0c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
Log Message:
-----------
RISCV: Rename RISCVMCExpr::VK_ to RISCV::S_
Commit: fedf6c68ddfb43730578837aad394afcd97fe65a
https://github.com/llvm/llvm-project/commit/fedf6c68ddfb43730578837aad394afcd97fe65a
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
RISCV: Move RISCVMCExpr functions to RISCVMCAsmInfo or RISCVMCAsmBackend
* Move getPCRelHiFixup closer to the only caller RISCVAsmBackend::evaluateTargetFixup.
* Declare getSpecifierForName in RISCVMCAsmInfo, in align with other
targets that have migrated to the new relocation specifier representation.
Commit: 51b63bbee56c2253643f41c53bc3592af261b82d
https://github.com/llvm/llvm-project/commit/51b63bbee56c2253643f41c53bc3592af261b82d
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
RISCV: Replace MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7a102c0052e5ae0e76ef1297902ffeb22d
Commit: f11dd116e0aa8cf35bdb82dba0a3a926538c05c2
https://github.com/llvm/llvm-project/commit/f11dd116e0aa8cf35bdb82dba0a3a926538c05c2
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
R llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
Log Message:
-----------
RISCV: Replace RISCVMCExpr with MCSpecifierExpr
Commit: 489dcc9e5233b52152272e6e5377784a56a12f1d
https://github.com/llvm/llvm-project/commit/489dcc9e5233b52152272e6e5377784a56a12f1d
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
Log Message:
-----------
AArch64: Replace MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7a102c0052e5ae0e76ef1297902ffeb22d
Commit: 9a87c94622863cf712c6ab432931dfdb704fae3e
https://github.com/llvm/llvm-project/commit/9a87c94622863cf712c6ab432931dfdb704fae3e
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
Log Message:
-----------
MIPS: Replace MCExpr::print with MCAsmInfo::printExpr
Commit: 81d8c89da056a7751f6c7714fccb30c071dbc31a
https://github.com/llvm/llvm-project/commit/81d8c89da056a7751f6c7714fccb30c071dbc31a
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
Log Message:
-----------
M68k: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Follow-up to 18b67a7a102c0052e5ae0e76ef1297902ffeb22d
Commit: 95acd6199f3799da00e45b62fd1045ece7142cad
https://github.com/llvm/llvm-project/commit/95acd6199f3799da00e45b62fd1045ece7142cad
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
Log Message:
-----------
AMDGPU: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: 0894094efdfb1ff4f93f818cef9f2aec9c1ea1a8
https://github.com/llvm/llvm-project/commit/0894094efdfb1ff4f93f818cef9f2aec9c1ea1a8
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
Log Message:
-----------
X86: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: dcb8cd8ecdd74eb2ceca2365e0fb4c9545e3cd97
https://github.com/llvm/llvm-project/commit/dcb8cd8ecdd74eb2ceca2365e0fb4c9545e3cd97
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
Log Message:
-----------
ARM: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: a7e5de472314a891604abee390beb8af5493b29a
https://github.com/llvm/llvm-project/commit/a7e5de472314a891604abee390beb8af5493b29a
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
Log Message:
-----------
SystemZ: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: dca2b261d77a9b758587b660e5b88b6a312d057c
https://github.com/llvm/llvm-project/commit/dca2b261d77a9b758587b660e5b88b6a312d057c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.cpp
Log Message:
-----------
Lanai: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: 178fac3d61aa7fc4eb9e4a3d385ae02e660c0d3a
https://github.com/llvm/llvm-project/commit/178fac3d61aa7fc4eb9e4a3d385ae02e660c0d3a
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp
Log Message:
-----------
Hexagon: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: 22ad0359f9006f47a1707170896f359abbd6e10d
https://github.com/llvm/llvm-project/commit/22ad0359f9006f47a1707170896f359abbd6e10d
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXMCExpr.cpp
Log Message:
-----------
NVPTX: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: c9d511bc642fbf612014eee4749ad7ee2646af32
https://github.com/llvm/llvm-project/commit/c9d511bc642fbf612014eee4749ad7ee2646af32
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M bolt/lib/Passes/RetpolineInsertion.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
Log Message:
-----------
Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: d793168e3b1a0343debfdfe143d7fb4127f9038c
https://github.com/llvm/llvm-project/commit/d793168e3b1a0343debfdfe143d7fb4127f9038c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
Log Message:
-----------
MIPS: Rename MipsMCExpr::MEK_ to Mips::S_
Prepare for removing MipsMCExpr. Adopt the newer naming convention (S_)
used by AMDGPU/WebAssembly/VE/M68k/PowerPC/LoongArch/RISCV.
Commit: ad94f77a6a0c421e1f5815d1b8e5aa86d8dd2e92
https://github.com/llvm/llvm-project/commit/ad94f77a6a0c421e1f5815d1b8e5aa86d8dd2e92
Author: Tom Vijlbrief <tvijlbrief at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/test/Misc/target-invalid-cpu-note/avr.c
M llvm/lib/Target/AVR/AVRDevices.td
Log Message:
-----------
[AVR] Add many new AVR MCU model definitions (#144229)
1. Added the missing XMEGA2 definition. The avr64 devices use xmega2 which has SPM(X) defined.
2. The avr16/avr32 devices do have SPM and SPMX features, but the current xmega3 definition has not.
Xmega3 is also used for modern attiny series which do not have SPM(X), so that is correct.
Leave the avr16/avr32 devices unchanged (using xmega3 to be in sync with gcc definitions).
Fixes https://github.com/llvm/llvm-project/issues/116116
Commit: 1506ba95d7c3dca1abff0190550945f6cc263a99
https://github.com/llvm/llvm-project/commit/1506ba95d7c3dca1abff0190550945f6cc263a99
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
Log Message:
-----------
[clang-format][NFC] Clean up DisallowLineBreaks lambda (#144255)
See also
https://github.com/llvm/llvm-project/pull/141576/files#r2141808121
Commit: f23b841f0fa7576b90fe226e66192b861a8cf1cf
https://github.com/llvm/llvm-project/commit/f23b841f0fa7576b90fe226e66192b861a8cf1cf
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
Log Message:
-----------
MIPS: Move MipsMCExpr functions to MipsMCAsmInfo
Commit: ba7369c49c6f638a4ce6f6be3acbdab5e0b5f418
https://github.com/llvm/llvm-project/commit/ba7369c49c6f638a4ce6f6be3acbdab5e0b5f418
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
R lld/test/wasm/lto/Inputs/libcall-return-addr.ll
R lld/test/wasm/lto/libcall-return-addr.ll
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
Log Message:
-----------
WebAssembly: Move runtime libcall setting out of TargetLowering (#142624)
RuntimeLibcallInfo needs to be correct outside of codegen contexts.
Commit: 993c158a30b9ddc881e55efcd33e33abc10f3a5c
https://github.com/llvm/llvm-project/commit/993c158a30b9ddc881e55efcd33e33abc10f3a5c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsMCInstLower.h
Log Message:
-----------
MIPS: Reduce MipsMCExpr uses
Commit: cf679e66fade71220535775cca895628bf7692af
https://github.com/llvm/llvm-project/commit/cf679e66fade71220535775cca895628bf7692af
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
Log Message:
-----------
SystemZ: Rename SystemZMCExpr::VK_ to SystemZ::S_
Prepare for removing SystemZMCExpr. Adopt the newer naming convention
used by most other targets.
Commit: d64ee2cd4fe488b6dc21e7a8173fbb9cf3610ba0
https://github.com/llvm/llvm-project/commit/d64ee2cd4fe488b6dc21e7a8173fbb9cf3610ba0
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
Log Message:
-----------
[RISCV] Add GetVTypeMinimalPredicates for the operation supported by zvfhmin. NFC. (#143847)
This patch adds a new `GetVTypeMinimalPredicates` for `f16` operation
supported by `Zvfhmin`. Split the type predicates for minimal support
and full compute support. This is a refactor patch for implementing
vector compute support for bf16 (Zvfbfa), that we can check `bf16` type
whether with `Zvfbfa` extension in `GetVTypePredicates`.
Commit: b591f6dad4079401fadc4a516b32d3900b7946de
https://github.com/llvm/llvm-project/commit/b591f6dad4079401fadc4a516b32d3900b7946de
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.h
Log Message:
-----------
SystemZ: Migrate to newer relocation specifier representation
z/OS creates SystemZMCExpr objects (https://reviews.llvm.org/D153788)
while ELF doesn't. Define the SystemZMCAsmInfoGOFF hooks
instead of the legacy MCSpecifierExpr:: hooks.
Commit: 167223f8c2c2350a3de9478355885c63b35ca6a9
https://github.com/llvm/llvm-project/commit/167223f8c2c2350a3de9478355885c63b35ca6a9
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn
Log Message:
-----------
[gn build] Port b591f6dad407
Commit: 9adde28df784f5c0cc960bdabd413ac131a5852e
https://github.com/llvm/llvm-project/commit/9adde28df784f5c0cc960bdabd413ac131a5852e
Author: Ming-Yi Lai <ming-yi.lai at mediatek.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/test/ELF/riscv-feature-zicfilp-func-sig.s
M lld/test/ELF/riscv-feature-zicfilp-unlabeled.s
M lld/test/ELF/riscv-feature-zicfiss.s
Log Message:
-----------
[LLD][ELF][RISCV][Zicfilp][Zicfiss] Support `-z zicfilp=` and `-z zicfiss=` to force enable/disable features (#143114)
+ If `-z zicfilp=implicit` or option not specified, the output would
have the ZICFILP feature enabled/disabled based on input objects
+ If `-z zicfilp=<never|unlabeled|func-sig>`, the output would have
ZICFILP feature forced <off|on to the "unlabeled" scheme|on to the
"func-sig" scheme>
+ If `-z zicfiss=implicit` or option not specified, the output would
have the ZICFISS feature enabled/disabled based on input objects
+ If `-z zicfiss=<never|always>`, the output would have the ZICFISS
feature forced <off|on>
Commit: f71fb2dc01e117481f56e040c25391883d43c1c5
https://github.com/llvm/llvm-project/commit/f71fb2dc01e117481f56e040c25391883d43c1c5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Tooling/ArgumentsAdjusters.cpp
Log Message:
-----------
[clang] Use StringRef in range-based for loops (NFC) (#144242)
When we iterate over std::vector<std::string>, we can directly assign
each element to StringRef. We do not need to go through separate
statements.
Commit: 7a4a83b551eaf159ce10b612def3be62d80706d4
https://github.com/llvm/llvm-project/commit/7a4a83b551eaf159ce10b612def3be62d80706d4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/CodeGenInstruction.h
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/DAGISelMatcher.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/X86DisassemblerTables.cpp
Log Message:
-----------
[TableGen] Use range-based for loops (NFC) (#144283)
Commit: c01532177ff61a768d5dc1ea541f9a8d986497fa
https://github.com/llvm/llvm-project/commit/c01532177ff61a768d5dc1ea541f9a8d986497fa
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Edit/EditedSource.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/InstallAPI/DiagnosticBuilderWrappers.cpp
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/InstallAPI/FileList.cpp
M clang/lib/InstallAPI/Frontend.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Interpreter/Value.cpp
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
Log Message:
-----------
[clang] Remove unused includes (NFC) (#144285)
These are identified by misc-include-cleaner. I've filtered out those
that break builds. Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
Commit: cab09e76e0c4c95f44cf90bf2bf7a6eaa15b14b2
https://github.com/llvm/llvm-project/commit/cab09e76e0c4c95f44cf90bf2bf7a6eaa15b14b2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/double-float-shrink-2.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
Log Message:
-----------
[InstCombine] Propagate FMF from fptrunc when folding `fptrunc fabs(X) -> fabs(fptrunc X)` (#143352)
Alive2: https://alive2.llvm.org/ce/z/DWV3G3
fptrunc yields infinity when the input cannot fit in the target type. So
ninf should be propagated from fptrunc. For other intrinsics, the
previous check ensures that the result is never an infinity:
https://github.com/llvm/llvm-project/blob/5d3899d293e902124c3602b466031b6b799fb123/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp#L1910-L1917
Closes https://github.com/llvm/llvm-project/issues/143122.
Commit: e2afda6fc95ef63b54d449fc1a9eb13cd0ff3639
https://github.com/llvm/llvm-project/commit/e2afda6fc95ef63b54d449fc1a9eb13cd0ff3639
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vslideup.c
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/rvv/vrgatherei16.ll
M llvm/test/CodeGen/RISCV/rvv/vslidedown.ll
M llvm/test/CodeGen/RISCV/rvv/vslideup.ll
Log Message:
-----------
[RISCV] Fix incorrect predicates for fp16 permutation intrinsics (#144063)
vrgatherei16, vslideup and vslidedown should be supported with fp16 type
for Zvfhmin.
Fixes https://github.com/llvm/llvm-project/issues/143975.
Commit: 29fcad000ca63078d28dd231e0727b7811df43b0
https://github.com/llvm/llvm-project/commit/29fcad000ca63078d28dd231e0727b7811df43b0
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
Log Message:
-----------
AVR: Replace deprecated MCExpr::print with MCAsmInfo::printExpr
Commit: f8e0518120cd2850a7f674322bf428bc7d7d3326
https://github.com/llvm/llvm-project/commit/f8e0518120cd2850a7f674322bf428bc7d7d3326
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCInst.cpp
M llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll
M llvm/test/CodeGen/Mips/llvm-ir/load.ll
M llvm/test/CodeGen/Mips/llvm-ir/store.ll
M llvm/test/MC/Lanai/conditional_inst.s
M llvm/test/MC/Lanai/memory.s
Log Message:
-----------
MC: Adjust -show-inst output for MCExpr
This dump feature does not pass MCAsmInfo to the printer function.
When we remove MCSpecifierExpr subclasses (and the printImpl overrides),
we will not be able to print target-specific specifier strings.
Just print a textual representation.
Commit: 05a9ad977624c4f6def7c0f4cf7103e28d6c6541
https://github.com/llvm/llvm-project/commit/05a9ad977624c4f6def7c0f4cf7103e28d6c6541
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
R llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.cpp
R llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.h
Log Message:
-----------
Lanai: Migrate to the new relocation specifier representation
Use MCSpecifierExpr directly and remove the LanaiMCExpr subclass. Define
MCSpecifierExpr::printImpl to print the relocation specifier in decimal
for llvm-mc -show-inst. The output is not guaranteed to be stable.
Depends on f8e0518120cd2850a7f674322bf428bc7d7d3326
("MC: Adjust -show-inst output for MCExpr")
Commit: 945b12f6c823c49336a878e7afe2a96e4d3382ea
https://github.com/llvm/llvm-project/commit/945b12f6c823c49336a878e7afe2a96e4d3382ea
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn
Log Message:
-----------
[gn build] Port 05a9ad977624
Commit: 4ea616d072d126a31149174ca2efdbdace9ce568
https://github.com/llvm/llvm-project/commit/4ea616d072d126a31149174ca2efdbdace9ce568
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
Log Message:
-----------
AArch64: Move AArch64MCExpr functions to AArch64MCAsmInfo
To migrate away from the legacy
XXXMCExpr::printImpl/evaluateAsRelocatableImpl overrides and align with
other targets.
While the AArch64MCAsmInfoXXX hooks introduce some duplication, they
enable better separation for object file formats.
Commit: 4f9e6bad8438f4440bfd68be2f0ebdca0d588d47
https://github.com/llvm/llvm-project/commit/4f9e6bad8438f4440bfd68be2f0ebdca0d588d47
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Fix calling operator new with nothrow/align parameter (#144271)
Discard all the parameters we don't care about.
Commit: f3021e79fd5a4cab5537f37df2e6010a325d0a7c
https://github.com/llvm/llvm-project/commit/f3021e79fd5a4cab5537f37df2e6010a325d0a7c
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-15 (Sun, 15 Jun 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
Log Message:
-----------
ARM: Rename ARMMCExpr::VK_ to ARM::S_
Prepare for removing ARMMCExpr. Adopt the new naming convention (S_
instead of VK_; the relocation specifier was previously named
`VariantKind`)) used by most other targets.
Make ARMMCAsmInfo.h include ARMMCExpr.h and change .cpp files to include
ARMMCAsmInfo.h. We will eventually remove ARMMCExpr.h.
Commit: 7efc861ec45e05be9dae59fc7483a98510066160
https://github.com/llvm/llvm-project/commit/7efc861ec45e05be9dae59fc7483a98510066160
Author: David Green <david.green at arm.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage for fdiv-combine.ll. NFC
Commit: f875efe1d82d920790e368f9ab2b31f173a523e1
https://github.com/llvm/llvm-project/commit/f875efe1d82d920790e368f9ab2b31f173a523e1
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Use `GetVTypeMinimalPredicates` instead of `GetVTypePredicates` for vrgatherei16/vslideup/vslidedown. NFC.
Commit: 7d9a451d875368baece310ca7226e3adbc00e1bf
https://github.com/llvm/llvm-project/commit/7d9a451d875368baece310ca7226e3adbc00e1bf
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/MC/RISCV/xqcilsm-invalid.s
Log Message:
-----------
[RISCV] Change input register type for QC_SWM and QC_SWMI (#144294)
Version 0.13 of the `Xqci` spec changes the register type of input
operand `rs3` from `GPR` to `GPRNoX0` for these two instructions.
The spec can be found at
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.13.0
Commit: 222ab28a9240e03479341cba2f487b8350635fce
https://github.com/llvm/llvm-project/commit/222ab28a9240e03479341cba2f487b8350635fce
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
A llvm/test/CodeGen/AArch64/arm64ec-builtins.ll
Log Message:
-----------
[aarch64] Fix Arm64EC libcall lowering after recent refactoring. (#143977)
The refactored code accidentally tokenized a string instead of just
concatenating it.
Add a regression test and some assertions to ensure consistency.
Fixes #143890 .
Commit: 9fcd14d9b013d0c4b8ec245772b3be3d5c31b885
https://github.com/llvm/llvm-project/commit/9fcd14d9b013d0c4b8ec245772b3be3d5c31b885
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M mlir/docs/DefiningDialects/Constraints.md
M mlir/include/mlir/IR/Constraints.td
A mlir/test/mlir-tblgen/attr-constraints.td
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
Log Message:
-----------
[MLIR][ODS] Optionally generate public C++ functions for attribute constraints (#144275)
Add `gen-attr-constraint-decls` and `gen-attr-constraint-defs`, which
generate public C++ functions for attribute constraints. The name of the C++
function is specified in the `cppFunctionName` field.
This generalize `cppFunctionName` from `TypeConstraint` introduced in
https://github.com/llvm/llvm-project/pull/104577 to be usable also in `AttrConstraint`.
Commit: 0bb4d9c30207c4a69731e6848ba7cb6ef52b5906
https://github.com/llvm/llvm-project/commit/0bb4d9c30207c4a69731e6848ba7cb6ef52b5906
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
R llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
R llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn
Log Message:
-----------
ARM: Migrate to the new relocation specifier representation
Use MCSpecifierExpr directly and remove the ARMMCExpr subclass. Define
printImpl and evaluateAsRelocationImpl within ARM*MCAsmInfo classes.
While there is some duplication, it enables better separation for
object file formats.
Commit: ee2d7a6975f37c11bffbf3207879696aca7fcc65
https://github.com/llvm/llvm-project/commit/ee2d7a6975f37c11bffbf3207879696aca7fcc65
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
Log Message:
-----------
MIPS: Remove unneeded printImpl
Follow-up to 05a9ad977624c4f6def7c0f4cf7103e28d6c6541
Commit: 8341c2e86dc4e2585d2b74f9c98d5d3108028820
https://github.com/llvm/llvm-project/commit/8341c2e86dc4e2585d2b74f9c98d5d3108028820
Author: Iris Shi <0.0 at owo.li>
Date: 2025-06-16 (Mon, 16 Jun 2025)
Changed paths:
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M clang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
M clang-tools-extra/clang-tidy/bugprone/NotNullTerminatedResultCheck.cpp
M clang-tools-extra/clang-tidy/hicpp/ExceptionBaseclassCheck.cpp
M clang-tools-extra/clang-tidy/misc/StaticAssertCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseBoolLiteralsCheck.cpp
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/modularize/CoverageChecker.cpp
M clang-tools-extra/modularize/Modularize.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
A clang-tools-extra/test/clang-reorder-fields/MacroExpansionField.cpp
M clang/CMakeLists.txt
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AttributeCommonInfo.h
A clang/include/clang/Basic/AttributeScopeInfo.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Sema/ParsedAttr.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
A clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/lib/Edit/EditedSource.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/InstallAPI/DiagnosticBuilderWrappers.cpp
M clang/lib/InstallAPI/DirectoryScanner.cpp
M clang/lib/InstallAPI/FileList.cpp
M clang/lib/InstallAPI/Frontend.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Interpreter/Value.cpp
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/lib/Tooling/ArgumentsAdjusters.cpp
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/CIR/CodeGen/complex.cpp
A clang/test/CIR/Transforms/complex-create-fold.cir
M clang/test/CXX/module/dcl.dcl/dcl.module/dcl.module.import/p1.cppm
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vslideup.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-a25.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-a45.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-ax25.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-ax45.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-n45.c
M clang/test/Driver/print-enabled-extensions/riscv-andes-nx45.c
A clang/test/FixIt/fixit-punctuator-spelling.cpp
A clang/test/FixIt/fixit-unknown-attributes.cpp
M clang/test/Misc/target-invalid-cpu-note/avr.c
M clang/test/OpenMP/declare_mapper_ast_print.c
M clang/test/OpenMP/declare_mapper_ast_print.cpp
M clang/test/Parser/cxx11-base-spec-attributes.cpp
M clang/test/Parser/objcxx11-attributes.mm
M clang/test/Sema/unknown-attributes.c
M clang/test/SemaCXX/attr-non-x86-no_caller_saved_registers.cpp
M clang/test/SemaCXX/gh102293.cpp
M clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/test/msan/ifaddrs.cpp
M compiler-rt/test/msan/qsort.cpp
M compiler-rt/test/rtsan/fork_exec.cpp
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__functional/reference_wrapper.h
M libcxx/test/std/containers/sequences/array/compare.three_way.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/compare.three_way.refwrap.const_ref.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/compare.three_way.refwrap.refwrap.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/compare.three_way.refwrap.refwrap_const.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/equal.refwrap.const_ref.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/equal.refwrap.refwrap.pass.cpp
M libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/equal.refwrap.refwrap_const.pass.cpp
R libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/helper_concepts.h
R libcxx/test/std/utilities/function.objects/refwrap/refwrap.comparissons/helper_types.h
M libcxx/test/support/test_comparisons.h
M libcxx/test/support/test_container_comparisons.h
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/SyntheticSections.cpp
M lld/MachO/SyntheticSections.cpp
M lld/test/ELF/riscv-feature-zicfilp-func-sig.s
M lld/test/ELF/riscv-feature-zicfilp-unlabeled.s
M lld/test/ELF/riscv-feature-zicfiss.s
R lld/test/wasm/lto/Inputs/libcall-return-addr.ll
R lld/test/wasm/lto/libcall-return-addr.ll
M lld/wasm/Driver.cpp
M llvm/cmake/modules/FindFFI.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/RISCVUsage.rst
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCInst.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
M llvm/lib/Target/ARC/ARCTargetTransformInfo.h
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
R llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
R llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/AVR/AVRDevices.td
M llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/BPF/BPFTargetTransformInfo.h
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
M llvm/lib/Target/Lanai/LanaiMCInstLower.cpp
M llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
M llvm/lib/Target/Lanai/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
R llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.cpp
R llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.h
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.h
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kMCInstLower.cpp
M llvm/lib/Target/M68k/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.cpp
R llvm/lib/Target/M68k/MCTargetDesc/M68kMCExpr.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsMCInstLower.h
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/Mips/MipsTargetTransformInfo.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXMCExpr.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCTargetObjectFile.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
R llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcTargetObjectFile.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.cpp
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCExpr.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp
M llvm/lib/Target/SystemZ/SystemZMCInstLower.h
M llvm/lib/Target/SystemZ/SystemZTargetObjectFile.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
M llvm/lib/Target/VE/VEAsmPrinter.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/VE/VEMCInstLower.cpp
M llvm/lib/Target/VE/VETargetTransformInfo.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Target/XCore/XCoreTargetTransformInfo.h
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.h
R llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
A llvm/test/CodeGen/AArch64/arm64ec-builtins.ll
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
M llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll
M llvm/test/CodeGen/Mips/llvm-ir/load.ll
M llvm/test/CodeGen/Mips/llvm-ir/store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/vrgatherei16.ll
M llvm/test/CodeGen/RISCV/rvv/vslidedown.ll
M llvm/test/CodeGen/RISCV/rvv/vslideup.ll
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
M llvm/test/MC/Lanai/conditional_inst.s
M llvm/test/MC/Lanai/memory.s
M llvm/test/MC/RISCV/xqcilsm-invalid.s
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/double-float-shrink-2.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
M llvm/test/Transforms/InstCombine/icmp-dom.ll
M llvm/test/Transforms/InstCombine/icmp-sub.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-branch-weights.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/tools/llvm-mca/RISCV/Andes45/gpr.s
M llvm/tools/llvm-shlib/CMakeLists.txt
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/CodeGenInstruction.h
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
M llvm/utils/TableGen/Common/DAGISelMatcher.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/X86DisassemblerTables.cpp
M llvm/utils/UpdateTestChecks/asm.py
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/Lanai/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn
M mlir/docs/DefiningDialects/Constraints.md
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/IR/Constraints.td
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
A mlir/test/mlir-tblgen/attr-constraints.td
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/el-ev/populate-simplify-demanded-bits
Compare: https://github.com/llvm/llvm-project/compare/e17d8d0fafa7...8341c2e86dc4
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