[all-commits] [llvm/llvm-project] db8d34: [VPlan] Set branch weight metadata on middle term ...
Pengcheng Wang via All-commits
all-commits at lists.llvm.org
Fri Jun 13 00:25:58 PDT 2025
Branch: refs/heads/users/wangpc-pp/spr/riscv-support-non-power-of-2-types-when-expanding-memcmp
Home: https://github.com/llvm/llvm-project
Commit: db8d34db26e9ea92c08d6e813eca9cce40c48478
https://github.com/llvm/llvm-project/commit/db8d34db26e9ea92c08d6e813eca9cce40c48478
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Set branch weight metadata on middle term in VPlan (NFC) (#143035)
Manage branch weights for the BranchOnCond in the middle block in VPlan.
This requires updating VPInstruction to inherit from VPIRMetadata, which
in general makes sense as there are a number of opcodes that could take
metadata.
There are other branches (part of the skeleton) that also need branch
weights adding.
PR: https://github.com/llvm/llvm-project/pull/143035
Commit: 2a27c059eccd96b6e46464dbdf69fd2f6237a56c
https://github.com/llvm/llvm-project/commit/2a27c059eccd96b6e46464dbdf69fd2f6237a56c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/bsr.ll
M llvm/test/CodeGen/X86/pr40090.ll
Log Message:
-----------
[X86] Use BSR passthrough behaviour to fold (CMOV (BSR ?, X), Y, (X == 0)) -> (BSR Y, X) (#143662)
Make use of targets that support BSR "pass through behaviour" on a zero input to remove a CMOV thats performing the same function
BSF will be a trickier patch as we need to make sure it works with the "REP BSF" hack in X86MCInstLower
Commit: 1d1f9afe911c360b9505b5fd2c712cb112c8aa5f
https://github.com/llvm/llvm-project/commit/1d1f9afe911c360b9505b5fd2c712cb112c8aa5f
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
A clang/test/Modules/pr143788.cppm
Log Message:
-----------
[C++20] [Modules] Treat directly imported internal partition unit as reachable
Close https://github.com/llvm/llvm-project/issues/143788
See the discussion for details.
Commit: 8e4fdff6f02161d878a63900abb35aaa32ff85e9
https://github.com/llvm/llvm-project/commit/8e4fdff6f02161d878a63900abb35aaa32ff85e9
Author: Omair Javaid <omair.javaid at linaro.org>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/test/CodeGen/X86/tailcc-ssp.ll
Log Message:
-----------
[X86] Update tailcc-ssp.ll assertions using update_llc_test_checks.py (#143500)
The assertions in llvm/test/CodeGen/X86/tailcc-ssp.ll were outdated. The
initial comment indicated they were generated with
`utils/update_llc_test_checks.py UTC_ARGS: --version 5`, but this was
not accurate based on the file's content.
Running `utils/update_llc_test_checks.py` regenerated the assertions,
aligning them with the current `llc` output.
This commit ensures that the test's claimed behavior accurately reflects
the actual `llc` output, even though the tests were already passing.
This was identified by @efriedma-quic during review of #136290.
Submitting a separate PR to make sure these changes stay isolated.
Commit: 3e5d50f9c61bb266ab17919ab5209c7b08520aff
https://github.com/llvm/llvm-project/commit/3e5d50f9c61bb266ab17919ab5209c7b08520aff
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-invalid.ll
Log Message:
-----------
[NVPTX] Add cta_group support to TMA G2S intrinsics (#143178)
This patch extends the TMA G2S intrinsics with the
support for cta_group::1/2 available from Blackwell onwards.
The existing intrinsics are auto-upgraded with a default
value of '0' for the `cta_group` flag operand.
* lit tests are added for all combinations of the newer variants.
* Negative tests are added to validate the error-handling
when the value of the cta_group flag falls out-of-range.
* The generated PTX is verified with a 12.8 ptxas executable.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: a8c6fb4cb8e686f733e022afc549bc085d1558f4
https://github.com/llvm/llvm-project/commit/a8c6fb4cb8e686f733e022afc549bc085d1558f4
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/test/Analysis/ScopedNoAliasAA/alias-scope-merging.ll
M llvm/test/Transforms/MemCpyOpt/callslot_badaa.ll
Log Message:
-----------
[MemCpyOpt] Fix lifetime marker sizes in tests (NFC)
As pointed out in https://github.com/llvm/llvm-project/pull/143782,
these tests were specifying the size in bits instead of bytes.
In order to preserve the intent of the tests, add a use of %src,
which prevents stack-move optimization. These are supposed to test
the handling of scoped alias metadata in call slot optimization.
Commit: 5987f1ee5cc59a05961156c04010ab0f3c857628
https://github.com/llvm/llvm-project/commit/5987f1ee5cc59a05961156c04010ab0f3c857628
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/narrow-switch.ll
Log Message:
-----------
[InstCombine] Regenerate `narrow-switch.ll` test (NFC)
`narrow-switch.ll` test has been regenerated via latest UTC using
`--prefix-filecheck-ir-name _`, so as to avoid conflicts with
scripted variable names.
Commit: 7ef77eb9984d1fb537a409cf4be89560fbb681fe
https://github.com/llvm/llvm-project/commit/7ef77eb9984d1fb537a409cf4be89560fbb681fe
Author: Luke Lau <luke at igalia.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
Log Message:
-----------
[LV] Support scalable interleave groups for factors 3,5,6 and 7 (#141865)
Currently the loop vectorizer can only vectorize interleave groups for
power-of-2 factors at scalable VFs by recursively interleaving
[de]interleave2 intrinsics.
However after https://github.com/llvm/llvm-project/pull/124825 and
#139893, we now have [de]interleave intrinsics for all factors up to 8,
which is enough to support all types of segmented loads and stores on
RISC-V.
Now that the interleaved access pass has been taught to lower these in
#139373 and #141512, this patch teaches the loop vectorizer to emit
these intrinsics for factors up to 8, which enables scalable
vectorization for non-power-of-2 factors.
As far as I'm aware, no in-tree target will vectorize a scalable
interelave group above factor 8 because the maximum interleave factor is
capped at 4 on AArch64 and 8 on RISC-V, and the
`-max-interleave-group-factor` CLI option defaults to 8, so the
recursive [de]interleaving code has been removed for now.
Factors of 3 with scalable VFs are also turned off in AArch64 since
there's no lowering for [de]interleave3 just yet either.
Commit: 702b9033c115500a934a6c49c325c112b30fe47f
https://github.com/llvm/llvm-project/commit/702b9033c115500a934a6c49c325c112b30fe47f
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Lower vector-(de)interleave to multi-register uzp/zip instructions. (#143128)
Commit: d517f15e09e49e172387cb6deb76e4ee2d45d0e4
https://github.com/llvm/llvm-project/commit/d517f15e09e49e172387cb6deb76e4ee2d45d0e4
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/test/Transforms/LICM/call-hoisting.ll
Log Message:
-----------
[LICM] Regenerate test checks (NFC)
Commit: 971c49fbf361c22ccf20913f61a58c28b26c4e27
https://github.com/llvm/llvm-project/commit/971c49fbf361c22ccf20913f61a58c28b26c4e27
Author: SahilPatidar <patidarsahil2001 at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/fneg.ll
M llvm/test/Transforms/InstCombine/fsub.ll
Log Message:
-----------
[InstCombine] Ensure Safe Handling of Flags in foldFNegIntoConstant (#94148)
Fix #93769
alive2: https://alive2.llvm.org/ce/z/MHShQY
Commit: 20d5d09e99188dfc7df6e4e4f1c37512e0ab318e
https://github.com/llvm/llvm-project/commit/20d5d09e99188dfc7df6e4e4f1c37512e0ab318e
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M compiler-rt/test/lit.common.configured.in
Log Message:
-----------
[compiler-rt] remove unused default in compiler-rt lit tests (#143738)
In https://github.com/llvm/llvm-project/pull/143183 was mistakenly added
a default value to `python_root_dir` in lit tests of compiler-rt.
This is unused by the lit tests of compiler-rt, as it was meant to be
used by `lldb`.
This patch removes this change.
Commit: fe28ea37b640ea4842583df3b89e08877220fb8e
https://github.com/llvm/llvm-project/commit/fe28ea37b640ea4842583df3b89e08877220fb8e
Author: hev <wangrui at loongson.cn>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/test/CodeGen/LoongArch/lasx/xvmskcond.ll
M llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
Log Message:
-----------
[LoongArch] Add demanded bits support for [X]VMSKLTZ (#143528)
This patch adds a DAG combine hook for the [X]VMSKLTZ nodes to simplify
their input when possible. It also implements target-specific logic in
SimplifyDemandedBitsForTargetNode to optimize away unnecessary
computations when only a subset of the sign bits in the vector results
is actually used.
Commit: 97ac6483aaead89897d9bda8a12f1f4c11fad621
https://github.com/llvm/llvm-project/commit/97ac6483aaead89897d9bda8a12f1f4c11fad621
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/Module.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CloneModule.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/llvm-dis/llvm-dis.cpp
M llvm/tools/llvm-link/llvm-link.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
Log Message:
-----------
[DebugInfo][RemoveDIs] Delete debug-info-format flag (#143746)
This flag was used to let us incrementally introduce debug records
into LLVM, however everything is now using records. It serves no
purpose now, so delete it.
Commit: 013034cd0f5ae19ef02fc35a83362874e727f13c
https://github.com/llvm/llvm-project/commit/013034cd0f5ae19ef02fc35a83362874e727f13c
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
Follow-up to 97ac6483aae, squelch an unused lambda capture warning
NewBB here was being captured for some code that was deleted in
97ac6483aae, and that leads to some warnings on some compilers.
Commit: d698ede748e66f5519cb8481abc2df89a994a059
https://github.com/llvm/llvm-project/commit/d698ede748e66f5519cb8481abc2df89a994a059
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMX/Transforms.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/test/Target/LLVMIR/amx.mlir
Log Message:
-----------
[mlir][amx] Restore conversion interface for AMX (#143871)
Restores mistakenly removed AMX interface which ensures that the custom
tile type is converted to its LLVM equivalent within other operations
such as control flow.
Fix after #140559
Commit: 0604dc199c019b23746f4a54885ba0c75569cdae
https://github.com/llvm/llvm-project/commit/0604dc199c019b23746f4a54885ba0c75569cdae
Author: Hans Wennborg <hans at chromium.org>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Revert "[VPlan] Set branch weight metadata on middle term in VPlan (NFC) (#143035)"
This caused assertion failures:
llvm/lib/Transforms/Vectorize/VPlan.h:4021:
llvm::VPBasicBlock* llvm::VPlan::getMiddleBlock():
Assertion `LoopRegion && "cannot call the function after vector loop region has been removed"' failed.
See comment on the PR.
> Manage branch weights for the BranchOnCond in the middle block in VPlan.
> This requires updating VPInstruction to inherit from VPIRMetadata, which
> in general makes sense as there are a number of opcodes that could take
> metadata.
>
> There are other branches (part of the skeleton) that also need branch
> weights adding.
>
> PR: https://github.com/llvm/llvm-project/pull/143035
This reverts commit db8d34db26e9ea92c08d6e813eca9cce40c48478.
Commit: 9f542f14701cdf70023790b206273ae8174e913a
https://github.com/llvm/llvm-project/commit/9f542f14701cdf70023790b206273ae8174e913a
Author: Ryan Buchner <92571492+bababuck at users.noreply.github.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/zicond-opts.ll
Log Message:
-----------
[RISCV] Add new tests for RISCV zicond extension (#143580)
I have a few patches to improve compilation for these tests which I will
be posting as separate MRs.
Commit: 2ecbfc0beb42abbbd2c3d28bfd576b38c44a5b46
https://github.com/llvm/llvm-project/commit/2ecbfc0beb42abbbd2c3d28bfd576b38c44a5b46
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/test/Preprocessor/init-loongarch.c
Log Message:
-----------
[LoongArch] Fix '-mno-lsx' option not disabling LASX feature (#143821)
When '-march' with LASX feature and '-mno-lsx' options are used
together, '-mno-lsx' fails to disable LASX, leaving
'HasFeatureLASX=true' and causing incorrect '__loongarch_sx/asx=1' macro
definition.
Fixes https://github.com/loongson-community/discussions/issues/95
Commit: bc7fafbeea08bf8cd9a18fa10d3d3bc63f0c45a3
https://github.com/llvm/llvm-project/commit/bc7fafbeea08bf8cd9a18fa10d3d3bc63f0c45a3
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/test/Analysis/BasicAA/captures.ll
M llvm/test/Transforms/GVN/captures.ll
Log Message:
-----------
[AA] Take read-only provenance captures into account (#143097)
Update the AA CaptureAnalysis providers to return CaptureComponents, so
we can distinguish between full provenance and read-only provenance
captures.
Use this to restrict "other" memory effects on call from ModRef to Ref.
Ideally we would also apply the same reasoning for escape sources, but
the current API cannot actually convey the necessary information (we can
only say NoAlias or MayAlias, not MayAlias but only via Ref).
Commit: 3550662c040024597485d1bfac0d733340514ae1
https://github.com/llvm/llvm-project/commit/3550662c040024597485d1bfac0d733340514ae1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
ARM: Avoid using getTargetLowering in TargetLowering (#143833)
This is this.
Commit: 633375a29f52504b0b23a30bb767de521dd3e2a8
https://github.com/llvm/llvm-project/commit/633375a29f52504b0b23a30bb767de521dd3e2a8
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/OutputSections.h
Log Message:
-----------
[llvm][DWARFLinker] Fix gcc 13 -Wuninitialized warnings (#143867)
A bit awkward that we have to switch from public to protected and back
again, but it seemed neater than putting OS all the way down at the
bottom. Since it is a public member that you're more likely to be
looking for.
llvm-project/llvm/lib/DWARFLinker/Parallel/OutputSections.h:157:67:
warning: member
‘llvm::dwarf_linker::parallel::SectionDescriptor::Contents’ is used
uninitialized [-Wuninitialized]
Which refers to the use in the constructor:
```
SectionDescriptor(DebugSectionKind SectionKind, LinkingGlobalData &GlobalData,
dwarf::FormParams Format, llvm::endianness Endianess)
: SectionDescriptorBase(SectionKind, Format, Endianess), OS(Contents),
```
Where Contents is passed to `OS`, before Contents has been constructed.
Commit: aac603c47800bf2e167b53ddfd3bb10be292bc53
https://github.com/llvm/llvm-project/commit/aac603c47800bf2e167b53ddfd3bb10be292bc53
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
ARM: Avoid repeating hardcoded windows division libcall names (#143834)
This is properly set in the runtime libcall info, so query
the name.
Commit: b9793118423f928b8dcda933aa581f3904ae2b68
https://github.com/llvm/llvm-project/commit/b9793118423f928b8dcda933aa581f3904ae2b68
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__functional/function.h
Log Message:
-----------
[libc++] Remove allocator support from std::function (#140395)
The allocator support was removed in P0302R1, since it was impossible to
implement. We're currently providing the API for this, but ignore the
allocator in all cases but one (which is almost certainly an oversight).
That case is the `function(allocator_arg_t, const Alloc&, Func)`
constuctor. IMO we should remove the API entirely at a later date, but
this only removes most of the code for now, leaving only the public
functions. This not only simplifies the code quite a bit, but also
results in the constructor being instantiated ~8x faster.
Fixes #133901
Commit: 5aed4800f33a72c778f3b49f6389fff099ff4ff6
https://github.com/llvm/llvm-project/commit/5aed4800f33a72c778f3b49f6389fff099ff4ff6
Author: Tim Gymnich <tim at gymni.ch>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[GISel] KnownFPClass ValueTracking fix handling of vectors (#143372)
Commit: 41c8df147b83026db8612ad2ca07fc0f007e3448
https://github.com/llvm/llvm-project/commit/41c8df147b83026db8612ad2ca07fc0f007e3448
Author: woruyu <99597449+woruyu at users.noreply.github.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] Convert foldMaskedMerge to SDPatternMatch to match (m & x) | (~m & y) (#143855)
This PR resolves https://github.com/llvm/llvm-project/issues/143363
Remove foldMaskedMergeImpl entirely to use SDPatternMatch
Commit: 36ac72f4e3e4752f85c16363d630f4cfbd682e48
https://github.com/llvm/llvm-project/commit/36ac72f4e3e4752f85c16363d630f4cfbd682e48
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[llvm][MemProf] Fix unused variable warning in release build
g++-13 warned that:
llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp:1645:8: warning: variable ‘PrevIterCreatedNode’ set but not used [-Wunused-but-set-variable]
1645 | bool PrevIterCreatedNode = false;
| ^~~~~~~~~~~~~~~~~~~
When asserts were not enabled.
Commit: a08a831515919bcc384b453799f33bc97860c73b
https://github.com/llvm/llvm-project/commit/a08a831515919bcc384b453799f33bc97860c73b
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugLoc.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugLoc.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[DLCov][NFC] Propagate annotated DebugLocs through transformations (#138047)
Part of the coverage-tracking feature, following #107279.
In order for DebugLoc coverage testing to work, we firstly have to set
annotations for intentionally-empty DebugLocs, and secondly we have to
ensure that we do not drop these annotations as we propagate DebugLocs
throughout compilation. As the annotations exist as part of the DebugLoc
class, and not the underlying DILocation, they will not survive a
DebugLoc->DILocation->DebugLoc roundtrip. Therefore this patch modifies
a number of places in the compiler to propagate DebugLocs directly
rather than via the underlying DILocation. This has no effect on the
output of normal builds; it only ensures that during coverage builds, we
do not drop incorrectly annotations and therefore create false
positives.
The bulk of these changes are in replacing
DILocation::getMergedLocation(s) with a DebugLoc equivalent, and in
changing the IRBuilder to store a DebugLoc directly rather than storing
DILocations in its general Metadata array. We also use a new function,
`DebugLoc::orElse`, which selects the "best" DebugLoc out of a pair
(valid location > annotated > empty), preferring the current DebugLoc on
a tie - this encapsulates the existing behaviour at a few sites where we
_may_ assign a DebugLoc to an existing instruction, while extending the
logic to handle annotation DebugLocs at the same time.
Commit: ce747a16328b2fbc365e1cb1cb01cb400c2c1b4c
https://github.com/llvm/llvm-project/commit/ce747a16328b2fbc365e1cb1cb01cb400c2c1b4c
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/single-scalar-cast-minbw.ll
Log Message:
-----------
[LV] Pre-commit test case for support VPWidenCastRecipe in isSingleScalar. nfc (#143498)
Commit: d49bc5e621c8931679b232fa28abfc89a171105e
https://github.com/llvm/llvm-project/commit/d49bc5e621c8931679b232fa28abfc89a171105e
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/ProfileData/MemProfRadixTree.cpp
Log Message:
-----------
[llvm][MemProf] Correct position of LLVM_ABI macro in computeFrameHistogram
The previous placement resulted in this warning when using g++-13:
/home/david.spickett/llvm-project/llvm/include/llvm/Support/Compiler.h:120:43: warning: attribute ignored [-Wattributes]
120 | #define LLVM_ATTRIBUTE_VISIBILITY_DEFAULT [[gnu::visibility("default")]]
| ^
/home/david.spickett/llvm-project/llvm/include/llvm/Support/Compiler.h:213:18: note: in expansion of macro ‘LLVM_ATTRIBUTE_VISIBILITY_DEFAULT’
213 | #define LLVM_ABI LLVM_ATTRIBUTE_VISIBILITY_DEFAULT
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/home/david.spickett/llvm-project/llvm/lib/ProfileData/MemProfRadixTree.cpp:245:5: note: in expansion of macro ‘LLVM_ABI’
245 | LLVM_ABI computeFrameHistogram<FrameId>(
| ^~~~~~~~
/home/david.spickett/llvm-project/llvm/include/llvm/Support/Compiler.h:120:43: note: an attribute that appertains to a type-specifier is ignored
120 | #define LLVM_ATTRIBUTE_VISIBILITY_DEFAULT [[gnu::visibility("default")]]
| ^
According to the interface guide, that macro should go before the return
type to be effective.
https://llvm.org/docs/InterfaceExportAnnotations.html#specialized-template-functions
Commit: 843f256623a68f51a80ae503c08b98433eeda04d
https://github.com/llvm/llvm-project/commit/843f256623a68f51a80ae503c08b98433eeda04d
Author: Nico Weber <thakis at chromium.org>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn
Log Message:
-----------
[gn] port 20d5d09e99188
Commit: 622df892b844749440124167e8eee9e652fba613
https://github.com/llvm/llvm-project/commit/622df892b844749440124167e8eee9e652fba613
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lldb/cmake/modules/AddLLDB.cmake
M lldb/source/Plugins/Language/ObjC/CMakeLists.txt
Log Message:
-----------
[lldb/cmake] Remove EXTRA_CXXFLAGS arg (#143731)
We have one library using this and three libraries directly calling
`target_compile_options`. Might as well standardize on the latter.
Commit: b8e3e0749fb62a9845f8790f858e11f2558f94a2
https://github.com/llvm/llvm-project/commit/b8e3e0749fb62a9845f8790f858e11f2558f94a2
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
Log Message:
-----------
[InstCombine] Export logic for common base pointer (NFC)
Make this available to other parts of InstCombine, to be used for
pointer comparison optimization.
Commit: 3100b50f78c06dcd5207140e0d6e5ba6954d8828
https://github.com/llvm/llvm-project/commit/3100b50f78c06dcd5207140e0d6e5ba6954d8828
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
Log Message:
-----------
[AMDGPU] Flatten recursive register resource info propagation (#142766)
In #112251 I had mentioned I'd follow up with flattening of recursion
for register resource info propagation
Behaviour prior to this patch when a recursive call is used is to take
the module scope worst case function register use (even prior to
AMDGPUMCResourceInfo). With this patch it will, when a cycle is
detected, attempt to do a simple cycle avoidant dfs to find the worst
case constant within the cycle and the cycle's propagates. In other
words, it will attempt to look for the cycle scope worst case rather
than module scope worst case.
Commit: 79f4a43839386e785451c8f0a362b2d1e5850b74
https://github.com/llvm/llvm-project/commit/79f4a43839386e785451c8f0a362b2d1e5850b74
Author: Shamshura Egor <164661612+egorshamshura at users.noreply.github.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/avgfloors.ll
M llvm/test/CodeGen/X86/avx512-cvt.ll
M llvm/test/CodeGen/X86/avx512-logic.ll
M llvm/test/CodeGen/X86/avx512fp16-arith.ll
M llvm/test/CodeGen/X86/avx512vl-logic.ll
M llvm/test/CodeGen/X86/combine-bitselect.ll
M llvm/test/CodeGen/X86/combine-or-shuffle.ll
M llvm/test/CodeGen/X86/fp-round.ll
M llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/pmul.ll
M llvm/test/CodeGen/X86/psubus.ll
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-512.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-512.ll
M llvm/test/CodeGen/X86/vector-shuffle-avx512.ll
M llvm/test/CodeGen/X86/vselect-pcmp.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
Use "mem" just for full width loads and "m32bcst" / "m64bcst" for 32-bit (D) / 64-bit (Q) broadcasts.
Fixes #143679
---------
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: cc17f68e566ab7db4ac8e95dc857e49e10d8366c
https://github.com/llvm/llvm-project/commit/cc17f68e566ab7db4ac8e95dc857e49e10d8366c
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AMDGPU/external-shuffle.ll
Log Message:
-----------
[SLP] NFC: Precommit test for pull/137419 (#137730)
Precommit for https://github.com/llvm/llvm-project/pull/137419
Commit: e1e1836bbd70e4f30bd0be97b9d81eabfd6b45c8
https://github.com/llvm/llvm-project/commit/e1e1836bbd70e4f30bd0be97b9d81eabfd6b45c8
Author: Omair Javaid <omair.javaid at linaro.org>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86TargetMachine.cpp
R llvm/lib/Target/X86/X86WinFixupBufferSecurityCheck.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-windows.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
A llvm/test/CodeGen/X86/stack-protector-msvc-oz.ll
M llvm/test/CodeGen/X86/stack-protector-msvc.ll
M llvm/test/CodeGen/X86/tailcc-ssp.ll
M llvm/test/DebugInfo/COFF/fpo-stack-protect.ll
Log Message:
-----------
[CodeGen] Inline stack guard check on Windows (#136290)
This patch optimizes the Windows security cookie check mechanism by
moving the comparison inline and only calling __security_check_cookie
when the check fails. This reduces the overhead of making a DLL call
for every function return.
Previously, we implemented this optimization through a machine pass
(X86WinFixupBufferSecurityCheckPass) in PR #95904 submitted by
@mahesh-attarde. We have reverted that pass in favor of this new
approach. Also we have abandoned the AArch64 specific implementation
of same pass in PR #121938 in favor of this more general solution.
The old machine instruction pass approach:
- Scanned the generated code to find __security_check_cookie calls
- Modified these calls by splitting basic blocks
- Added comparison logic and conditional branching
- Required complex block management and live register computation
The new approach:
- Implements the same optimization during instruction selection
- Directly emits the comparison and conditional branching
- No need for post-processing or basic block manipulation
- Disables optimization at -Oz.
Thanks @tamaspetz, @efriedma-quic and @arsenm for their help.
Commit: 36878158586b92e53dd615264f883e9d7530d047
https://github.com/llvm/llvm-project/commit/36878158586b92e53dd615264f883e9d7530d047
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Log Message:
-----------
[gn build] Port e1e1836bbd70
Commit: b6a56b8ef26a6b612eb5f49d37024666b073481e
https://github.com/llvm/llvm-project/commit/b6a56b8ef26a6b612eb5f49d37024666b073481e
Author: Tobias Stadler <mail at stadler-tobias.de>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/test/tools/llvm-remarkutil/convert.test
M llvm/tools/llvm-remarkutil/RemarkConvert.cpp
Log Message:
-----------
[llvm-remarkutil] bitstream2yaml: Keep output file (#143220)
Keep the output file on successful exit, otherwise `llvm-remarkutil
bitstream2yaml -o filename.yaml ...` does not produce any output,
because the output file is deleted when the tool exits.
Commit: ca5b71a4559890a9768558ddea724782fb638bfa
https://github.com/llvm/llvm-project/commit/ca5b71a4559890a9768558ddea724782fb638bfa
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
A llvm/test/Transforms/LowerMatrixIntrinsics/select.ll
Log Message:
-----------
[Matrix] Propagate shape information through Select insts (#141876)
Commit: bba4ded3c2f94fe0de6011a6941b135b3cb0370a
https://github.com/llvm/llvm-project/commit/bba4ded3c2f94fe0de6011a6941b135b3cb0370a
Author: A. Jiang <de34 at live.cn>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libcxx/include/bitset
M libcxx/test/std/utilities/template.bitset/bitset.cons/char_ptr_ctor.pass.cpp
Log Message:
-----------
[libc++] Fix constructing `bitset` from non-null-terminated arrays (#143691)
Unconditional evaluation of `char_traits<_CharT>::length(__str)` is problematic, because it causes
UB when `__str` points to a non-null-terminated array. We should only call `length` (currently, in
`basic_string_view`'s constructor) when `__n == npos` per [bitset.cons]/8.
Drive-by change: Reduction of conditional compilation, given that
- both `basic_string_view<_CharT>::size_type` and `basic_string<_CharT>::size_type` must be
`size_t`, and thus
- both `basic_string_view<_CharT>::npos` and `basic_string<_CharT>::npos` must be `size_t(-1)`.
For the type sameness in the standard wording, see:
- [string.view.template.general]
- [basic.string.general]
- [allocator.traits.types]/6
- [default.allocator.general]/1
Fixes #143684
Commit: 5c1a021f7f285f702a290d7faaaf0a274b3bf5a1
https://github.com/llvm/llvm-project/commit/5c1a021f7f285f702a290d7faaaf0a274b3bf5a1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libcxx/docs/ABIGuarantees.rst
Log Message:
-----------
[libc++] Fix typos in documentation (#143912)
Commit: 4f60321ca183ebf132e97e54d8d560643c5c3340
https://github.com/llvm/llvm-project/commit/4f60321ca183ebf132e97e54d8d560643c5c3340
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M offload/liboffload/API/Common.td
M offload/liboffload/API/Kernel.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
Log Message:
-----------
[Offload] Add `ol_dimensions_t` and convert ranges from size_t -> uint32_t (#143901)
This is a three element x, y, z size_t vector that can be used any place
where a 3D vector is required. This ensures that all vectors across
liboffload are the same and don't require any resizing/reordering
dances.
Commit: 4bd0a0e50bcfc3263c219acc9709ae234a334456
https://github.com/llvm/llvm-project/commit/4bd0a0e50bcfc3263c219acc9709ae234a334456
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
Log Message:
-----------
Revert "[flang] Enable delayed localization by default for `do concurrent` (#142567)" (#143905)
This reverts commit 937be177528de156922c1b5f6cab08ba3009dbf2.
Resolves https://github.com/llvm/llvm-project/issues/143897 until the
todo is properly handled.
Commit: 62b694090093ed34d620dd1129b194fc66fa4bb0
https://github.com/llvm/llvm-project/commit/62b694090093ed34d620dd1129b194fc66fa4bb0
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
Log Message:
-----------
[mlir][spirv] Add definition for GL Pack/UnpackHalf2x16 (#143889)
Commit: e4de74ba11eadb47cf78afbabffbf2b1a50e7298
https://github.com/llvm/llvm-project/commit/e4de74ba11eadb47cf78afbabffbf2b1a50e7298
Author: Nicolas Vasilache <nicolas.vasilache at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][Vector] Tighten up application conditions in TransferReadAfter… (#143869)
…WriteToBroadcast
The pattern would previously apply in spurious cases and generate
incorrect IR.
In the process, we disable the application of this pattern in the case
where there is no broadcast; this should be handled separately and may
more easily support masking.
The case {no-broadcast, yes-transpose} was previously caught by this
pattern and arguably could also generate incorrect IR (and was also
untested): this case does not apply anymore.
The last cast {yes-broadcast, yes-transpose} continues to apply but
should arguably be removed from the future because creating transposes
as part of canonicalization feels dangerous.
There are other patterns that move permutation logic:
- either into the transfer, or
- outside of the transfer
Ideally, this would be target-dependent and not a canonicalization (i.e.
does your DMA HW allow transpose on the fly or not) but this is beyond
the scope of this PR.
Co-authored-by: Nicolas Vasilache <nicolasvasilache at users.noreply.github.com>
Commit: 2e5fb77ce03748608cfad49fd62479fc3d912372
https://github.com/llvm/llvm-project/commit/2e5fb77ce03748608cfad49fd62479fc3d912372
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/utils/llvm-test-mustache-spec/llvm-test-mustache-spec.cpp
Log Message:
-----------
[llvm] Make TestData compatible with c++20 (#143801)
The clang-debian-cpp20 buildbot did not like direct initialization
without a matching constructor. This patch adds a new constructor taking
a json::Object that directly initializes the struct fields. We also
update an internal interface for const correctness.
https://lab.llvm.org/buildbot/#/builders/108/builds/13950
Commit: 9b679889b596aa5076062d5fbbdd01e3532b4ff5
https://github.com/llvm/llvm-project/commit/9b679889b596aa5076062d5fbbdd01e3532b4ff5
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Darwin.cpp
A clang/test/Driver/darwin-invalid-version-range.c
Log Message:
-----------
[clang][darwin] Fix assertion failure when reporting fatal errors when inferring OS versions (#143817)
Commit: f6eaa2b00cc8d6421934cc92d4b210348809d700
https://github.com/llvm/llvm-project/commit/f6eaa2b00cc8d6421934cc92d4b210348809d700
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
Reland "[clang-format][NFC] Clean up fillRanges() in ClangFormat.cpp" (#143477)
Reapply https://github.com/llvm/llvm-project/pull/143236 and fix the bug
reported in
https://github.com/llvm/llvm-project/pull/143236#issuecomment-2957102180.
Commit: f12b1ed11672bc40a53fb1180541b2fda6e7d9fc
https://github.com/llvm/llvm-project/commit/f12b1ed11672bc40a53fb1180541b2fda6e7d9fc
Author: Kajetan Puchalski <kajetan.puchalski at arm.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/Todo/target-parallel-private.f90
A flang/test/Lower/OpenMP/Todo/target-teams-private.f90
Log Message:
-----------
[flang][OpenMP] Add TODOs for target [teams|parallel] private (#143706)
Using the private clause on `target teams` or `target parallel` is not
currently implemented and causes crashes during lowering. Add
appropriate TODOs.
Resolves https://github.com/llvm/llvm-project/issues/116428.
Signed-off-by: Kajetan Puchalski <kajetan.puchalski at arm.com>
Commit: 13fe07d670e8a115929c9e595c4490ef5c75f583
https://github.com/llvm/llvm-project/commit/13fe07d670e8a115929c9e595c4490ef5c75f583
Author: tynasello-google <tynasello at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libcxx/cmake/caches/AndroidNDK.cmake
R libcxx/test/configs/llvm-libc++-android-ndk.cfg.in
A libcxx/test/configs/llvm-libc++-android.cfg.in
R libcxxabi/test/configs/llvm-libc++abi-android-ndk.cfg.in
A libcxxabi/test/configs/llvm-libc++abi-android.cfg.in
Log Message:
-----------
[libc++] Expand Android libc++ test config files (#142846)
Parameterize (and rename) existing libc++/libc++abi test configuration
files for the Android NDK to work for both the NDK and platform.
Android LLVM downstream seeks to test libc++ for both the NDK and
platform build (currently only testing the NDK), which will use almost
identical test configuration files. The only difference is the name of
the libc++ shared object used. Because of this we parameterize the
current test files (for both libc++ and libc++abi) with the existing
LIBCXX_SHARED_OUTPUT_NAME cmake variable, and rename the file
accordingly.
Commit: 1c1df94d09820959c771cb4aaae4d36cdf5cab5a
https://github.com/llvm/llvm-project/commit/1c1df94d09820959c771cb4aaae4d36cdf5cab5a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/test/API/functionalities/memory/find/TestMemoryFind.py
M lldb/test/API/functionalities/memory/find/main.cpp
Log Message:
-----------
[lldb][Commands][NFC] Extract memory find expression evaluation into helpers (#143686)
This patch factors out the `-e` option logic into two helper functions.
The `EvaluateExpression` helper might seem redundant but I'll be adding
to it in a follow-up patch to fix an issue when running `memory find -e`
for Swift targets.
Also adds test coverage for the error cases that were previously
untested.
rdar://152113525
Commit: 2a905dd1ebb46a6865b1f4743589b50cdb2cb4f0
https://github.com/llvm/llvm-project/commit/2a905dd1ebb46a6865b1f4743589b50cdb2cb4f0
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
Log Message:
-----------
[Matrix] Use range-for in Visit* Result construction. NFC
Commit: 316f530724ee2e870886e75729799afbcc1ff8d3
https://github.com/llvm/llvm-project/commit/316f530724ee2e870886e75729799afbcc1ff8d3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] getTargetConstantBitsFromNode - handle EXTRACT_SUBVECTOR through bitcasts (#143886)
Generalize the extraction index/width to account for any changes in type through bitcasts
Commit: a53003fe23cb6c871e72d70ff2d3a075a7490da2
https://github.com/llvm/llvm-project/commit/a53003fe23cb6c871e72d70ff2d3a075a7490da2
Author: kotborealis <kotborealis at awooo.ru>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libcxx/utils/gdb/libcxx/printers.py
Log Message:
-----------
[libc++] Update GDB pretty-printer to work with GDB 17 (#142106)
This patch fixes an issue in libcxx/utils/gdb/libcxx/printers.py.
With gdb 17 (binutils 2_44) pretty-printers do not work anymore because
calls to `gdb.printing` requires `import gdb.printing` statement, which
was missing from the `printers.py`.
This was broken after commit https://github.com/bminor/binutils-gdb/commit/fc14343205d3a
and `import gdb.printing` was first referenced in https://github.com/bminor/binutils-gdb/commit/ee06c79b0f.
Co-authored-by: Dmitry Chestnykh <dm.chestnykh at gmail.com>
Commit: 882b58a90ae0c4a91e1ecda6df3767b0fc44dab1
https://github.com/llvm/llvm-project/commit/882b58a90ae0c4a91e1ecda6df3767b0fc44dab1
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/test/CodeGen/DirectX/flatten-array.ll
M llvm/test/CodeGen/DirectX/flatten-bug-117273.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-bug-117273.ll
Log Message:
-----------
[DirectX] Reland #142853 with Circular GEP fixes (#143747)
This change relands https://github.com/llvm/llvm-project/pull/142853
It fixes the circular reference issue we were seeing in GEPs
ex `%.flat = getelementptr inbounds [16 x i32], ptr %.flat, i32 0, i32
15`
Commit: ef1cb8277ac3cb34ce9700a313ed60410dd9f84b
https://github.com/llvm/llvm-project/commit/ef1cb8277ac3cb34ce9700a313ed60410dd9f84b
Author: Nathan Gauër <brioche at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/test/CodeGen/SPIRV/ExecutionMode_Fragment.ll
Log Message:
-----------
[SPIR-V] Fix ExecutionMode generation (#143888)
PR #141787 added code to emit the Fragment execution model. This
required emitting the OriginUpperLeft ExecutionMode. But this was done
by using the same codepath used for OpEntrypoint.
This has 2 issues:
- the interface variables were added to both OpEntryPoint and
OpExecutionMode.
- the existing OpExecutionMode logic was not used.
This commit fixes this, regrouping OpExecutionMode handling in one
place, and fixing bad codegen issue when interface variiables are added.
Commit: daee5eee8562d26d234f85152e803b6571b15ee2
https://github.com/llvm/llvm-project/commit/daee5eee8562d26d234f85152e803b6571b15ee2
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M offload/test/offloading/gpupgo/pgo_atomic_teams.c
M offload/test/offloading/gpupgo/pgo_atomic_threads.c
Log Message:
-----------
[Offload][PGO] Fix new GPU PGO tests (#143645)
`pgo_atomic_teams.c` and `pgo_atomic_threads.c` currently are set to run
on NVPTX despite the changes for that target not being upstreamed yet.
This patch also replaces instances of `llvm-profdata` with `%profdata`
in those tests.
Commit: c6da2c877cb407c0404e58c5ca257d12036ed164
https://github.com/llvm/llvm-project/commit/c6da2c877cb407c0404e58c5ca257d12036ed164
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lldb/source/Commands/CommandObjectMemory.cpp
Log Message:
-----------
[lldb][Commands] Fix memory find for Swift expressions (#143860)
(depends on https://github.com/llvm/llvm-project/pull/143686)
There were two issues previously preventing `memory find -e` expressions
to succeed when stopped in Swift frames:
1. We weren't getting the dynamic type of the result `ValueObject`.
For Swift this would fail when we tried to produce a scalar value
out of it because the static VO wasn't sufficient to get to the
integer value. Hence we add a call to
`GetQualifiedRepresentationIfAvailable`
(which is what we do for expressions in `OptionArgParser::ToAddress`
too).
2. We weren't passing an `ExecutionContextScope` to `GetByteSize`, which
Swift relied on to get the size of the result type.
My plan is to add an API test for this on the Apple
`swiftlang/llvm-project` fork.
I considered an alternative where we use `OptionArgParser::ToAddress`
for `memory find -e` expressions, but it got a bit icky when trying to
figure out how many bytes we should copy out of the result into the
`DataBufferHeap` (currently we rely on the size of the result variable
type). This gets even trickier when we were to pass an expression that
was actually a hex digit or a number into `ToAddress`.
rdar://152113525
Commit: 4039fdb7ba5a0d9ead5bdc0404f036063a4ca95d
https://github.com/llvm/llvm-project/commit/4039fdb7ba5a0d9ead5bdc0404f036063a4ca95d
Author: W. Turner Abney <weebney at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/sys_ioctl_macros.h
M libc/include/llvm-libc-macros/linux/sys-ioctl-macros.h
M libc/src/sys/CMakeLists.txt
A libc/src/sys/ioctl/CMakeLists.txt
A libc/src/sys/ioctl/ioctl.h
A libc/src/sys/ioctl/linux/CMakeLists.txt
A libc/src/sys/ioctl/linux/ioctl.cpp
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/ioctl/CMakeLists.txt
A libc/test/src/sys/ioctl/linux/CMakeLists.txt
A libc/test/src/sys/ioctl/linux/ioctl_test.cpp
Log Message:
-----------
[libc] add ioctl (#141393)
Closes #85275
Closes #90317
Updates #97191
---------
Co-authored-by: Joseph Huber <huberjn at outlook.com>
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: 77834a40cf350d2fe63fac26222c3918f5f348fd
https://github.com/llvm/llvm-project/commit/77834a40cf350d2fe63fac26222c3918f5f348fd
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/test/CIR/CodeGen/ctor.cpp
Log Message:
-----------
[CIR] Upstream support for emitting constructors (#143639)
This change upstreams the code to emit simple constructor defintions.
Commit: 639c19ddb688595a69ad9f83a40aa32e2187134c
https://github.com/llvm/llvm-project/commit/639c19ddb688595a69ad9f83a40aa32e2187134c
Author: long.chen <lipracer at gmail.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M mlir/include/mlir/ExecutionEngine/MemRefUtils.h
Log Message:
-----------
[NFC][mlir] make the assert consistent with the declared behavior (#143874)
Commit: 56548e1d9b2ed4f5d2fe3913c27af770cf0e06e5
https://github.com/llvm/llvm-project/commit/56548e1d9b2ed4f5d2fe3913c27af770cf0e06e5
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/test/Transforms/LowerMatrixIntrinsics/select.ll
Log Message:
-----------
[Matrix] Fix a crash in VisitSelectInst due to iteration length mismatch
Commit: 31daed868d69ac1ac6f6a29340d0b5e0e6dc39ab
https://github.com/llvm/llvm-project/commit/31daed868d69ac1ac6f6a29340d0b5e0e6dc39ab
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/xqcibm-extract.ll
Log Message:
-----------
[RISCV] Prefer QC_EXTU to ANDI for certain 12-bit mask immediates (#143838)
`QC_EXTU` can be compressed to `QC_C_EXTU` when the immediate is a `mask
>=63`. We currently only handle masks that don't fit in 12-bits in
`RISCVISelDAGToDAG`.
I have added ISEL patterns in `RISCVInstrInfoXqci.td` instead of
changing code in `RISCVISelDAGToDAG` since the other extract
instructions ( in `XTHeadbb` and `XAndesPerf`) don't have compressed
versions and it is a lot easier to maintain things this way.
Commit: cd8facebabab9b61c6af1313cd1fd1e586bc2ba6
https://github.com/llvm/llvm-project/commit/cd8facebabab9b61c6af1313cd1fd1e586bc2ba6
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
A clang/test/CIR/Transforms/vector-create-fold.cir
Log Message:
-----------
[CIR] Implement folder for VecCreateOp (#143355)
This change adds a folder for the VecCreateOp
Issue https://github.com/llvm/llvm-project/issues/136487
Commit: ae7ea6e3a28c017485cc2401703d6fab1549123d
https://github.com/llvm/llvm-project/commit/ae7ea6e3a28c017485cc2401703d6fab1549123d
Author: Michael Jones <michaelrj at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libc/src/sys/ioctl/linux/ioctl.cpp
M libc/test/src/sys/ioctl/linux/CMakeLists.txt
M libc/test/src/sys/ioctl/linux/ioctl_test.cpp
Log Message:
-----------
[libc] Fix ioctl errno inclusion (#143928)
Since errno was moved in
https://github.com/llvm/llvm-project/pull/143187 the code including it
in https://github.com/llvm/llvm-project/pull/141393 was rendered
incorrect. This patch fixes the include and the cmake depends.
Commit: e65131a56335fc6b8e47c609f17df50ea65577b4
https://github.com/llvm/llvm-project/commit/e65131a56335fc6b8e47c609f17df50ea65577b4
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/test/MC/AsmParser/include.ll
Log Message:
-----------
MC,test: Specify explicit triple for include.ll
The output is subject to .set or = difference.
Commit: 2c20bc5112a18a8a893e8caea6fd59c097754d74
https://github.com/llvm/llvm-project/commit/2c20bc5112a18a8a893e8caea6fd59c097754d74
Author: fairywreath <65404740+fairywreath at users.noreply.github.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
Log Message:
-----------
[mlir][spirv] Add definitions for GL FindILsb and FindSMsb (#143916)
Adds SPIRV GL FindILsb and FindSMsb instructions which correspond to GL
instruction numbers 73 and 74.
Commit: 1a4cf1d3edff2d4c790f597834301702cfc6dc15
https://github.com/llvm/llvm-project/commit/1a4cf1d3edff2d4c790f597834301702cfc6dc15
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lldb/cmake/modules/LLDBFramework.cmake
A lldb/scripts/framework-header-fix.py
A lldb/test/Shell/Scripts/Inputs/Main/SBAddress.h
A lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
A lldb/test/Shell/Scripts/TestFrameworkFixScript.test
A lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
A lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
Log Message:
-----------
[lldb][headers] Create Python script to fix up framework headers (#142051)
This commit replaces the shell script that fixes up includes for the
LLDB framework with a Python script. This script will also be used when
fixing up includes for the LLDBRPC.framework.
Commit: 217304a09949de73a8def5ee4c7ed9510449ce4c
https://github.com/llvm/llvm-project/commit/217304a09949de73a8def5ee4c7ed9510449ce4c
Author: 黃國庭 <we3223 at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86FixupInstTuning.cpp
M llvm/test/CodeGen/X86/2012-01-12-extract-sv.ll
M llvm/test/CodeGen/X86/avx-insertelt.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512-intrinsics.ll
M llvm/test/CodeGen/X86/avx512copy-intrinsics.ll
M llvm/test/CodeGen/X86/build-vector-512.ll
M llvm/test/CodeGen/X86/buildvec-extract.ll
M llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
M llvm/test/CodeGen/X86/coalesce_commute_movsd.ll
M llvm/test/CodeGen/X86/combine-and.ll
M llvm/test/CodeGen/X86/combine-or-shuffle.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
M llvm/test/CodeGen/X86/fmsubadd-combine.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
M llvm/test/CodeGen/X86/half-constrained.ll
M llvm/test/CodeGen/X86/half-darwin.ll
M llvm/test/CodeGen/X86/insertelement-zero.ll
M llvm/test/CodeGen/X86/masked_expandload.ll
M llvm/test/CodeGen/X86/masked_gather.ll
M llvm/test/CodeGen/X86/masked_gather_scatter.ll
M llvm/test/CodeGen/X86/masked_load.ll
M llvm/test/CodeGen/X86/pr40730.ll
M llvm/test/CodeGen/X86/scalarize-fp.ll
M llvm/test/CodeGen/X86/sse-insertelt-from-mem.ll
M llvm/test/CodeGen/X86/sse-insertelt.ll
M llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse2.ll
M llvm/test/CodeGen/X86/sse41.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
M llvm/test/CodeGen/X86/vec-strict-128-fp16.ll
M llvm/test/CodeGen/X86/vec-strict-fptoint-128-fp16.ll
M llvm/test/CodeGen/X86/vec_extract-avx.ll
M llvm/test/CodeGen/X86/vec_floor.ll
M llvm/test/CodeGen/X86/vec_ss_load_fold.ll
M llvm/test/CodeGen/X86/vector-blend.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
M llvm/test/CodeGen/X86/vector-zmov.ll
M llvm/test/CodeGen/X86/vselect.ll
Log Message:
-----------
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
Fix https://github.com/llvm/llvm-project/issues/142588
Following @RKSimon’s suggestion, the transformation applies only when
the blend mask is exactly 1, indicating that the instruction behaves
like a move. Additionally, the conversion will only be performed when
optimizing for size or when the target prefers MOVSS/D over BLENDPS/D
for performance reasons.
The switch-case instructions were identified with GPT O.O .
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: 53e50472ff445bb946a53aba30649ae65f3534b1
https://github.com/llvm/llvm-project/commit/53e50472ff445bb946a53aba30649ae65f3534b1
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/Interpreter/DeviceOffload.cpp
Log Message:
-----------
[Clang][NFC] Move FatbinFileName instead of copy (#143827)
Static analysis flagged FatbinFileName since we can move it instead of
copying it.
Commit: 82f19674bff578b9afd164144fd6b75d042ac932
https://github.com/llvm/llvm-project/commit/82f19674bff578b9afd164144fd6b75d042ac932
Author: lntue <lntue at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libc/include/llvm-libc-types/size_t.h
M libc/include/llvm-libc-types/ssize_t.h
Log Message:
-----------
[libc] Update size_t and ssize_t definitions to use __SIZE_TYPE__ and __PTRDIFF_TYPE__ respectively. (#143921)
The current definition of `ssize_t` does not have the same bit width as
`size_t` on 32-bit platforms.
Commit: cbc2ef0e890e6c700023fe00c7166554f2f5ad14
https://github.com/llvm/llvm-project/commit/cbc2ef0e890e6c700023fe00c7166554f2f5ad14
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/utils/lldbDataFormatters.py
Log Message:
-----------
[llvm][utils] Add synthetic provider for llvm::DenseSet (#143631)
Add a synthetic child provider for `DenseSet`, which is a wrapper around
`DenseMap`. This provider leverages the existing `DenseMap` provider,
reshaping its dictionary structured children into a set.
Commit: eab1a1d4914a51de8383b818bf595125fb830c51
https://github.com/llvm/llvm-project/commit/eab1a1d4914a51de8383b818bf595125fb830c51
Author: halbi2 <hehiralbi at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
A libcxx/test/libcxx/containers/container.adaptors/flat.set/scary.compile.pass.cpp
Log Message:
-----------
[libc++][test] Improve test coverage for flat_set (lack of) SCARY iterators (#139649)
Missing from 5e94e26a7afb8db00cc123e5fc5471c1125596e3.
Commit: d1ca8d891ff038ec29e67065a446aa2f2043325e
https://github.com/llvm/llvm-project/commit/d1ca8d891ff038ec29e67065a446aa2f2043325e
Author: lntue <lntue at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
A libc/shared/math.h
A libc/shared/math/expf.h
M libc/src/__support/CMakeLists.txt
A libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/exp_float_constants.h
A libc/src/__support/math/expf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/expf.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
[libc][math] Refactor expf implementation to header-only in src/__support/math folder. (#143790)
This is a step in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: 6311f039b2678f0a1367a88679efb7b2e37949dc
https://github.com/llvm/llvm-project/commit/6311f039b2678f0a1367a88679efb7b2e37949dc
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libc/hdr/CMakeLists.txt
M libc/hdr/types/CMakeLists.txt
M libc/include/llvm-libc-types/char8_t.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/wchar/mbstate.h
M libc/src/__support/wchar/utf_ret.h
Log Message:
-----------
[libc] Build fixes for widechar characterconverter (#143805)
Build fixes for wchar CharacterConverter class
Commit: 9208b343e962b9f1140ee345c0050a3920bdcbf2
https://github.com/llvm/llvm-project/commit/9208b343e962b9f1140ee345c0050a3920bdcbf2
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/Basic/Targets/PPC.cpp
M clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp
M clang/test/Driver/aix-shared-lib-tls-model-opt.c
M clang/test/Driver/aix-small-local-exec-dynamic-tls.c
M clang/test/Driver/ppc-crbits.cpp
M clang/test/Driver/ppc-isa-features.cpp
M llvm/include/llvm/TargetParser/PPCTargetParser.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/TargetParser/CMakeLists.txt
M llvm/lib/TargetParser/PPCTargetParser.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[PowerPC] frontend get target feature from backend with cpu name (#137670)
1. The PR proceeds with a backend target hook to allow front-ends to
determine what target features are available in a compilation based on
the CPU name.
2. Fix a backend target feature bug that supports HTM for
Power8/9/10/11. However, HTM is only supported on Power8/9 according to
the ISA.
3. All target features that are hardcoded in PPC.cpp can be retrieved
from the backend target feature. I have double-checked that the
hardcoded logic for inferring target features from the CPU in the
frontend(PPC.cpp) is the same as in PPC.td.
Commit: 06dad352dba16fd9afa89be7abf9bb46f7552b48
https://github.com/llvm/llvm-project/commit/06dad352dba16fd9afa89be7abf9bb46f7552b48
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lldb/cmake/modules/LLDBFramework.cmake
R lldb/scripts/framework-header-fix.py
R lldb/test/Shell/Scripts/Inputs/Main/SBAddress.h
R lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
R lldb/test/Shell/Scripts/TestFrameworkFixScript.test
R lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
R lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
Log Message:
-----------
Revert "[lldb][headers] Create Python script to fix up framework headers" (#143941)
Reverts llvm/llvm-project#142051
Commit: 4e765b7a6b93b5d82e90f9a112b3eca4f873f005
https://github.com/llvm/llvm-project/commit/4e765b7a6b93b5d82e90f9a112b3eca4f873f005
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/test/CodeGen/X86/dpbusd_i4.ll
Log Message:
-----------
[x86] dpbusd_i4.ll - regenerate VPTERNLOGD asm comment
Commit: 5a6a4b6ba6945363bf366a885103a4adca11b5ef
https://github.com/llvm/llvm-project/commit/5a6a4b6ba6945363bf366a885103a4adca11b5ef
Author: Michael Jones <michaelrj at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdio.yaml
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/generic/CMakeLists.txt
A libc/src/stdio/generic/perror.cpp
A libc/src/stdio/perror.h
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/perror_test.cpp
Log Message:
-----------
[libc] Implement perror (#143624)
The perror function writes an error message directly to stderr. This
patch adds an implementation, tests, and header generation details.
Commit: f94950db89a905309ec9ea2245889df88ffd0690
https://github.com/llvm/llvm-project/commit/f94950db89a905309ec9ea2245889df88ffd0690
Author: sribee8 <145801438+sribee8 at users.noreply.github.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libc/src/__support/wchar/character_converter.cpp
M libc/src/__support/wchar/mbstate.h
Log Message:
-----------
[libc] Changed mbstate struct (#143942)
Changed the mbstate variable from bits processed to bytes processed and
implemented isComplete().
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: fd88aef21bae75b4641472badeb2abe3757872ac
https://github.com/llvm/llvm-project/commit/fd88aef21bae75b4641472badeb2abe3757872ac
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/docs/SanitizerSpecialCaseList.rst
Log Message:
-----------
[Doc][NFC] Fix Sanitizer Ignore list example errors. (#143755)
Commit: 639e811434d2c21b9161fe9955acdea28ce33c7b
https://github.com/llvm/llvm-project/commit/639e811434d2c21b9161fe9955acdea28ce33c7b
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
Log Message:
-----------
[CIR][NFC] Fix an unused variable warning (#143933)
This fixes a warning where a variable assigned in 'if' statement wasn't
referenced again.
Commit: 4a58a63280a673142fc674db1fb668b7bae00420
https://github.com/llvm/llvm-project/commit/4a58a63280a673142fc674db1fb668b7bae00420
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/test-padtensor.mlir
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
Log Message:
-----------
[mlir][linalg] Remove the `test-linalg-to-vector-patterns` option (#142116)
This patch removes the `test-linalg-to-vector-patterns` option from the
`-test-linalg-transform-patterns=` test flag. It was only used in one
test, where a more specialized transform dialect op can be used instead:
* `transform.apply_patterns.linalg.pad_vectorization`
While we could preserve `test-linalg-to-vector-patterns`, it's better to
rely on finer-grained transformations — this way, we know exactly what
is being run and tested. Now that its only use has been removed, it
feels natural to delete `test-linalg-to-vector-patterns`.
Commit: 3c1053811e6925e8b9f7a044f3a18bfda1d7ccfe
https://github.com/llvm/llvm-project/commit/3c1053811e6925e8b9f7a044f3a18bfda1d7ccfe
Author: David Rivera <davidriverg at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison.cpp
Log Message:
-----------
Revert "[clang-tidy] Improve integer comparison by matching valid expressions outside implicitCastExpr" (#143944)
Reverts llvm/llvm-project#134188
related: https://github.com/llvm/llvm-project/issues/143927
Commit: edf636afe405ff90da7bf1834aa334bd52bc861e
https://github.com/llvm/llvm-project/commit/edf636afe405ff90da7bf1834aa334bd52bc861e
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
Log Message:
-----------
[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spilling (#142220)
Remove explicit register arithmetic from spilling ACC and STXVP code.
Commit: 46085d8f83623f6ea2921459de9f731d7df762d4
https://github.com/llvm/llvm-project/commit/46085d8f83623f6ea2921459de9f731d7df762d4
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lld/ELF/Writer.cpp
M lld/test/ELF/x86-64-section-layout.s
Log Message:
-----------
[lld/ELF][x86-64] Place large executable sections at the edges of binary (#70358)
So that when mixing small and large text, large text stays out of the
way of the rest of the binary.
Place large RX sections at the beginning rather than at the end so that
with `--no-rosegment`, the large text and rodata share a single PT_LOAD
segment. Place large RWX sections at the end to keep writable and
readonly sections separate.
Clang started emitting the large section flag for `.ltext` sections in
#73037.
Commit: df7db441d4e97568a5cbf830b0810512bb702159
https://github.com/llvm/llvm-project/commit/df7db441d4e97568a5cbf830b0810512bb702159
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
Log Message:
-----------
Revert "[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spil… (#143948)
…ling (#142220)"
This reverts commit edf636afe405ff90da7bf1834aa334bd52bc861e.
checked in wrong branch.
Commit: c317eda6e3785037f16a746a1096c2cca82d9455
https://github.com/llvm/llvm-project/commit/c317eda6e3785037f16a746a1096c2cca82d9455
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
Log Message:
-----------
[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spilling (#143953)
Simpliy handling for spilling of acc reg with stx by removing explicit
register arithmetic and clean up code gen for register mapping used in
stxvp spilling.
Relanding: https://github.com/llvm/llvm-project/pull/142220
Commit: 030a471753421477c7ef345cc60091788252fabc
https://github.com/llvm/llvm-project/commit/030a471753421477c7ef345cc60091788252fabc
Author: David Green <david.green at arm.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp
Log Message:
-----------
[AArch64][Clang] Exclude address spaces from pointer-only coercion types.
As reported on #135064, the generic pointer coercion code in
CoerceIntOrPtrToIntOrPtr cannot handle address space casts (it tries to bitcast
the pointers). This bails out if an address space qualifier is found on the
pointer.
Commit: 891f6ae783b36122b0f2fadc0c2d95d7dd590415
https://github.com/llvm/llvm-project/commit/891f6ae783b36122b0f2fadc0c2d95d7dd590415
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
A llvm/test/Transforms/InstCombine/vp-reverse.ll
Log Message:
-----------
[instcombine] Add test coverage for vp.reverse elimination combines
Commit: cbf27bf711c08c34185f05ca5edbfa61bd3786e2
https://github.com/llvm/llvm-project/commit/cbf27bf711c08c34185f05ca5edbfa61bd3786e2
Author: Reid Kleckner <rnk at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/Basic/Targets/PPC.cpp
M clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp
M clang/test/Driver/aix-shared-lib-tls-model-opt.c
M clang/test/Driver/aix-small-local-exec-dynamic-tls.c
M clang/test/Driver/ppc-crbits.cpp
M clang/test/Driver/ppc-isa-features.cpp
M llvm/include/llvm/TargetParser/PPCTargetParser.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/TargetParser/CMakeLists.txt
M llvm/lib/TargetParser/PPCTargetParser.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
Revert " [PowerPC] frontend get target feature from backend with cpu name (#137670)"
This reverts commit 9208b343e962b9f1140ee345c0050a3920bdcbf2.
TargetParser shouldn't re-run the PPC subtarget tablegen target, it
should define its own `-gen-ppc-target-def` rule like all the other
targets do in llvm/include/llvm/TargetParser/CMakeLists.txt .
One user reported that there are incorrect CMake dependencies after this
change, so I will roll this back in the meantime.
Commit: c19e900ce8b422f6b8c028fbbd9ef7e9d3720236
https://github.com/llvm/llvm-project/commit/c19e900ce8b422f6b8c028fbbd9ef7e9d3720236
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
Log Message:
-----------
[AArch64] Signed comparison using CMN is safe when the subtraction is nsw (#141993)
nsw means no signed wrap, and 0 - INT_MIN is a signed wrap.
Now, this is going to be a point I need to get out of the way:
So is it okay to always transform a > -b into cmn if it is a signed
comparison, even if b is INT_MIN because -INT_MIN is undefined, at least
in C, because unless fwrapv is specified, opt puts nsw on signed integer
operations, allowing for more folds anyway.
Commit: b1f5e26b78a9550a22ee2f24bb3f220d396c452f
https://github.com/llvm/llvm-project/commit/b1f5e26b78a9550a22ee2f24bb3f220d396c452f
Author: GeorgeHuyubo <113479859+GeorgeHuyubo at users.noreply.github.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Properly handle locate module callback when Target change arch (#143793)
Since this PR: https://github.com/llvm/llvm-project/pull/141670/ We
started to override the Platform/Arch for a target if needed. However we
may have already registered locate module callback with the old
platform.
This PR will move the locate module callback to the new Platform
whenever Target changes architecture.
Co-authored-by: George Hu <georgehuyubo at gmail.com>
Commit: d65904675ea106713937c9cce24e3d1ec0bc570a
https://github.com/llvm/llvm-project/commit/d65904675ea106713937c9cce24e3d1ec0bc570a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Move logic to create trip count check to helper (NFC).
Move the logic to create the iteration count check to a separate helper,
so it can be re-used by when creating the skeleton for epilogue
vectorization as well.
Commit: 8ee9646b06cd128a6c55f375e4df431aee053c76
https://github.com/llvm/llvm-project/commit/8ee9646b06cd128a6c55f375e4df431aee053c76
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
R llvm/include/llvm/IR/VectorBuilder.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/IR/CMakeLists.txt
R llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/unittests/IR/CMakeLists.txt
R llvm/unittests/IR/VectorBuilderTest.cpp
Log Message:
-----------
[LV] Simplify creation of vp.load/vp.store/vp.reduce intrinsics (#143804)
The use of VectorBuilder here was simply obscuring what was actually
going on. For vp.load and vp.store, the resulting code is significantly
more idiomatic. For the vp.reduce cases, we remove several layers of
indirection, including passing parameters via implicit state on the
builder. In both cases, the code is significantly easier to follow.
Commit: 741ea80446e21b4052d723765011fe3583d3fc7f
https://github.com/llvm/llvm-project/commit/741ea80446e21b4052d723765011fe3583d3fc7f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
Log Message:
-----------
[gn build] Port 8ee9646b06cd
Commit: 8a8ea8fec063bd64c17e463e7c3eaae5cdb4a645
https://github.com/llvm/llvm-project/commit/8a8ea8fec063bd64c17e463e7c3eaae5cdb4a645
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lldb/cmake/modules/LLDBFramework.cmake
A lldb/scripts/framework-header-fix.py
A lldb/test/Shell/Scripts/Inputs/Main/SBAddress.h
A lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
A lldb/test/Shell/Scripts/TestFrameworkFixScript.test
A lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
A lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
Log Message:
-----------
Reland "[lldb][headers] Create Python script to fix up framework head… (#143945)
…ers" (#143941)
Reland the script that converts lldb headers to RPC headers. The RPC
test was failing due to the incorrect input filepath being used.
Original commit message:
This commit replaces the shell script that fixes up includes for the
LLDB framework with a Python script. This script will also be used when
fixing up includes for the LLDBRPC.framework.
Commit: 6f3e2c076d6e3abac9cfd756e95a1ebb5979dd88
https://github.com/llvm/llvm-project/commit/6f3e2c076d6e3abac9cfd756e95a1ebb5979dd88
Author: Florian Mayer <fmayer at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/x86-vpermi2.ll
Log Message:
-----------
[MSAN] fork avx512vl-intrinsics and x86-vpermi2 tests (#143643)
Commit: ee6362515dfa4fe4531c7a7690c270313669195b
https://github.com/llvm/llvm-project/commit/ee6362515dfa4fe4531c7a7690c270313669195b
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
Log Message:
-----------
[RISCV][CostModel] Add additional high LMUL reverse tests
Commit: e4c32a4147012da735205eb44a45b8be5eea048d
https://github.com/llvm/llvm-project/commit/e4c32a4147012da735205eb44a45b8be5eea048d
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/Frontend/CompilerInstance.cpp
Log Message:
-----------
[Clang][NFC] Move Input into SmallVector instead of copy (#143830)
Static analysis flagged Input as a large object that would benefit from
being moved over being copied.
Commit: 902a991e1245537f5fc11e031409fdd69fba1c06
https://github.com/llvm/llvm-project/commit/902a991e1245537f5fc11e031409fdd69fba1c06
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M bolt/lib/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT] Make memory profile parsing optional (#129585)
Introduce `parse-mem-profile` option to limit overheads processing
tracing data (Intel PT or ARM ETM). By default, it's enabled for
perf data (existing behavior), unless `itrace` is passed to parse
tracing data where it's extremely expensive. In this case, the flag
needs to be set explicitly if needed.
Commit: 1ac61c8334782629462e6bf7c91b3fc8f4e663e8
https://github.com/llvm/llvm-project/commit/1ac61c8334782629462e6bf7c91b3fc8f4e663e8
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/test/Dialect/SparseTensor/minipipeline_vector.mlir
M mlir/test/Dialect/SparseTensor/sparse_vector.mlir
M mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir
M mlir/test/Dialect/SparseTensor/vectorize_reduction.mlir
Log Message:
-----------
[mlir][Vector] Remove `vector.extractelement/insertelement` from sparse vectorizer (#143270)
This PR is part of the last step to remove `vector.extractelement` and `vector.insertelement` ops.
RFC: https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops
It updates the Sparse Vectorizer to use `vector.extract` and `vector.insert` instead of `vector.extractelement` and `vector.insertelement`.
Commit: 4a4035c86b0dd2b1aa09bb2ff4b6788c2bf88745
https://github.com/llvm/llvm-project/commit/4a4035c86b0dd2b1aa09bb2ff4b6788c2bf88745
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/test/CIR/CodeGen/ctor.cpp
Log Message:
-----------
[CIR] Add support for delegating constructors (#143932)
This change adds the necessary support for handling delegating
constructors in ClangIR. The implementation is kept as small as possible
by not handling any other sort of initialization (members, base classes,
etc.). That will be added in a future commit.
Commit: 8a2895ad89793591cd3f0114bc56cd345f651823
https://github.com/llvm/llvm-project/commit/8a2895ad89793591cd3f0114bc56cd345f651823
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
M lldb/source/Host/common/JSONTransport.cpp
M lldb/unittests/DAP/CMakeLists.txt
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
R lldb/unittests/DAP/TransportTest.cpp
M lldb/unittests/Host/CMakeLists.txt
A lldb/unittests/Host/JSONTransportTest.cpp
A lldb/unittests/TestingSupport/Host/PipeTestUtilities.h
Log Message:
-----------
[lldb] Implement JSON RPC (newline delimited) Transport (#143946)
This PR implements JSON RPC-style (i.e. newline delimited) JSON
transport. I moved the existing transport tests from DAP to Host and
moved the PipeTest base class into TestingSupport so it can be shared by
both.
Commit: 26f91610011f1a23cb306d61bbc1fafded7d077d
https://github.com/llvm/llvm-project/commit/26f91610011f1a23cb306d61bbc1fafded7d077d
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lld/test/Unit/lit.cfg.py
M lldb/test/API/lit.cfg.py
M lldb/test/Shell/lit.cfg.py
M lldb/test/lit.cfg.py
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/discovery.py
M llvm/utils/lit/lit/worker.py
Log Message:
-----------
[lit] cleanup unused imports (#143930)
Remove imports that are not used in some lit test files.
Commit: 2ee8fdbfddcca86ac079104718e6fda3aabed0eb
https://github.com/llvm/llvm-project/commit/2ee8fdbfddcca86ac079104718e6fda3aabed0eb
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libc/src/__support/CMakeLists.txt
Log Message:
-----------
[libc] Prevent building wchar on MacOS (#143978)
Prevent building wchar on macos as it depends on uchar.h which isn't
available
Commit: 2b8f82b8308fc9df0a74cdd61a1257d9eb51189c
https://github.com/llvm/llvm-project/commit/2b8f82b8308fc9df0a74cdd61a1257d9eb51189c
Author: Luke Lau <luke at igalia.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
M llvm/test/CodeGen/RISCV/rvv/vleff.ll
M llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll
M llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll
Log Message:
-----------
[RISCV] Remove implicit $vl def on vleNff pseudos (#143935)
In #90049 we removed the side effect flag on the vleNff pseudos with the
reasoning that we modelled the effect of setting vl as an output
operand.
This extends this further by removing the implicit def on vl, inserting
it back in RISCVInsertVSETVLI when we also emit the PseudoReadVL.
The motiviation for this is to make it easier to handle vleff in more
places in RISCVVectorPeephole in a follow up patch, which in turn will
make migrating the last vmerge peephole over from RISCVISelDAGToDAG
easier.
Some of these tests claim that the vleff shouldn't be deleted when none
of its values are used, but these are from the initial commit in
3b5430eb0dad5. I'm not sure if these still hold today?
This also moves the fault-only-first predicate to
RISCVInstrPredicates.td since we can't rely on the implicit vl operand
anymore.
Commit: 703e4460228fa5893dd0dff514ce44442b310b5e
https://github.com/llvm/llvm-project/commit/703e4460228fa5893dd0dff514ce44442b310b5e
Author: Feng Zou <feng.zou at intel.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/stack-alignment.c
Log Message:
-----------
[Clang] Add check for -mstack-alignment (#143124)
Currently the assertion in Alignment.h is triggered if a wrong value is
passed -mstack-alignment option:
```
Assertion `(Value == 0 || llvm::isPowerOf2_64(Value)) && "Alignment is neither 0 nor
a power of 2"' failed.
```
Added check in clang driver for the value of -mstack-alignment option,
and emitted an error message when the wrong value was passed.
Commit: 28c14d475fbd16d07db88c8d12edddfe9cc226ab
https://github.com/llvm/llvm-project/commit/28c14d475fbd16d07db88c8d12edddfe9cc226ab
Author: Michael Jones <michaelrj at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libc/src/string/CMakeLists.txt
M libc/src/string/stpcpy.cpp
M libc/src/string/strcat.cpp
M libc/src/string/strncat.cpp
Log Message:
-----------
[libc] Independent strcat/strncat/stpcpy (#142643)
The previous implementations called other entrypoints. This patch fixes
strcat, strncat, and stpcpy to be properly independent.
Commit: 32e1360aaa9fbf5e388f9d061fa004b02c0a1359
https://github.com/llvm/llvm-project/commit/32e1360aaa9fbf5e388f9d061fa004b02c0a1359
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenValue.h
Log Message:
-----------
[CIR][NFC] Fix build problems with [[maybe_unused]] (#143994)
A recent commit introduced the use of [[maybe_unused]] following
LLVM_PREFFERED_TYPE(bool) on a member variable declaration. I compiled
it with clang 14.0, which doesn't support the `preferred_type` attribute
so I didn't notice a problem. However, starting with clang 18.0, this
reports an error ("an attribute list cannot appear here") because of the
mixing of attribute styles.
This change fixes the problem by replacing [[maybe_unused]] with
LLVM_ATTRIBUTE_UNUSED.
Commit: 70f44ec6feba56b076cf65e02b8876f185efdab9
https://github.com/llvm/llvm-project/commit/70f44ec6feba56b076cf65e02b8876f185efdab9
Author: Michael Jones <michaelrj at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M libc/docs/configure.rst
Log Message:
-----------
[libc][NFC] Accept doc fix (#143996)
Docgen updates the docs when the config options are changed. This update
has been waiting since https://github.com/llvm/llvm-project/pull/143187.
Commit: e1bb35d067568794585544b8942638c467d13bea
https://github.com/llvm/llvm-project/commit/e1bb35d067568794585544b8942638c467d13bea
Author: Reid Kleckner <rnk at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[bazel] Fix modules build for llvm-libc (speculative) (#143995)
Commit: 3ddd137332237918fbb6175c20327fe765d2c4ad
https://github.com/llvm/llvm-project/commit/3ddd137332237918fbb6175c20327fe765d2c4ad
Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/cuf21.cuf
Log Message:
-----------
[flang] [cuda] Move SetImplicityCUDADevice after symbols in block construct are converted to objects (#143791)
`SetImplicitCUDADevice` looks for `symbol.has<ObjectEntityDetails>()` to
set the device attribute before symbols inside block constructs are
converted to ObjectEntity. Fix is to move the call to
`SetImplicitCUDADevice` after those symbols are converted.
Commit: 22f9b4aa1dad597d908be77be1e10ba4c77330ce
https://github.com/llvm/llvm-project/commit/22f9b4aa1dad597d908be77be1e10ba4c77330ce
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
Reland [HIP] use offload wrapper for non-device-only non-rdc (#132869) (#143964)
Fixed two issues:
1. assertion with -flto. the linker wrapper action is missing for
wrapping the device binary. Added it for -flto.
2. when there are two HIP files, the kernels in the second file were not
found. This is because the -r option of linker wrapper assumes offload
entries section of HIP to be hip_offloading_entries but it is actually
llvm_offload_entries, causing the offload entries sections not made
unique for different object files. Fixed and tested working for both
-fgpu-rdc and -fno-gpu-rdc case with and without -r
Commit: 029f8892a500594bd044507352503249fd641e6c
https://github.com/llvm/llvm-project/commit/029f8892a500594bd044507352503249fd641e6c
Author: Luke Lau <luke at igalia.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
Log Message:
-----------
[RISCV] Fold vmv.v.v into vleNff.v (#143981)
We currently already fold vmerge.vvm into vleNff.v via
RISCVDAGToDAGISel::performCombineVMergeAndVOps, so this teaches
RISCVVectorPeephole::foldVMV_V_V to do the same.
Commit: 8890706db67384a423773cc921302dd63d950ef5
https://github.com/llvm/llvm-project/commit/8890706db67384a423773cc921302dd63d950ef5
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
Revert "Reland [HIP] use offload wrapper for non-device-only non-rdc (#132869) (#143964)"
This reverts commit 22f9b4aa1dad597d908be77be1e10ba4c77330ce.
Commit: 7232c07eb97d5c21d47a661c9cca8981c7f91698
https://github.com/llvm/llvm-project/commit/7232c07eb97d5c21d47a661c9cca8981c7f91698
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
Reland [HIP] use offload wrapper for non-device-only non-rdc (#143964)
Fixed a typo:
- auto Section = (Prefix + "llvm_offload_entries").str();
+ auto Section = (Prefix + "_offload_entries").str();
which broke buildbot e.g.
https://lab.llvm.org/buildbot/#/builders/208/builds/1948
Commit: 07dad4ecba43bcd92453a0cd4c351025126db683
https://github.com/llvm/llvm-project/commit/07dad4ecba43bcd92453a0cd4c351025126db683
Author: Fangrui Song <i at maskray.me>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Writer.cpp
M lld/docs/ReleaseNotes.rst
M lld/docs/ld.lld.1
M lld/test/ELF/driver.test
M lld/test/ELF/weak-undef-got-plt.s
M lld/test/ELF/weak-undef-hidden.s
M lld/test/ELF/weak-undef-rw.s
Log Message:
-----------
[ELF] Implement -z dynamic-undefined-weak
The behavior of an undefined weak reference is implementation defined.
For static -no-pie linking, dynamic relocations are generally avoided (except
IRELATIVE). -shared linking generally emits dynamic relocations.
Dynamic -no-pie linking and -pie allow flexibility. Changes adjust the
behavior for better consistency and simpler internal representation,
e.g. https://reviews.llvm.org/D63003 https://reviews.llvm.org/D105164
(generalized to undefined non-weak in
2fcaa00d1e2317a90c9071b735eb0e758b5dd58b).
GNU ld introduced -z [no]dynamic-undefined-weak option to fine-tune the
behavior. (The option is not very effective with -no-pie, e.g. on
x86-64, `ld.bfd a.o s.so -z dynamic-undefined-weak` generates
R_X86_64_NONE relocations instead of GLOB_DAT/JUMP_SLOT)
This patch implements -z [no]dynamic-undefined-weak option.
The effects are summarized as follows:
* Static -no-pie: no-op
* Dynamic -no-pie: nodynamic-undefined-weak suppresses GLOB_DAT/JUMP_SLOT
* Static -pie: dynamic-undefined-weak generates ABS/GLOB_DAT/JUMP_SLOT.
https://discourse.llvm.org/t/lld-weak-undefined-symbols-in-vdso-only/86749
* Dynamic -pie: nodynamic-undefined-weak suppresses ABS/GLOB_DAT/JUMP_SLOT
The -pie behavior likely stays stable while -no-pie (`!ctx.arg.isPic` in
`isStaticLinkTimeConstant`) behavior will likely change in the future.
The current default value of ctx.arg.zDynamicUndefined is selected to
prevent behavior changes.
Pull Request: https://github.com/llvm/llvm-project/pull/143831
Commit: 9992668404cfb2302f7a62f01884c210642caea1
https://github.com/llvm/llvm-project/commit/9992668404cfb2302f7a62f01884c210642caea1
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M flang-rt/lib/cuda/descriptor.cpp
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
A flang/test/Lower/CUDA/cuda-runtime-check.cuf
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[flang][cuda] Add runtime check for passing device arrays (#144003)
Commit: 4268360003e2dc6721469aa5ccab7efbb29dcbfd
https://github.com/llvm/llvm-project/commit/4268360003e2dc6721469aa5ccab7efbb29dcbfd
Author: Thirumalai Shaktivel <74826228+Thirumalai-Shaktivel at users.noreply.github.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
A flang/test/Lower/OpenMP/flush02.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
Log Message:
-----------
[Flang] [OpenMP] Allow any type as argument to the FlushOp (#143844)
Fixes: #143842
Commit: cd573e0a547dba18e2a960967c1f24f124c6cb26
https://github.com/llvm/llvm-project/commit/cd573e0a547dba18e2a960967c1f24f124c6cb26
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerDataFlowTrace.cpp
Log Message:
-----------
[compiler-rt] Remove unused local variables (NFC) (#144010)
Commit: 752538c12cf4b37499f73e1bf05ea421ab055665
https://github.com/llvm/llvm-project/commit/752538c12cf4b37499f73e1bf05ea421ab055665
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
Log Message:
-----------
[llvm-pdbutil] Remove an unused local variable (NFC) (#144011)
Commit: 054f4a50bb2ec1e535111d779bc5fdc93314c55a
https://github.com/llvm/llvm-project/commit/054f4a50bb2ec1e535111d779bc5fdc93314c55a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M polly/lib/Support/RegisterPasses.cpp
Log Message:
-----------
[polly] Remove an unused local variable (NFC) (#144012)
Commit: dfc5125946ade289840fa119716957ebce2d31d2
https://github.com/llvm/llvm-project/commit/dfc5125946ade289840fa119716957ebce2d31d2
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/fast-math.ll
M llvm/test/CodeGen/NVPTX/sqrt-approx.ll
Log Message:
-----------
[NVPTX] Consistently check fast-math flags when lowering fsqrt (#143776)
Ensure that we check the global, function-level, and instruction-level
flags when considering whether to use `sqrt.rn` or `sqrt.approx` to
lower either `@llvm.sqrt.f32` or `@llvm.nvvm.sqrt.f`
Commit: 432d06ab919ae18c4ed1e94148448501578a6c85
https://github.com/llvm/llvm-project/commit/432d06ab919ae18c4ed1e94148448501578a6c85
Author: Saiyedul Islam <Saiyedul.Islam at amd.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M clang/docs/HIPSupport.rst
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
Log Message:
-----------
[NFC][AMDGPU] Fix stale links to ROCm repositories (#143949)
Following GitHub organizations were merged into the ROCm org:
* ROCm-Developer-Tools
* RadeonOpenCompute
* ROCmSoftwarePlatform
Ensure that all hyperlinks to the old organizations now point to the new
organization at https://github.com/ROCm.
Commit: 4e80a033a1bade55bca8a32e267cf1b06d05b1ed
https://github.com/llvm/llvm-project/commit/4e80a033a1bade55bca8a32e267cf1b06d05b1ed
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-06-12 (Thu, 12 Jun 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/prmt.ll
Log Message:
-----------
[NVPTX] Use prmt.f4e to lower pointer alignment fshr idiom (#143407)
Commit: f64b3bb276e820f00911dbf6ecc484751daeb5f1
https://github.com/llvm/llvm-project/commit/f64b3bb276e820f00911dbf6ecc484751daeb5f1
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
Log Message:
-----------
[mlir][llvm] Op interface LLVM converter (#143922)
Adds a utility conversion class for rewriting op interface instances
targeting LLVM dialect.
Commit: 483d19619c3221c1d54080e57e43052eb863436a
https://github.com/llvm/llvm-project/commit/483d19619c3221c1d54080e57e43052eb863436a
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/features-info.ll
Log Message:
-----------
[RISCV] Add tune features for Andes 45 series cpus (#143899)
Add tune features TuneNoDefaultUnroll, TuneShortForwardBranchOpt and
TunePostRAScheduler for Andes 45 series cpus.
Commit: 4903c11a7e144d63635b115d97936a7aecf7a2f6
https://github.com/llvm/llvm-project/commit/4903c11a7e144d63635b115d97936a7aecf7a2f6
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
Log Message:
-----------
[RISCV] Support memcmp expansion for vectors
This patch adds the support of generating vector instructions for
`memcmp`. This implementation is inspired by X86's.
We convert integer comparisons (eq/ne only) into vector comparisons
and do a vector reduction and to get the result.
The range of supported load sizes is (XLEN, VLEN * LMUL8] and
non-power-of-2 types are not supported.
Fixes #143294.
Reviewers: lukel97, asb, preames, topperc, dtcxzyw
Reviewed By: topperc, lukel97
Pull Request: https://github.com/llvm/llvm-project/pull/114517
Commit: c8bc17e6db155888cd896f4734755d13ac640872
https://github.com/llvm/llvm-project/commit/c8bc17e6db155888cd896f4734755d13ac640872
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M bolt/lib/Profile/DataAggregator.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison.cpp
M clang/docs/HIPSupport.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/test/CIR/CodeGen/ctor.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
A clang/test/CIR/Transforms/vector-create-fold.cir
M clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp
A clang/test/Driver/darwin-invalid-version-range.c
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/linker-wrapper.c
A clang/test/Driver/stack-alignment.c
A clang/test/Modules/pr143788.cppm
M clang/test/Preprocessor/init-loongarch.c
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M compiler-rt/lib/fuzzer/FuzzerDataFlowTrace.cpp
M compiler-rt/test/lit.common.configured.in
M flang-rt/lib/cuda/descriptor.cpp
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/CUDA/cuda-runtime-check.cuf
A flang/test/Lower/OpenMP/Todo/target-parallel-private.f90
A flang/test/Lower/OpenMP/Todo/target-teams-private.f90
A flang/test/Lower/OpenMP/flush02.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
M flang/test/Semantics/cuf21.cuf
M flang/tools/bbc/bbc.cpp
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/configure.rst
M libc/hdr/CMakeLists.txt
A libc/hdr/sys_ioctl_macros.h
M libc/hdr/types/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/sys-ioctl-macros.h
M libc/include/llvm-libc-types/char8_t.h
M libc/include/llvm-libc-types/size_t.h
M libc/include/llvm-libc-types/ssize_t.h
M libc/include/stdio.yaml
A libc/shared/math.h
A libc/shared/math/expf.h
M libc/src/__support/CMakeLists.txt
A libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/exp_float_constants.h
A libc/src/__support/math/expf.h
M libc/src/__support/wchar/character_converter.cpp
M libc/src/__support/wchar/mbstate.h
M libc/src/__support/wchar/utf_ret.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/expf.cpp
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/generic/CMakeLists.txt
A libc/src/stdio/generic/perror.cpp
A libc/src/stdio/perror.h
M libc/src/string/CMakeLists.txt
M libc/src/string/stpcpy.cpp
M libc/src/string/strcat.cpp
M libc/src/string/strncat.cpp
M libc/src/sys/CMakeLists.txt
A libc/src/sys/ioctl/CMakeLists.txt
A libc/src/sys/ioctl/ioctl.h
A libc/src/sys/ioctl/linux/CMakeLists.txt
A libc/src/sys/ioctl/linux/ioctl.cpp
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/perror_test.cpp
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/ioctl/CMakeLists.txt
A libc/test/src/sys/ioctl/linux/CMakeLists.txt
A libc/test/src/sys/ioctl/linux/ioctl_test.cpp
M libcxx/cmake/caches/AndroidNDK.cmake
M libcxx/docs/ABIGuarantees.rst
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__functional/function.h
M libcxx/include/bitset
R libcxx/test/configs/llvm-libc++-android-ndk.cfg.in
A libcxx/test/configs/llvm-libc++-android.cfg.in
A libcxx/test/libcxx/containers/container.adaptors/flat.set/scary.compile.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset.cons/char_ptr_ctor.pass.cpp
M libcxx/utils/gdb/libcxx/printers.py
R libcxxabi/test/configs/llvm-libc++abi-android-ndk.cfg.in
A libcxxabi/test/configs/llvm-libc++abi-android.cfg.in
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Writer.cpp
M lld/docs/ReleaseNotes.rst
M lld/docs/ld.lld.1
M lld/test/ELF/driver.test
M lld/test/ELF/weak-undef-got-plt.s
M lld/test/ELF/weak-undef-hidden.s
M lld/test/ELF/weak-undef-rw.s
M lld/test/ELF/x86-64-section-layout.s
M lld/test/Unit/lit.cfg.py
M lldb/cmake/modules/AddLLDB.cmake
M lldb/cmake/modules/LLDBFramework.cmake
M lldb/include/lldb/Host/JSONTransport.h
A lldb/scripts/framework-header-fix.py
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Host/common/JSONTransport.cpp
M lldb/source/Plugins/Language/ObjC/CMakeLists.txt
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/memory/find/TestMemoryFind.py
M lldb/test/API/functionalities/memory/find/main.cpp
M lldb/test/API/lit.cfg.py
A lldb/test/Shell/Scripts/Inputs/Main/SBAddress.h
A lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
A lldb/test/Shell/Scripts/TestFrameworkFixScript.test
A lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
A lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
M lldb/test/Shell/lit.cfg.py
M lldb/test/lit.cfg.py
M lldb/unittests/DAP/CMakeLists.txt
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
R lldb/unittests/DAP/TransportTest.cpp
M lldb/unittests/Host/CMakeLists.txt
A lldb/unittests/Host/JSONTransportTest.cpp
A lldb/unittests/TestingSupport/Host/PipeTestUtilities.h
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugLoc.h
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
R llvm/include/llvm/IR/VectorBuilder.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/DWARFLinker/Parallel/OutputSections.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/CMakeLists.txt
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugLoc.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Module.cpp
R llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/ProfileData/MemProfRadixTree.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86FixupInstTuning.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
R llvm/lib/Target/X86/X86WinFixupBufferSecurityCheck.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CloneModule.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/BasicAA/captures.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
M llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll
M llvm/test/Analysis/ScopedNoAliasAA/alias-scope-merging.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-windows.ll
M llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
M llvm/test/CodeGen/DirectX/flatten-array.ll
M llvm/test/CodeGen/DirectX/flatten-bug-117273.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-bug-117273.ll
M llvm/test/CodeGen/LoongArch/lasx/xvmskcond.ll
M llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-invalid.ll
M llvm/test/CodeGen/NVPTX/fast-math.ll
M llvm/test/CodeGen/NVPTX/prmt.ll
M llvm/test/CodeGen/NVPTX/sqrt-approx.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
M llvm/test/CodeGen/RISCV/rvv/vleff.ll
M llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll
M llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
M llvm/test/CodeGen/RISCV/xqcibm-extract.ll
A llvm/test/CodeGen/RISCV/zicond-opts.ll
M llvm/test/CodeGen/SPIRV/ExecutionMode_Fragment.ll
M llvm/test/CodeGen/X86/2012-01-12-extract-sv.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/avgfloors.ll
M llvm/test/CodeGen/X86/avx-insertelt.ll
M llvm/test/CodeGen/X86/avx512-cvt.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512-intrinsics.ll
M llvm/test/CodeGen/X86/avx512-logic.ll
M llvm/test/CodeGen/X86/avx512copy-intrinsics.ll
M llvm/test/CodeGen/X86/avx512fp16-arith.ll
M llvm/test/CodeGen/X86/avx512vl-logic.ll
M llvm/test/CodeGen/X86/bsr.ll
M llvm/test/CodeGen/X86/build-vector-512.ll
M llvm/test/CodeGen/X86/buildvec-extract.ll
M llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
M llvm/test/CodeGen/X86/coalesce_commute_movsd.ll
M llvm/test/CodeGen/X86/combine-and.ll
M llvm/test/CodeGen/X86/combine-bitselect.ll
M llvm/test/CodeGen/X86/combine-or-shuffle.ll
M llvm/test/CodeGen/X86/dpbusd_i4.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
M llvm/test/CodeGen/X86/fmsubadd-combine.ll
M llvm/test/CodeGen/X86/fp-round.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
M llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
M llvm/test/CodeGen/X86/half-constrained.ll
M llvm/test/CodeGen/X86/half-darwin.ll
M llvm/test/CodeGen/X86/insertelement-zero.ll
M llvm/test/CodeGen/X86/masked_expandload.ll
M llvm/test/CodeGen/X86/masked_gather.ll
M llvm/test/CodeGen/X86/masked_gather_scatter.ll
M llvm/test/CodeGen/X86/masked_load.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pmul.ll
M llvm/test/CodeGen/X86/pr40090.ll
M llvm/test/CodeGen/X86/pr40730.ll
M llvm/test/CodeGen/X86/psubus.ll
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/scalarize-fp.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/sse-insertelt-from-mem.ll
M llvm/test/CodeGen/X86/sse-insertelt.ll
M llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse2.ll
M llvm/test/CodeGen/X86/sse41.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
A llvm/test/CodeGen/X86/stack-protector-msvc-oz.ll
M llvm/test/CodeGen/X86/stack-protector-msvc.ll
M llvm/test/CodeGen/X86/tailcc-ssp.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
M llvm/test/CodeGen/X86/vec-strict-128-fp16.ll
M llvm/test/CodeGen/X86/vec-strict-fptoint-128-fp16.ll
M llvm/test/CodeGen/X86/vec_extract-avx.ll
M llvm/test/CodeGen/X86/vec_floor.ll
M llvm/test/CodeGen/X86/vec_ss_load_fold.ll
M llvm/test/CodeGen/X86/vector-blend.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-512.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-512.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-avx512.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
M llvm/test/CodeGen/X86/vector-zmov.ll
M llvm/test/CodeGen/X86/vselect-pcmp.ll
M llvm/test/CodeGen/X86/vselect.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/DebugInfo/COFF/fpo-stack-protect.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/x86-vpermi2.ll
M llvm/test/MC/AsmParser/include.ll
M llvm/test/Transforms/GVN/captures.ll
M llvm/test/Transforms/InstCombine/fneg.ll
M llvm/test/Transforms/InstCombine/fsub.ll
M llvm/test/Transforms/InstCombine/narrow-switch.ll
A llvm/test/Transforms/InstCombine/vp-reverse.ll
M llvm/test/Transforms/LICM/call-hoisting.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
A llvm/test/Transforms/LoopVectorize/single-scalar-cast-minbw.ll
A llvm/test/Transforms/LowerMatrixIntrinsics/select.ll
M llvm/test/Transforms/MemCpyOpt/callslot_badaa.ll
A llvm/test/Transforms/SLPVectorizer/AMDGPU/external-shuffle.ll
M llvm/test/tools/llvm-remarkutil/convert.test
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/llvm-dis/llvm-dis.cpp
M llvm/tools/llvm-link/llvm-link.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/tools/llvm-remarkutil/RemarkConvert.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
M llvm/unittests/IR/CMakeLists.txt
M llvm/unittests/IR/IRBuilderTest.cpp
R llvm/unittests/IR/VectorBuilderTest.cpp
M llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/discovery.py
M llvm/utils/lit/lit/worker.py
M llvm/utils/lldbDataFormatters.py
M llvm/utils/llvm-test-mustache-spec/llvm-test-mustache-spec.cpp
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/Dialect/AMX/Transforms.h
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/include/mlir/ExecutionEngine/MemRefUtils.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Dialect/SparseTensor/minipipeline_vector.mlir
M mlir/test/Dialect/SparseTensor/sparse_vector.mlir
M mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir
M mlir/test/Dialect/SparseTensor/vectorize_reduction.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-padtensor.mlir
M mlir/test/Target/LLVMIR/amx.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
M offload/liboffload/API/Common.td
M offload/liboffload/API/Kernel.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/test/offloading/gpupgo/pgo_atomic_teams.c
M offload/test/offloading/gpupgo/pgo_atomic_threads.c
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M polly/lib/Support/RegisterPasses.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6-beta.1
[skip ci]
Commit: 32d987d43d3c2018f5f31334bfe4b22ccbe7dcb8
https://github.com/llvm/llvm-project/commit/32d987d43d3c2018f5f31334bfe4b22ccbe7dcb8
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2025-06-13 (Fri, 13 Jun 2025)
Changed paths:
M bolt/lib/Profile/DataAggregator.cpp
M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison.cpp
M clang/docs/HIPSupport.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/test/CIR/CodeGen/ctor.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
A clang/test/CIR/Transforms/vector-create-fold.cir
M clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp
A clang/test/Driver/darwin-invalid-version-range.c
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/linker-wrapper.c
A clang/test/Driver/stack-alignment.c
A clang/test/Modules/pr143788.cppm
M clang/test/Preprocessor/init-loongarch.c
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M compiler-rt/lib/fuzzer/FuzzerDataFlowTrace.cpp
M compiler-rt/test/lit.common.configured.in
M flang-rt/lib/cuda/descriptor.cpp
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/CUDA/cuda-runtime-check.cuf
A flang/test/Lower/OpenMP/Todo/target-parallel-private.f90
A flang/test/Lower/OpenMP/Todo/target-teams-private.f90
A flang/test/Lower/OpenMP/flush02.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
M flang/test/Semantics/cuf21.cuf
M flang/tools/bbc/bbc.cpp
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/configure.rst
M libc/hdr/CMakeLists.txt
A libc/hdr/sys_ioctl_macros.h
M libc/hdr/types/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/sys-ioctl-macros.h
M libc/include/llvm-libc-types/char8_t.h
M libc/include/llvm-libc-types/size_t.h
M libc/include/llvm-libc-types/ssize_t.h
M libc/include/stdio.yaml
A libc/shared/math.h
A libc/shared/math/expf.h
M libc/src/__support/CMakeLists.txt
A libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/exp_float_constants.h
A libc/src/__support/math/expf.h
M libc/src/__support/wchar/character_converter.cpp
M libc/src/__support/wchar/mbstate.h
M libc/src/__support/wchar/utf_ret.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/expf.cpp
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/generic/CMakeLists.txt
A libc/src/stdio/generic/perror.cpp
A libc/src/stdio/perror.h
M libc/src/string/CMakeLists.txt
M libc/src/string/stpcpy.cpp
M libc/src/string/strcat.cpp
M libc/src/string/strncat.cpp
M libc/src/sys/CMakeLists.txt
A libc/src/sys/ioctl/CMakeLists.txt
A libc/src/sys/ioctl/ioctl.h
A libc/src/sys/ioctl/linux/CMakeLists.txt
A libc/src/sys/ioctl/linux/ioctl.cpp
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/perror_test.cpp
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/ioctl/CMakeLists.txt
A libc/test/src/sys/ioctl/linux/CMakeLists.txt
A libc/test/src/sys/ioctl/linux/ioctl_test.cpp
M libcxx/cmake/caches/AndroidNDK.cmake
M libcxx/docs/ABIGuarantees.rst
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__functional/function.h
M libcxx/include/bitset
R libcxx/test/configs/llvm-libc++-android-ndk.cfg.in
A libcxx/test/configs/llvm-libc++-android.cfg.in
A libcxx/test/libcxx/containers/container.adaptors/flat.set/scary.compile.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset.cons/char_ptr_ctor.pass.cpp
M libcxx/utils/gdb/libcxx/printers.py
R libcxxabi/test/configs/llvm-libc++abi-android-ndk.cfg.in
A libcxxabi/test/configs/llvm-libc++abi-android.cfg.in
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Writer.cpp
M lld/docs/ReleaseNotes.rst
M lld/docs/ld.lld.1
M lld/test/ELF/driver.test
M lld/test/ELF/weak-undef-got-plt.s
M lld/test/ELF/weak-undef-hidden.s
M lld/test/ELF/weak-undef-rw.s
M lld/test/ELF/x86-64-section-layout.s
M lld/test/Unit/lit.cfg.py
M lldb/cmake/modules/AddLLDB.cmake
M lldb/cmake/modules/LLDBFramework.cmake
M lldb/include/lldb/Host/JSONTransport.h
A lldb/scripts/framework-header-fix.py
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Host/common/JSONTransport.cpp
M lldb/source/Plugins/Language/ObjC/CMakeLists.txt
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/memory/find/TestMemoryFind.py
M lldb/test/API/functionalities/memory/find/main.cpp
M lldb/test/API/lit.cfg.py
A lldb/test/Shell/Scripts/Inputs/Main/SBAddress.h
A lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
A lldb/test/Shell/Scripts/TestFrameworkFixScript.test
A lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
A lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
M lldb/test/Shell/lit.cfg.py
M lldb/test/lit.cfg.py
M lldb/unittests/DAP/CMakeLists.txt
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
R lldb/unittests/DAP/TransportTest.cpp
M lldb/unittests/Host/CMakeLists.txt
A lldb/unittests/Host/JSONTransportTest.cpp
A lldb/unittests/TestingSupport/Host/PipeTestUtilities.h
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugLoc.h
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
R llvm/include/llvm/IR/VectorBuilder.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/DWARFLinker/Parallel/OutputSections.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/CMakeLists.txt
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugLoc.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Module.cpp
R llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/ProfileData/MemProfRadixTree.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPreloadKernelArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86FixupInstTuning.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
R llvm/lib/Target/X86/X86WinFixupBufferSecurityCheck.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CloneModule.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/BasicAA/captures.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
M llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll
M llvm/test/Analysis/ScopedNoAliasAA/alias-scope-merging.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-windows.ll
M llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
M llvm/test/CodeGen/DirectX/flatten-array.ll
M llvm/test/CodeGen/DirectX/flatten-bug-117273.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-bug-117273.ll
M llvm/test/CodeGen/LoongArch/lasx/xvmskcond.ll
M llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-invalid.ll
M llvm/test/CodeGen/NVPTX/fast-math.ll
M llvm/test/CodeGen/NVPTX/prmt.ll
M llvm/test/CodeGen/NVPTX/sqrt-approx.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
M llvm/test/CodeGen/RISCV/rvv/vleff.ll
M llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll
M llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
M llvm/test/CodeGen/RISCV/xqcibm-extract.ll
A llvm/test/CodeGen/RISCV/zicond-opts.ll
M llvm/test/CodeGen/SPIRV/ExecutionMode_Fragment.ll
M llvm/test/CodeGen/X86/2012-01-12-extract-sv.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/avgfloors.ll
M llvm/test/CodeGen/X86/avx-insertelt.ll
M llvm/test/CodeGen/X86/avx512-cvt.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512-intrinsics.ll
M llvm/test/CodeGen/X86/avx512-logic.ll
M llvm/test/CodeGen/X86/avx512copy-intrinsics.ll
M llvm/test/CodeGen/X86/avx512fp16-arith.ll
M llvm/test/CodeGen/X86/avx512vl-logic.ll
M llvm/test/CodeGen/X86/bsr.ll
M llvm/test/CodeGen/X86/build-vector-512.ll
M llvm/test/CodeGen/X86/buildvec-extract.ll
M llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
M llvm/test/CodeGen/X86/coalesce_commute_movsd.ll
M llvm/test/CodeGen/X86/combine-and.ll
M llvm/test/CodeGen/X86/combine-bitselect.ll
M llvm/test/CodeGen/X86/combine-or-shuffle.ll
M llvm/test/CodeGen/X86/dpbusd_i4.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
M llvm/test/CodeGen/X86/fmsubadd-combine.ll
M llvm/test/CodeGen/X86/fp-round.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
M llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
M llvm/test/CodeGen/X86/gfni-shifts.ll
M llvm/test/CodeGen/X86/half-constrained.ll
M llvm/test/CodeGen/X86/half-darwin.ll
M llvm/test/CodeGen/X86/insertelement-zero.ll
M llvm/test/CodeGen/X86/masked_expandload.ll
M llvm/test/CodeGen/X86/masked_gather.ll
M llvm/test/CodeGen/X86/masked_gather_scatter.ll
M llvm/test/CodeGen/X86/masked_load.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pmul.ll
M llvm/test/CodeGen/X86/pr40090.ll
M llvm/test/CodeGen/X86/pr40730.ll
M llvm/test/CodeGen/X86/psubus.ll
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/scalarize-fp.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/sse-insertelt-from-mem.ll
M llvm/test/CodeGen/X86/sse-insertelt.ll
M llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse2.ll
M llvm/test/CodeGen/X86/sse41.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
A llvm/test/CodeGen/X86/stack-protector-msvc-oz.ll
M llvm/test/CodeGen/X86/stack-protector-msvc.ll
M llvm/test/CodeGen/X86/tailcc-ssp.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
M llvm/test/CodeGen/X86/vec-strict-128-fp16.ll
M llvm/test/CodeGen/X86/vec-strict-fptoint-128-fp16.ll
M llvm/test/CodeGen/X86/vec_extract-avx.ll
M llvm/test/CodeGen/X86/vec_floor.ll
M llvm/test/CodeGen/X86/vec_ss_load_fold.ll
M llvm/test/CodeGen/X86/vector-blend.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-512.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-512.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-avx512.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
M llvm/test/CodeGen/X86/vector-zmov.ll
M llvm/test/CodeGen/X86/vselect-pcmp.ll
M llvm/test/CodeGen/X86/vselect.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/DebugInfo/COFF/fpo-stack-protect.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/x86-vpermi2.ll
M llvm/test/MC/AsmParser/include.ll
M llvm/test/Transforms/GVN/captures.ll
M llvm/test/Transforms/InstCombine/fneg.ll
M llvm/test/Transforms/InstCombine/fsub.ll
M llvm/test/Transforms/InstCombine/narrow-switch.ll
A llvm/test/Transforms/InstCombine/vp-reverse.ll
M llvm/test/Transforms/LICM/call-hoisting.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
A llvm/test/Transforms/LoopVectorize/single-scalar-cast-minbw.ll
A llvm/test/Transforms/LowerMatrixIntrinsics/select.ll
M llvm/test/Transforms/MemCpyOpt/callslot_badaa.ll
A llvm/test/Transforms/SLPVectorizer/AMDGPU/external-shuffle.ll
M llvm/test/tools/llvm-remarkutil/convert.test
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/llvm-dis/llvm-dis.cpp
M llvm/tools/llvm-link/llvm-link.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/tools/llvm-remarkutil/RemarkConvert.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
M llvm/unittests/IR/CMakeLists.txt
M llvm/unittests/IR/IRBuilderTest.cpp
R llvm/unittests/IR/VectorBuilderTest.cpp
M llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/discovery.py
M llvm/utils/lit/lit/worker.py
M llvm/utils/lldbDataFormatters.py
M llvm/utils/llvm-test-mustache-spec/llvm-test-mustache-spec.cpp
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/Dialect/AMX/Transforms.h
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/include/mlir/ExecutionEngine/MemRefUtils.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Dialect/SparseTensor/minipipeline_vector.mlir
M mlir/test/Dialect/SparseTensor/sparse_vector.mlir
M mlir/test/Dialect/SparseTensor/sparse_vector_chain.mlir
M mlir/test/Dialect/SparseTensor/vectorize_reduction.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-padtensor.mlir
M mlir/test/Target/LLVMIR/amx.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
M offload/liboffload/API/Common.td
M offload/liboffload/API/Kernel.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/test/offloading/gpupgo/pgo_atomic_teams.c
M offload/test/offloading/gpupgo/pgo_atomic_threads.c
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M polly/lib/Support/RegisterPasses.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
Rebase
Created using spr 1.3.6-beta.1
Compare: https://github.com/llvm/llvm-project/compare/bb60a992551a...32d987d43d3c
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