[all-commits] [llvm/llvm-project] cc0d0d: [AMDGPU][AsmParser] Support true16 register suffix...

[Shilei Tian via All-commits]

  Branch: refs/heads/users/shiltian/true16-asm-parser-reg-range-with-reg-suffix
  Home:   https://github.com/llvm/llvm-project
  Commit: cc0d0d0093c6375c5aad4b9e19f1ef74ef3a0240
      https://github.com/llvm/llvm-project/commit/cc0d0d0093c6375c5aad4b9e19f1ef74ef3a0240
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2025-06-12 (Thu, 12 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
    M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s

  Log Message:
  -----------
  [AMDGPU][AsmParser] Support true16 register suffix for valid register range

`v[5].l` and `v[5:5].h` are acceptable operand, because `v[5]` and `v[5:5]` are
accepted. This PR adds the support for it.



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