[all-commits] [llvm/llvm-project] 217304: [X86] Use X86FixupInstTunings to select between (V...

[黃國庭 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 217304a09949de73a8def5ee4c7ed9510449ce4c
      https://github.com/llvm/llvm-project/commit/217304a09949de73a8def5ee4c7ed9510449ce4c
  Author: 黃國庭 <we3223 at gmail.com>
  Date:   2025-06-12 (Thu, 12 Jun 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86FixupInstTuning.cpp
    M llvm/test/CodeGen/X86/2012-01-12-extract-sv.ll
    M llvm/test/CodeGen/X86/avx-insertelt.ll
    M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
    M llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
    M llvm/test/CodeGen/X86/avx512-intrinsics.ll
    M llvm/test/CodeGen/X86/avx512copy-intrinsics.ll
    M llvm/test/CodeGen/X86/build-vector-512.ll
    M llvm/test/CodeGen/X86/buildvec-extract.ll
    M llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
    M llvm/test/CodeGen/X86/coalesce_commute_movsd.ll
    M llvm/test/CodeGen/X86/combine-and.ll
    M llvm/test/CodeGen/X86/combine-or-shuffle.ll
    M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
    M llvm/test/CodeGen/X86/fmsubadd-combine.ll
    M llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
    M llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
    M llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
    M llvm/test/CodeGen/X86/half-constrained.ll
    M llvm/test/CodeGen/X86/half-darwin.ll
    M llvm/test/CodeGen/X86/insertelement-zero.ll
    M llvm/test/CodeGen/X86/masked_expandload.ll
    M llvm/test/CodeGen/X86/masked_gather.ll
    M llvm/test/CodeGen/X86/masked_gather_scatter.ll
    M llvm/test/CodeGen/X86/masked_load.ll
    M llvm/test/CodeGen/X86/pr40730.ll
    M llvm/test/CodeGen/X86/scalarize-fp.ll
    M llvm/test/CodeGen/X86/sse-insertelt-from-mem.ll
    M llvm/test/CodeGen/X86/sse-insertelt.ll
    M llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
    M llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
    M llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
    M llvm/test/CodeGen/X86/sse2.ll
    M llvm/test/CodeGen/X86/sse41.ll
    M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
    M llvm/test/CodeGen/X86/vec-strict-128-fp16.ll
    M llvm/test/CodeGen/X86/vec-strict-fptoint-128-fp16.ll
    M llvm/test/CodeGen/X86/vec_extract-avx.ll
    M llvm/test/CodeGen/X86/vec_floor.ll
    M llvm/test/CodeGen/X86/vec_ss_load_fold.ll
    M llvm/test/CodeGen/X86/vector-blend.ll
    M llvm/test/CodeGen/X86/vector-half-conversions.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
    M llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
    M llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
    M llvm/test/CodeGen/X86/vector-zmov.ll
    M llvm/test/CodeGen/X86/vselect.ll

  Log Message:
  -----------
  [X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)

Fix https://github.com/llvm/llvm-project/issues/142588
Following @RKSimon’s suggestion, the transformation applies only when
the blend mask is exactly 1, indicating that the instruction behaves
like a move. Additionally, the conversion will only be performed when
optimizing for size or when the target prefers MOVSS/D over BLENDPS/D
for performance reasons.

The switch-case instructions were identified with GPT O.O .

Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>



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