[all-commits] [llvm/llvm-project] fe28ea: [LoongArch] Add demanded bits support for [X]VMSKL...

[hev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fe28ea37b640ea4842583df3b89e08877220fb8e
      https://github.com/llvm/llvm-project/commit/fe28ea37b640ea4842583df3b89e08877220fb8e
  Author: hev <wangrui at loongson.cn>
  Date:   2025-06-12 (Thu, 12 Jun 2025)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
    M llvm/test/CodeGen/LoongArch/lasx/xvmskcond.ll
    M llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll

  Log Message:
  -----------
  [LoongArch] Add demanded bits support for [X]VMSKLTZ (#143528)

This patch adds a DAG combine hook for the [X]VMSKLTZ nodes to simplify
their input when possible. It also implements target-specific logic in
SimplifyDemandedBitsForTargetNode to optimize away unnecessary
computations when only a subset of the sign bits in the vector results
is actually used.



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