[all-commits] [llvm/llvm-project] 7fcecf: Remove enableUnalignedVectorMem and move isIntEqua...

[Pengcheng Wang via All-commits]

  Branch: refs/heads/users/wangpc-pp/spr/riscv-support-memcmp-expansion-for-vectors
  Home:   https://github.com/llvm/llvm-project
  Commit: 7fcecf0cc3a0e28cd13f5d994deb043823e05bb6
      https://github.com/llvm/llvm-project/commit/7fcecf0cc3a0e28cd13f5d994deb043823e05bb6
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2025-06-12 (Thu, 12 Jun 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

  Log Message:
  -----------
  Remove enableUnalignedVectorMem and move isIntEqualitySetCC early

Created using spr 1.3.6-beta.1



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