[all-commits] [llvm/llvm-project] 32d2b6: [HWASAN] Disable LSan test on Android (#143625)
Krzysztof Parzyszek via All-commits
all-commits at lists.llvm.org
Wed Jun 11 07:28:16 PDT 2025
Branch: refs/heads/users/kparzysz/spr/a04-atomic-one
Home: https://github.com/llvm/llvm-project
Commit: 32d2b6ba4797584743d4764b25af0ae6f6c3d063
https://github.com/llvm/llvm-project/commit/32d2b6ba4797584743d4764b25af0ae6f6c3d063
Author: Florian Mayer <fmayer at google.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M compiler-rt/test/hwasan/TestCases/Posix/dlerror.cpp
Log Message:
-----------
[HWASAN] Disable LSan test on Android (#143625)
Android HWASan does not support LSan.
Commit: 48122a797710a05b5b8620f6051e9716a8e5a6c3
https://github.com/llvm/llvm-project/commit/48122a797710a05b5b8620f6051e9716a8e5a6c3
Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/cuf21.cuf
Log Message:
-----------
[flang][cuda] Fix CUDA generic resolution for VALUE arguments in device procedures (#140952)
For actual arguments that have VALUE attribute inside device routines, treat them as if they have device attribute.
Commit: 1bf4702d2bbaad522886dfbab913a8dd6efe3b85
https://github.com/llvm/llvm-project/commit/1bf4702d2bbaad522886dfbab913a8dd6efe3b85
Author: Amy Huang <akhuang at google.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M libc/test/src/sys/prctl/linux/CMakeLists.txt
M libc/test/src/sys/prctl/linux/prctl_test.cpp
Log Message:
-----------
Disable prctl test when building for arm or riscv. (#143627)
I'm setting up a buildbot for arm32 using qemu and qemu doesn't support
PR_GET_THP_DISABLE.
Disable the test for now while we figure out what to do about that.
Also disable for riscv because we may do the same for riscv buildbots.
Commit: ad479ddb343c2756e6eed0f2999bbdb88a65c7c5
https://github.com/llvm/llvm-project/commit/ad479ddb343c2756e6eed0f2999bbdb88a65c7c5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
R llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/xor-to-or-disjoint.ll
Log Message:
-----------
Revert "[SeparateConstOffsetFromGEP] Decompose constant xor operand if possible (#135788)"
This reverts commit 13ccce28776d8ad27b0c6a92b5a452d62da05663.
The tests are on non-canonical IR, and adds an extra unrelated
pre-processing step to the pass. I'm assuming this is a workaround
for the known-bits recursion depth limit in instcombine.
Commit: b9329fe88e47741d9c20ab92f892ac52457e6195
https://github.com/llvm/llvm-project/commit/b9329fe88e47741d9c20ab92f892ac52457e6195
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypes.h
A clang/test/CIR/CodeGen/ctor.cpp
Log Message:
-----------
[CIR] Upstream support for calling constructors (#143579)
This change adds support for calling C++ constructors. The support for
actually defining a constructor is still missing and will be added in a
later change.
Commit: 6f62979a5a5bcf70d65f23e0991a274e6df5955b
https://github.com/llvm/llvm-project/commit/6f62979a5a5bcf70d65f23e0991a274e6df5955b
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .github/workflows/premerge.yaml
Log Message:
-----------
Revert "[CI] Migrate to runtimes build" (#143612)
Reverts llvm/llvm-project#142696
See https://github.com/llvm/llvm-project/issues/143610 for details; I
believe this PR causes CI builders to build LLVM in a way that's been
broken for a while. To keep CI green, if this is the correct culprit,
those tests should be fixed or skipped
Commit: 3cef099ceddccefca8e11268624397cde9e04af6
https://github.com/llvm/llvm-project/commit/3cef099ceddccefca8e11268624397cde9e04af6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M compiler-rt/test/tysan/CMakeLists.txt
Log Message:
-----------
[TySan][CMake] Depend on tysan for check-tysan in runtimes build (#143597)
The runtimes build expects libclang_rt.tysan.a to be available, but the
check-tysan target does not actually depend on it when built using a
runtimes build with LLVM_ENABLE_RUNTIMES pointing at ./llvm. This means
we get test failures when running check-compiler-rt due to the missing
static archive.
This patch also makes check-tysan depend on tysan when we are using the
runtimes build.
This is causing premerge failures currently since we recently migrated
to the runtimes build.
Commit: 67ff66e67734c0b283ec676899e5b89b67fdafcb
https://github.com/llvm/llvm-project/commit/67ff66e67734c0b283ec676899e5b89b67fdafcb
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CoverageMappingGen.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[PGO][Offload] Fix offload coverage mapping (#143490)
This pull request fixes coverage mapping on GPU targets.
- It adds an address space cast to the coverage mapping generation pass.
- It reads the profiled function names from the ELF directly. Reading it
from public globals was causing issues in cases where multiple
device-code object files are linked together.
Commit: 841a7f0897272f6412bc2e42a7dd695bf1e8a8cf
https://github.com/llvm/llvm-project/commit/841a7f0897272f6412bc2e42a7dd695bf1e8a8cf
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
Log Message:
-----------
[RISCV][NFC] Factor out VLEN in the SiFive7 scheduling model (#143629)
In preparation of reusing SiFive7Model for sifive-x390, which has a VLEN
of 1024, it's better (and less chaotic) to factor out the VLEN parameter
from various of places first: the plan is to do a major overhaul on this
file in which all the `WriteRes` are going to be encapsulated in a big
`multiclass`, where VLEN is one of its template arguments. Such that we
can instantiate different scheduling models with different VLEN.
Before that happens, a placeholder defvar `SiFive7VLEN` is used instead
in this patch.
NFC.
Co-authored-by: Michael Maitland <michaeltmaitland at gmail.com>
Commit: 8c890eaa3f4cedb494dc2a8180d9c9219bf76900
https://github.com/llvm/llvm-project/commit/8c890eaa3f4cedb494dc2a8180d9c9219bf76900
Author: Iris Shi <0.0 at owo.li>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/NVPTX/unfold-masked-merge-vector-variablemask.ll
R llvm/test/CodeGen/RISCV/fold-masked-merge.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
R llvm/test/CodeGen/SystemZ/fold-masked-merge.ll
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
M llvm/test/CodeGen/X86/bitselect.ll
M llvm/test/CodeGen/X86/fold-masked-merge.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll
Log Message:
-----------
Revert "[SelectionDAG] Make `(a & x) | (~a & y) -> (a & (x ^ y)) ^ y` available for all targets" (#143648)
Commit: 0a6463039da89914c7a0f99622fb7a008abde2fd
https://github.com/llvm/llvm-project/commit/0a6463039da89914c7a0f99622fb7a008abde2fd
Author: Florian Mayer <fmayer at google.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
Log Message:
-----------
[NFC] get rid of `undef` in avx512vl-intrinsics.ll test (#143641)
Commit: 28a4ed945dc101c9a7dbdc93d9461da67225f7dc
https://github.com/llvm/llvm-project/commit/28a4ed945dc101c9a7dbdc93d9461da67225f7dc
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
Log Message:
-----------
[AMDGPU][True16] remove AsmVOP3OpSel (#143465)
This is NFC. Clean up the AsmVOP3OpSel field, and use Vop3Base instead.
Commit: d75e28477af0baa063a4d4cc7b3cf657cfadd758
https://github.com/llvm/llvm-project/commit/d75e28477af0baa063a4d4cc7b3cf657cfadd758
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/work-queue.h
Log Message:
-----------
[flang][runtime] Fix build bot flang-runtime-cuda-gcc errors (#143650)
Adjust default parent class accessibility to attemp to work around what
appear to be old GCC's interpretation.
Commit: 3ece9b06a2d299d5a108efa856e662587543b2f3
https://github.com/llvm/llvm-project/commit/3ece9b06a2d299d5a108efa856e662587543b2f3
Author: quic_hchandel <quic_hchandel at quicinc.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/select-cond.ll
Log Message:
-----------
[RISCV][NFC] Improve test coverage for xtheadcondmov and xmipscmov (#143567)
Co-authored-by: Harsh Chandel <hchandel at qti.qualcomm.com>
Commit: a3201ce9e114aa2ecd66e525607093e4dff2f574
https://github.com/llvm/llvm-project/commit/a3201ce9e114aa2ecd66e525607093e4dff2f574
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/check-cuda.cpp
A flang/test/Semantics/cuf22.cuf
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[flang][cuda] Add option to disable warp function in semantic (#143640)
These functions are not available in some lower compute capabilities.
Add option in the language feature to enforce the semantic check on
these.
Commit: 842377882a3f52e345668751fa6d46ba4f7268d2
https://github.com/llvm/llvm-project/commit/842377882a3f52e345668751fa6d46ba4f7268d2
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/test/CodeGen/RISCV/rv32xandesperf.ll
M llvm/test/CodeGen/RISCV/rv64xandesperf.ll
Log Message:
-----------
[RISCV] Select signed bitfield insert for XAndesPerf (#143356)
This patch is similar to #142737
The XAndesPerf extension includes signed bitfield extraction
instruction `NDS.BFOS, which can extract the bits from 0 to Len - 1,
place them starting at bit Lsb, zero-filled the bits from 0 to Lsb -1,
and sign-extend the result.
When Lsb == Msb, it is a special case where the Lsb will be set to 0
instead of being equal to the Msb.
Commit: c2cb571c6cbcec75ab401974348f9f0d9b2190db
https://github.com/llvm/llvm-project/commit/c2cb571c6cbcec75ab401974348f9f0d9b2190db
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2025-06-10 (Tue, 10 Jun 2025)
Changed paths:
M clang/lib/Sema/SemaExprCXX.cpp
Log Message:
-----------
[Clang][NFC] Move UntypedParameters instead of copy (#143646)
Static analysis flagged that UntypedParameters could be moved instead of
copied. This would avoid copying a large object.
Commit: a17e97e6778b2cd4114052faf6ee25db330ef405
https://github.com/llvm/llvm-project/commit/a17e97e6778b2cd4114052faf6ee25db330ef405
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M libcxx/include/__chrono/time_point.h
M libcxx/include/chrono
A libcxx/test/std/time/time.point/time.point.arithmetic/op_++.pass.cpp
A libcxx/test/std/time/time.point/time.point.arithmetic/op_++int.pass.cpp
A libcxx/test/std/time/time.point/time.point.arithmetic/op_--.pass.cpp
A libcxx/test/std/time/time.point/time.point.arithmetic/op_--int.pass.cpp
Log Message:
-----------
[libc++] Add missing C++20 [time.point.arithmetic] (#143165)
This was part of https://wg21.link/p0355r7, but apparently never
implemented.
---------
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 0f3c54a3b3289b6375a1d32684e831cb407af003
https://github.com/llvm/llvm-project/commit/0f3c54a3b3289b6375a1d32684e831cb407af003
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
A llvm/test/CodeGen/X86/bsr.ll
Log Message:
-----------
[X86] Add test coverage showing failure to merge "zero input passthrough" behaviour for BSR instructions on x86_64 targets
Commit: a6ace2801e8900a6fe8c3b8295938f3b3c1e4466
https://github.com/llvm/llvm-project/commit/a6ace2801e8900a6fe8c3b8295938f3b3c1e4466
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - ensure we're only concatenating v2f64 generic shuffles into vXf64 vshufpd
Identified while triaging #143606 - we can't concat v4f64 lhs/rhs subvecs and then expect the v2f64 operands to be in the correct place for VSHUFPD
Test coverage will follow
Commit: 32ac7dc2d21843091116b636777c174830cd2dd0
https://github.com/llvm/llvm-project/commit/32ac7dc2d21843091116b636777c174830cd2dd0
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-vector-insertion.ll
Log Message:
-----------
[test][AArch64] Adjust vector insertion lit tests (#143101)
The test cases test_insert_v16i8_insert_2_undef_base and
test_insert_v16i8_insert_2_undef_base_different_valeus in
CodeGen/AArch64/arm64-vector-insertion.ll was leaving element 8 in the
vector as "undef" without any real explanation. It kind of looked like a
typo as the input IR looked like this
%v.8 = insertelement <16 x i8> %v.7, i8 %a, i32 8
%v.10 = insertelement <16 x i8> %v.7, i8 %a, i32 10
leaving %v.8 as unused.
This patch is cleaning up the tests a bit by adding separate test cases
to validate what is happening when skipping insert at index 8, while
amending the original tests cases to use %v.8 instead of %v.7 when
creating %v.10.
Commit: 686ec6cfe86367c43dccd83d7e6e2bac7e6a73a0
https://github.com/llvm/llvm-project/commit/686ec6cfe86367c43dccd83d7e6e2bac7e6a73a0
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M bolt/test/AArch64/adr-relaxation.s
Log Message:
-----------
[BOLT][AArch64] Fix adr-relaxation.s test (#143151)
On some AArch64 machines the splitting was inconsistent.
This causes cold `foo` to have a `mov` instruction before adrp.
```
<foo.cold.0>:
mov x0, #0x0 // =0
adrp x1, 0x600000 <_start>
add x1, x1, #0x14
ret
```
This patch removes the `mov` instruction right above .L2, making
splitting deterministic.
Commit: 521e6ce5c8fdfc72cccc1accd78a59f1a5e2805a
https://github.com/llvm/llvm-project/commit/521e6ce5c8fdfc72cccc1accd78a59f1a5e2805a
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M .github/workflows/email-check.yaml
Log Message:
-----------
[CI] Add mention of LLVM Developer Policy in email-check message (NFC) (#143300)
As for now, It may be hard for people to get truth from long Discourse
discussion, so a link to official document may be enough to convince
changing email from private to public.
Commit: 17f1dac805d388596be5e8c316c0f14b3222da4e
https://github.com/llvm/llvm-project/commit/17f1dac805d388596be5e8c316c0f14b3222da4e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
A llvm/test/CodeGen/X86/bsf.ll
Log Message:
-----------
[X86] Add test coverage showing failure to merge "zero input passthrough" behaviour for BSF instructions on x86_64 targets
Commit: a72bcda1434c72f9db6687565a361479e0dde572
https://github.com/llvm/llvm-project/commit/a72bcda1434c72f9db6687565a361479e0dde572
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vl.ll
Log Message:
-----------
[X86] add test coverage for #143606
Commit: e9bd1aee6537508970614fd79a4f076ba4ed93d0
https://github.com/llvm/llvm-project/commit/e9bd1aee6537508970614fd79a4f076ba4ed93d0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/test/CodeGen/X86/bmi-select-distrib.ll
Log Message:
-----------
[X86] bmi-select-distrib.ll - remove unused check prefixes and pull out PR comments above tests. NFC
Commit: 13115276d0d12b0d9bf952abdc19f04866db16a8
https://github.com/llvm/llvm-project/commit/13115276d0d12b0d9bf952abdc19f04866db16a8
Author: David Green <david.green at arm.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/aarch64-bif-gen.ll
M llvm/test/CodeGen/AArch64/aarch64-bit-gen.ll
M llvm/test/CodeGen/AArch64/abs.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
M llvm/test/CodeGen/AArch64/arm64-neon-v8.1a.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
M llvm/test/CodeGen/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/AArch64/f16-instructions.ll
M llvm/test/CodeGen/AArch64/faddsub.ll
M llvm/test/CodeGen/AArch64/fcopysign.ll
M llvm/test/CodeGen/AArch64/fcvt.ll
M llvm/test/CodeGen/AArch64/fdiv.ll
M llvm/test/CodeGen/AArch64/fminimummaximum.ll
M llvm/test/CodeGen/AArch64/fminmax.ll
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/fmul.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
M llvm/test/CodeGen/AArch64/fsqrt.ll
M llvm/test/CodeGen/AArch64/insertextract.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/llvm.exp10.ll
M llvm/test/CodeGen/AArch64/popcount.ll
M llvm/test/CodeGen/AArch64/ptradd.ll
M llvm/test/CodeGen/AArch64/shift.ll
M llvm/test/CodeGen/AArch64/store.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AArch64/vecreduce-fadd-strict.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization-nan.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmaximum.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmin-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fminimum.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul-strict.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
M llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll
M llvm/test/CodeGen/AArch64/vector-lrint.ll
Log Message:
-----------
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
This reverts commit 61cdba602abe67761ab2bbf12bf85710dfa963f4 due to verifier
issues.
Commit: 14c11e4bcb262496981a2948af11a3f9e9de23ef
https://github.com/llvm/llvm-project/commit/14c11e4bcb262496981a2948af11a3f9e9de23ef
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[coro][NFC] Move switch basic block to beginning of coroutine (#143626)
This makes the code flow when reading the LLVM IR of a split coroutine a
bit more natural. It does not change anything from an end-user
perspective but makes debugging the CoroSplit pass slightly easier.
Commit: 24d730b3808a562507f3f1f5fc125acf4b6e03aa
https://github.com/llvm/llvm-project/commit/24d730b3808a562507f3f1f5fc125acf4b6e03aa
Author: Iris Shi <0.0 at owo.li>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/NVPTX/unfold-masked-merge-vector-variablemask.ll
A llvm/test/CodeGen/RISCV/fold-masked-merge.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
A llvm/test/CodeGen/SystemZ/fold-masked-merge.ll
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
M llvm/test/CodeGen/X86/bitselect.ll
M llvm/test/CodeGen/X86/fold-masked-merge.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll
Log Message:
-----------
Reland "[SelectionDAG] Make `(a & x) | (~a & y) -> (a & (x ^ y)) ^ y` available for all targets" (#143651)
Commit: 937be177528de156922c1b5f6cab08ba3009dbf2
https://github.com/llvm/llvm-project/commit/937be177528de156922c1b5f6cab08ba3009dbf2
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
Log Message:
-----------
[flang] Enable delayed localization by default for `do concurrent` (#142567)
This PR aims to make it easier and more self-contained to revert the
switch/flag if we discover any problems with enabling it by default.
Commit: afbcf9529a1edb88d067e6fca8d9534901310d5e
https://github.com/llvm/llvm-project/commit/afbcf9529a1edb88d067e6fca8d9534901310d5e
Author: CHANDRA GHALE <chandra.nitdgp at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/distribute_simd_misc_messages.c
A clang/test/OpenMP/for_private_reduction_codegen.cpp
M clang/test/OpenMP/for_reduction_messages.cpp
M clang/test/OpenMP/for_simd_reduction_messages.cpp
M clang/test/OpenMP/sections_reduction_messages.cpp
A openmp/runtime/test/worksharing/for/omp_for_private_reduction.cpp
Log Message:
-----------
[OpenMP 6.0 ]Codegen for Reduction over private variables with reduction clause (#134709)
Codegen support for reduction over private variable with reduction
clause. Section 7.6.10 in in OpenMP 6.0 spec.
- An internal shared copy is initialized with an initializer value.
- The shared copy is updated by combining its value with the values from
the private copies created by the clause.
- Once an encountering thread verifies that all updates are complete,
its original list item is updated by merging its value with that of the
shared copy and then broadcast to all threads.
Sample Test Case from OpenMP 6.0 Example
```
#include <assert.h>
#include <omp.h>
#define N 10
void do_red(int n, int *v, int &sum_v)
{
sum_v = 0; // sum_v is private
#pragma omp for reduction(original(private),+: sum_v)
for (int i = 0; i < n; i++)
{
sum_v += v[i];
}
}
int main(void)
{
int v[N];
for (int i = 0; i < N; i++)
v[i] = i;
#pragma omp parallel num_threads(4)
{
int s_v; // s_v is private
do_red(N, v, s_v);
assert(s_v == 45);
}
return 0;
}
```
Expected Codegen:
```
// A shared global/static variable is introduced for the reduction result.
// This variable is initialized (e.g., using memset or a UDR initializer)
// e.g., .omp.reduction.internal_private_var
// Barrier before any thread performs combination
call void @__kmpc_barrier(...)
// Initialization block (executed by thread 0)
// e.g., call void @llvm.memset.p0.i64(...) or call @udr_initializer(...)
call void @__kmpc_critical(...)
// Inside critical section:
// Load the current value from the shared variable
// Load the thread-local private variable's value
// Perform the reduction operation
// Store the result back to the shared variable
call void @__kmpc_end_critical(...)
// Barrier after all threads complete their combinations
call void @__kmpc_barrier(...)
// Broadcast phase:
// Load the final result from the shared variable)
// Store the final result to the original private variable in each thread
// Final barrier after broadcast
call void @__kmpc_barrier(...)
```
---------
Co-authored-by: Chandra Ghale <ghale at pe31.hpc.amslabs.hpecorp.net>
Commit: e44a65ed98ad896d0c0c3b1e10937a19f786b9ef
https://github.com/llvm/llvm-project/commit/e44a65ed98ad896d0c0c3b1e10937a19f786b9ef
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
A flang/test/Transforms/DoConcurrent/locality_specifiers_simple.mlir
Log Message:
-----------
[flang][OpenMP] Map basic `local` specifiers to `private` clauses (#142735)
Starts the effort to map `do concurrent` locality specifiers to OpenMP
clauses. This PR adds support for basic specifiers (no `init` or `copy`
regions yet).
Commit: 7460c700ae3026d927952f911d0e667de6e0c18b
https://github.com/llvm/llvm-project/commit/7460c700ae3026d927952f911d0e667de6e0c18b
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/memset-memcpy-oversized.ll
M llvm/test/Transforms/MemCpyOpt/memset-memcpy-to-2x-memset.ll
M llvm/test/Transforms/MemCpyOpt/mixed-sizes.ll
M llvm/test/Transforms/MemCpyOpt/variable-sized-memset-memcpy.ll
Log Message:
-----------
[MemCpyOpt] handle memcpy from memset in more cases (#140954)
This aims to reduce the divergence between the initial checks in this
function and processMemCpyMemCpyDependence (in particular, adding
handling of offsets), with the goal to eventually reduce duplication
there and improve this pass in other ways.
Commit: ddb771ecfd12cab8d323a4e64e64b965883585de
https://github.com/llvm/llvm-project/commit/ddb771ecfd12cab8d323a4e64e64b965883585de
Author: David Green <david.green at arm.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M clang/include/clang/Basic/AArch64ACLETypes.def
M clang/test/AST/ast-dump-aarch64-neon-types.c
M clang/test/CodeGen/AArch64/mixed-neon-types.c
Log Message:
-----------
[AArch64][Clang] Update new Neon vector element types. (#142760)
This updates the element types used in the new __Int8x8_t types added in
#126945, mostly to allow C++ name mangling in ItaniumMangling
mangleAArch64VectorBase to work correctly. Char is replaced by
SignedCharTy or UnsignedCharTy as required and Float16Ty is better using
HalfTy to match the vector types. Same for Long types.
Commit: 6e0c2bc668107547365d79a6e5f57317a6302c29
https://github.com/llvm/llvm-project/commit/6e0c2bc668107547365d79a6e5f57317a6302c29
Author: Javed Absar <javed.absar at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/Async/IR/AsyncOps.td
Log Message:
-----------
[mlir][async][nfc] Fix typo in async op description (#143621)
Commit: 7ffdf4240d62724dca7f42b37bd8671fefe17e17
https://github.com/llvm/llvm-project/commit/7ffdf4240d62724dca7f42b37bd8671fefe17e17
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
A flang/test/Driver/darwin-version.f90
Log Message:
-----------
[flang][Driver] Enable support for -mmacos-version-min= (#143508)
So far as I can tell this option is driver-only so we can just re-use
what already exists for clang. I've added a unit test based on clang's
unit test to demonstrate that the option is handled.
Still TODO is to ensure that flang-rt is built with the same macos
minimum version as compiler-rt. At the moment, setting the flang minimum
version to older than the macos version on which flang was built will
lead to link warnings because flangrt is built for version of macos on
which flang was built rather than the oldest supported version (as
compiler-rt is).
Commit: 9797b5fcfbb9b9c96a219985f3623849bbd3956e
https://github.com/llvm/llvm-project/commit/9797b5fcfbb9b9c96a219985f3623849bbd3956e
Author: Dmitry Polukhin <34227995+dmpolukhin at users.noreply.github.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
A clang/test/Modules/constexpr-initialization-failure.cpp
Log Message:
-----------
[C++20][Modules] Fix false compilation error with constexpr (#143168)
Use declaresSameEntity when evaluating constexpr to avoid resetting
computed union value due to using different instances of the merged
field decl.
Commit: c59cc2b690b9e528a82ba214f74a8f7c8abb3cde
https://github.com/llvm/llvm-project/commit/c59cc2b690b9e528a82ba214f74a8f7c8abb3cde
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M libunwind/cmake/config-ix.cmake
M libunwind/src/CMakeLists.txt
Log Message:
-----------
[libunwind] Remove checks for -nostdlib++ (#143162)
libunwind uses a C linker, so it's never even trying to link against any
C++ libraries. This removes the code which tries to drop C++ libraries,
which makes the CMake configuration simpler and allows for upgrading
GCC.
Commit: ea9046699eae04ac5159a1666f19b5b32e5d41c1
https://github.com/llvm/llvm-project/commit/ea9046699eae04ac5159a1666f19b5b32e5d41c1
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
M llvm/include/llvm/IR/Function.h
M llvm/lib/IR/Function.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
A llvm/test/Transforms/SROA/scalable-vectors-with-known-vscale.ll
M llvm/test/Transforms/SROA/scalable-vectors.ll
Log Message:
-----------
[LLVM][SROA] Teach SROA how to "bitcast" between fixed and scalable vectors. (#130973)
For function whose vscale_range is limited to a single value we can size
scalable vectors. This aids SROA by allowing scalable vector load and
store operations to be considered for replacement whereby bitcasts
through memory can be replaced by vector insert or extract operations.
Commit: ddef9ce8dad611c2fef172f3b08c5c98235a3b41
https://github.com/llvm/llvm-project/commit/ddef9ce8dad611c2fef172f3b08c5c98235a3b41
Author: CHANDRA GHALE <chandra.nitdgp at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M openmp/runtime/test/worksharing/for/omp_for_private_reduction.cpp
Log Message:
-----------
LLVM Buildbot failure on openmp runtime test (#143674)
Error looks to be missing includes for complex number support in some
system. Removing test for now.
Relevant PR :
[PR-134709](https://github.com/llvm/llvm-project/pull/134709)
```
.---command stderr------------
# | /home/uweigand/sandbox/buildbot/openmp-s390x-linux/llvm.src/openmp/runtime/test/worksharing/for/omp_for_private_reduction.cpp:78:42: error: use of undeclared identifier 'I'
# | 78 | double _Complex expected = 0.0 + 0.0 * I;
# | | ^
# | /home/uweigand/sandbox/buildbot/openmp-s390x-linux/llvm.src/openmp/runtime/test/worksharing/for/omp_for_private_reduction.cpp:79:40: error: use of undeclared identifier 'I'
# | 79 | double _Complex result = 0.0 + 0.0 * I;
# | | ^
# | /home/uweigand/sandbox/buildbot/openmp-s390x-linux/llvm.src/openmp/runtime/test/worksharing/for/omp_for_private_reduction.cpp:84:22: error: use of undeclared identifier 'I'
# | 84 | arr[i] = i - i * I;
# | | ^
# | /home/uweigand/sandbox/buildbot/openmp-s390x-linux/llvm.src/openmp/runtime/test/worksharing/for/omp_for_private_reduction.cpp:92:19: error: use of undeclared identifier 'creal'
# | 92 | real_sum += creal(arr[i]);
# | | ^~~~~
# | /home/uweigand/sandbox/buildbot/openmp-s390x-linux/llvm.src/openmp/runtime/test/worksharing/for/omp_for_private_reduction.cpp:93:19: error: use of undeclared identifier 'cimag'
# | 93 | imag_sum += cimag(arr[i]);
# | | ^~~~~
# | /home/uweigand/sandbox/buildbot/openmp-s390x-linux/llvm.src/openmp/runtime/test/worksharing/for/omp_for_private_reduction.cpp:96:36: error: use of undeclared identifier 'I'
# | 96 | result = real_sum + imag_sum * I;
# | | ^
# | /home/uweigand/sandbox/buildbot/openmp-s390x-linux/llvm.src/openmp/runtime/test/worksharing/for/omp_for_private_reduction.cpp:97:9: error: use of undeclared identifier 'cabs'
# | 97 | if (cabs(result - expected) > 1e-6) {
# | | ^~~~
# | 7 errors generated.
```
Co-authored-by: Chandra Ghale <ghale at pe31.hpc.amslabs.hpecorp.net>
Commit: 354cfba5209eed5ea6bafb6a3e69e65148c4e25d
https://github.com/llvm/llvm-project/commit/354cfba5209eed5ea6bafb6a3e69e65148c4e25d
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/PassManagerImpl.h
M llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/IR/IRPrintingPasses.cpp
M llvm/lib/IR/LegacyPassManager.cpp
M llvm/lib/IRPrinter/IRPrintingPasses.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
Log Message:
-----------
[DebugInfo][RemoveDIs] Remove scoped-dbg-format-setter (#143450)
This was a utility for flipping between intrinsic and debug record mode
-- we don't need it any more. The "IsNewDbgInfoFormat" should be true
everywhere.
Commit: 79a72c47d09c2e2cee645430f9d290c20d2618f1
https://github.com/llvm/llvm-project/commit/79a72c47d09c2e2cee645430f9d290c20d2618f1
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AArch64/sve-rem.ll
Log Message:
-----------
[AArch64] Consider negated powers of 2 when calculating throughput cost (#143013)
Negated powers of 2 have similar or (exact in the case of remainder)
codegen with lowering sdiv. In the case of sdiv, it just negates the
result in the end anyway, so nothing dissimilar at all.
Commit: 40cc7b4578fd2d65aaef8356fbe7caf2d84a8f3e
https://github.com/llvm/llvm-project/commit/40cc7b4578fd2d65aaef8356fbe7caf2d84a8f3e
Author: Tomas Matheson <Tomas.Matheson at arm.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
A clang/test/Frontend/aarch64-print-enabled-extensions-cc1.c
Log Message:
-----------
[clang][AArch64] test -cc1 -print-enabled-extensions (#143570)
This adds tests that document how -cc1 and -print-enabled-extensions
interact. The current behaviour looks wrong, and is caused by the fact
that --print-enabled-extensions uses the MC subtarget feature API to
determine the list of extensions to print, whereas the frontend uses the
TargetParser API. The latter does no dependency expansion for the
-target-feature flags but the MC API does.
This doesn't fix anything but at least it documents the current
behaviour, and will serve as a pre-commit test for any future fixes.
Commit: 19b0e1227ca6653405e4a34627d04a14f2287f26
https://github.com/llvm/llvm-project/commit/19b0e1227ca6653405e4a34627d04a14f2287f26
Author: Luke Lau <luke at igalia.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/fp-undef-poison.ll
Log Message:
-----------
[ConstantFolding] Fold sqrt poison -> poison (#141821)
I noticed this when a sqrt produced by VectorCombine with a poison
operand wasn't getting folded away to poison.
Most intrinsics in general could probably be folded to poison if one of
their arguments are poison too. Are there any exceptions to this we need
to be aware of?
Commit: 44a7ecd1d7485be94d3a92021c650175f100d2f7
https://github.com/llvm/llvm-project/commit/44a7ecd1d7485be94d3a92021c650175f100d2f7
Author: Alexander Ziaee <concussious at runbox.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M lld/ELF/Relocations.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
M lldb/tools/debugserver/source/RNBRemote.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M openmp/tools/archer/ompt-tsan.cpp
Log Message:
-----------
[doc] Use ISO nomenclature for 1024 byte units (#133148)
Increase specificity by using the correct unit sizes. KBytes is an
abbreviation for kB, 1000 bytes, and the hardware industry as well as
several operating systems have now switched to using 1000 byte kBs.
If this change is acceptable, sometimes GitHub mangles merges to use the
original email of the account. $dayjob asks contributions have my work
email. Thanks!
Commit: abbbe4a6cd1b83b89a834163335053863f5ffbfa
https://github.com/llvm/llvm-project/commit/abbbe4a6cd1b83b89a834163335053863f5ffbfa
Author: Simone Pellegrini <simone.pellegrini at arm.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M flang/test/HLFIR/assign-side-effects.fir
M flang/test/HLFIR/memory-effects.fir
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Bufferization/side-effects.mlir
A mlir/test/Dialect/Vector/side-effects.mlir
M mlir/test/IR/test-side-effects.mlir
M mlir/test/lib/IR/TestSideEffects.cpp
Log Message:
-----------
[mlir][vector] Fix attaching write effects on transfer_write's base (#142940)
This fixes an issue with `TransferWriteOp`'s implementation of the
`MemoryEffectOpInterface` where the write effect was attached to the
stored value rather than the base.
This had the effect that when asking for the memory effects for the
input memref buffer using `getEffectsOnValue(...)`, the function would
return no-effects (as the effect would have been attached to the stored
value rather than the input buffer).
Commit: 2dd88c405d77b34dc028af09f3d55fa10dbed50e
https://github.com/llvm/llvm-project/commit/2dd88c405d77b34dc028af09f3d55fa10dbed50e
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
A flang/test/Transforms/DoConcurrent/locality_specifiers_init_dealloc.mlir
Log Message:
-----------
[flang][OpenMP] Extend locality spec to OMP claues (`init` and `dealloc` regions) (#142795)
Extends support for locality specifier to OpenMP translation by adding
supprot for transling localizers that have `init` and `dealloc` regions.
Commit: 756e7cfd86c7f2bf20aaa1a3f87b5aa72ec128b4
https://github.com/llvm/llvm-project/commit/756e7cfd86c7f2bf20aaa1a3f87b5aa72ec128b4
Author: Adrian Vogelsgesang <vogelsgesang at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CGVTables.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/coroutine_handle/TestCoroutineHandle.py
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values-not_used_in_frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/Coroutines/coro-debug.ll
Log Message:
-----------
[debuginfo][coro] Fix linkage name for clones of coro functions (#141889)
So far, the `DW_AT_linkage_name` of the coroutine `resume`, `destroy`,
`cleanup` and `noalloc` function clones were incorrectly set to the
original function name instead of the updated function names.
With this commit, we now update the `DW_AT_linkage_name` to the correct
name. This has multiple benefits:
1. it's easier for me (and other toolchain developers) to understand the
output of `llvm-dwarf-dump` when coroutines are involved.
2. When hitting a breakpoint, both LLDB and GDB now tell you which clone
of the function you are in. E.g., GDB now prints "Breakpoint 1.2,
coro_func(int) [clone .resume] (v=43) at ..." instead of "Breakpoint
1.2, coro_func(int) (v=43) at ...".
3. GDB's `info line coro_func` command now allows you to distinguish the
multiple different clones of the function.
In Swift, the linkage names of the clones were already updated. The
comment right above the relevant code in `CoroSplit.cpp` already hinted
that the linkage name should probably also be updated in C++. This
comment was added in commit 6ce76ff7eb7640, and back then the
corresponding `DW_AT_specification` (i.e., `SP->getDeclaration()`) was
not updated, yet, which led to problems for C++. In the meantime, commit
ca1a5b37c7236d added code to also update `SP->getDeclaration`, as such
there is no reason anymore to not update the linkage name for C++.
Note that most test cases used inconsistent function names for the LLVM
function vs. the DISubprogram linkage name. clang would never emit such
LLVM IR. This confused me initially, and hence I fixed it while updating
the test case.
Drive-by fix: The change in `CGVTables.cpp` is purely stylistic, NFC.
When looking for other usages of `replaceWithDistinct`, I got initially
confused because `CGVTables.cpp` was calling a static function via an
object instance.
Commit: f44f411afa914107d0a2395d2d8db826f88205e5
https://github.com/llvm/llvm-project/commit/f44f411afa914107d0a2395d2d8db826f88205e5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
A llvm/test/CodeGen/MSP430/fcmp.ll
Log Message:
-----------
MSP430: Add tests for fcmp (#142706)
The existing coverage is thin. libcalls.ll seems to be the main fcmp
test, and it doesn't cover all the condition types, and runs with -O0.
Test all conditions for f32 and f64
Commit: 953a778fabc48025569fe0d5b3b363b981263f21
https://github.com/llvm/llvm-project/commit/953a778fabc48025569fe0d5b3b363b981263f21
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
A llvm/test/CodeGen/RISCV/fpenv-xlen.ll
M llvm/test/CodeGen/RISCV/frm-write-in-loop.ll
Log Message:
-----------
[RISCV][FPEnv] Lowering of fpenv intrinsics (#141498)
The change implements custom lowering of `get_fpenv`, `set_fpenv` and
`reset_fpenv` for RISCV target.
Commit: 4a46ead8fb5b57e69bcd1c72ebd7dd8eaf09fa9c
https://github.com/llvm/llvm-project/commit/4a46ead8fb5b57e69bcd1c72ebd7dd8eaf09fa9c
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/Plugins/Language/CPlusPlus/Coroutines.cpp
M lldb/source/Plugins/Language/CPlusPlus/Coroutines.h
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/coroutine_handle/TestCoroutineHandle.py
Log Message:
-----------
[lldb] Show coro_frame in `std::coroutine_handle` pretty printer (#141516)
This commit adjusts the pretty printer for `std::coroutine_handle` based
on recent personal experiences with debugging C++20 coroutines:
1. It adds the `coro_frame` member. This member exposes the complete
coroutine frame contents, including the suspension point id and all
internal variables which the compiler decided to persist into the
coroutine frame. While this data is highly compiler-specific, inspecting
it can help identify the internal state of suspended coroutines.
2. It includes the `promise` and `coro_frame` members, even if
devirtualization failed and we could not infer the promise type / the
coro_frame type. Having them available as `void*` pointers can still be
useful to identify, e.g., which two coroutine handles have the same
frame / promise pointers.
Commit: 3ef7d035e21d8f75eb85b521d7ff0203e60cb6f2
https://github.com/llvm/llvm-project/commit/3ef7d035e21d8f75eb85b521d7ff0203e60cb6f2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
Log Message:
-----------
MSP430: Stop using setCmpLibcallCC (#142708)
This appears to only be useful for the eq/ne cases, and only for
ARM libcalls. This is setting it to the default values, and there's
no change in the new fcmp test output.
Commit: ac7fa4099e83d6490d2f9ea185b236db2f26e652
https://github.com/llvm/llvm-project/commit/ac7fa4099e83d6490d2f9ea185b236db2f26e652
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
Log Message:
-----------
MSP430: Partially move runtime libcall config out of TargetLowering (#142709)
RuntimeLibcalls needs to be correct outside of codegen contexts.
Commit: 33fee564998598a52e802292db25c0ee52f7e1a6
https://github.com/llvm/llvm-project/commit/33fee564998598a52e802292db25c0ee52f7e1a6
Author: Nathan Gauër <brioche at google.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
M clang/test/CodeGenHLSL/group_shared.hlsl
Log Message:
-----------
[HLSL][SPIR-V] Change SPV AS map for groupshared (#143519)
The previous mapping we setting the hlsl_groupshared AS to 0, which
translated to either Generic or Function.
Changing this to 3, which translated to Workgroup.
Related to #142804
Commit: 50f534e21cfb47aaf44e1613f71b56cca55ba395
https://github.com/llvm/llvm-project/commit/50f534e21cfb47aaf44e1613f71b56cca55ba395
Author: Nathan Gauër <brioche at google.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
A clang/test/SemaHLSL/Semantics/position.ps.hlsl
A clang/test/SemaHLSL/Semantics/position.ps.size.hlsl
A clang/test/SemaHLSL/Semantics/position.vs.hlsl
Log Message:
-----------
[HLSL][SPIR-V] Handle SV_Position builtin in PS (#141759)
This commit is using the same mechanism as vk::ext_builtin_input to
implement the SV_Position semantic input.
The HLSL signature is not yet ready for DXIL, hence this commit only
implements the SPIR-V side.
This is incomplete as it doesn't allow the semantic on hull/domain and
other shaders, but it's a first step to validate the overall
input/output
semantic logic.
Fixes https://github.com/llvm/llvm-project/issues/136969
Commit: b49c7896c0a31ca618098b52a28eb87dff625b8f
https://github.com/llvm/llvm-project/commit/b49c7896c0a31ca618098b52a28eb87dff625b8f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M libcxx/include/__bit/countr.h
M libcxx/include/__bit/popcount.h
Log Message:
-----------
[libc++] Fix constraints in `__countr_zero` and `__popcount`
Currently these two functions are constrained on `is_unsigned`, which is
more permissive than what is required by the standard for their public
counterparts. This fixes the constraints to match the public functions
by using `__libcpp_is_unsigned_integer` instead.
Commit: 3c56437eafee95f368feb20d28b74c29504b833d
https://github.com/llvm/llvm-project/commit/3c56437eafee95f368feb20d28b74c29504b833d
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__bit/bit_ceil.h
M libcxx/include/__bit/bit_floor.h
M libcxx/include/__bit/bit_log2.h
M libcxx/include/__bit/bit_width.h
M libcxx/include/__bit/countl.h
M libcxx/include/__bit/countr.h
M libcxx/include/__bit/has_single_bit.h
M libcxx/include/__bit/popcount.h
M libcxx/include/__bit/rotate.h
M libcxx/include/__concepts/arithmetic.h
M libcxx/include/__format/format_arg_store.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/__numeric/saturation_arithmetic.h
A libcxx/include/__type_traits/integer_traits.h
R libcxx/include/__type_traits/is_signed_integer.h
R libcxx/include/__type_traits/is_unsigned_integer.h
M libcxx/include/__utility/cmp.h
M libcxx/include/module.modulemap.in
M libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_integer.compile.pass.cpp
M libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_signed_integer.compile.pass.cpp
M libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_unsigned_integer.compile.pass.cpp
Log Message:
-----------
[libc++] Refactor signed/unsigned integer traits (#142750)
This patch does a few things:
- `__libcpp_is_signed_integer` and `__libcpp_is_unsigned_integer` are
refactored to be variable templates instead of class templates.
- the two traits are merged into a single header
`<__type_traits/integer_traits.h>`.
- `__libcpp_signed_integer`, `__libcpp_unsigned_integer` and
`__libcpp_integer` are moved into the same header.
- The above mentioned concepts are renamed to `__signed_integer`,
`__unsigned_integer` and `__signed_or_unsigned_integer` respectively.
Commit: b10d711362b8634cefcb288d9f1b577f63adb9f7
https://github.com/llvm/llvm-project/commit/b10d711362b8634cefcb288d9f1b577f63adb9f7
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M libcxx/include/__type_traits/is_integral.h
Log Message:
-----------
[libc++][NFC] Move __libcpp_is_integral into the else branch (#142556)
This makes it clear that `__libcpp_is_integral` is an implementation
detail of `is_integral` if we don't have `__is_integral` and not its own
utility.
Commit: 2692c3aa6760f1e4ea015f906926f63ec7dce044
https://github.com/llvm/llvm-project/commit/2692c3aa6760f1e4ea015f906926f63ec7dce044
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 3c56437eafee
Commit: 3d7aa961ac96f83d2e28f107c6dfa5a6a279b364
https://github.com/llvm/llvm-project/commit/3d7aa961ac96f83d2e28f107c6dfa5a6a279b364
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/drop-debug-info-nonzero-alloca.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/verify.ll
M llvm/test/DebugInfo/Generic/sroa-extract-bits.ll
M llvm/test/Transforms/IROutliner/outlining-debug-statements.ll
M llvm/test/Transforms/ObjCARC/code-motion.ll
A llvm/test/Verifier/RemoveDI/invalid-dbg-declare-operands.ll
A llvm/test/Verifier/dbg-declare-invalid-debug-loc.ll
M llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll
M llvm/test/Verifier/llvm.dbg.declare-address.ll
M llvm/test/Verifier/llvm.dbg.declare-expression.ll
M llvm/test/Verifier/llvm.dbg.declare-variable.ll
M llvm/test/Verifier/llvm.dbg.intrinsic-dbg-attachment.ll
M llvm/test/Verifier/llvm.dbg.value-expression.ll
M llvm/test/Verifier/llvm.dbg.value-value.ll
M llvm/test/Verifier/llvm.dbg.value-variable.ll
M llvm/unittests/IR/DebugInfoTest.cpp
Log Message:
-----------
[DebugInfo][RemoveDIs] Use autoupgrader to convert old debug-info (#143452)
By chance, two things have prevented the autoupgrade path being
exercised much so far:
* LLParser setting the debug-info mode to "old" on seeing intrinsics,
* The test in AutoUpgrade.cpp wanting to upgrade into a "new" debug-info
block.
In practice, this appears to mean this code path hasn't seen the various
invalid inputs that can come its way. This commit does a number of
things:
* Tolerates the various illegal inputs that can be written with
debug-intrinsics, and that must be tolerated until the Verifier runs,
* Printing illegal/null DbgRecord fields must succeed,
* Verifier errors need to localise the function/block where the error
is,
* Tests that now see debug records will print debug-record errors,
Plus a few new tests for other intrinsic-to-debug-record failures modes
I found. There are also two edge cases:
* Some of the unit tests switch back and forth between intrinsic and
record modes at will; I've deleted coverage and some assertions to
tolerate this as intrinsic support is now Gone (TM),
* In sroa-extract-bits.ll, the order of debug records flips. This is
because the autoupgrader upgrades in the opposite order to the basic
block conversion routines... which doesn't change the record order, but
_does_ change the use list order in Metadata! This should (TM) have no
consequence to the correctness of LLVM, but will change the order of
various records and the order of DWARF record output too.
I tried to reduce this patch to a smaller collection of changes, but
they're all intertwined, sorry.
Commit: e15d50d5ff295368edaf7bff67f405617310722c
https://github.com/llvm/llvm-project/commit/e15d50d5ff295368edaf7bff67f405617310722c
Author: Darren Wihandi <65404740+fairywreath at users.noreply.github.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
M mlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
Log Message:
-----------
[mlir][spirv] Add lowering of multiple math trig/hypb functions (#143604)
Add Math to SPIRV lowering for tan, asin, acos, sinh, cosh, asinh, acosh
and atanh. This completes the lowering of all trigonometric and
hyperbolic functions from math to SPIRV.
Commit: cc9f67416d048bf464425b5a9243219efcb08c34
https://github.com/llvm/llvm-project/commit/cc9f67416d048bf464425b5a9243219efcb08c34
Author: Kajetan Puchalski <kajetan.puchalski at arm.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/implicit-dsa.f90
Log Message:
-----------
[flang][OpenMP] Consider previous DSA for static duration variables (#143601)
Symbols that have a pre-existing DSA set in the enclosing context should
not be made shared based on them being static duration variables.
Suggested-by: Leandro Lupori <leandro.lupori at linaro.org>
---------
Signed-off-by: Kajetan Puchalski <kajetan.puchalski at arm.com>
Commit: b512077c373a4416c506002383c69867cfee0741
https://github.com/llvm/llvm-project/commit/b512077c373a4416c506002383c69867cfee0741
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/work-queue.h
Log Message:
-----------
[flang][runtime] Another try to fix build failure (#143702)
Tweak accessibility to try to get code past whatever gcc is being used
by the flang-runtime-cuda-gcc build bot.
Commit: b09206db154bab8fa09b6708e642a6bba3d125be
https://github.com/llvm/llvm-project/commit/b09206db154bab8fa09b6708e642a6bba3d125be
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
Log Message:
-----------
[mlir][spirv] Include `SPIRV_AnyImage` in `SPIRV_Type` (#143676)
This change is trigger by encountering the following error:
```
<unknown>:0: error: 'spirv.Load' op result #0 must be void
or bool or 8/16/32/64-bit integer or 16/32/64-bit float or
vector of bool or 8/16/32/64-bit integer or 16/32/64-bit
float values of length 2/3/4/8/16 or any SPIR-V pointer type
or any SPIR-V array type or any SPIR-V run time array type
or any SPIR-V struct type or any SPIR-V cooperative matrix
type or any SPIR-V matrix type or any SPIR-V sampled image
type, but got '!spirv.image<f32, Dim2D, NoDepth, NonArrayed,
SingleSampled, NoSampler, Rgba8>'<unknown>:0: note: see current
operation:
%126 = "spirv.Load"(%125) {relaxed_precision} : (!spirv.ptr<!spirv.image<f32, Dim2D, NoDepth, NonArrayed, SingleSampled, NoSampler, Rgba8>, UniformConstant>) -> !spirv.image<f32, Dim2D, NoDepth, NonArrayed, SingleSampled, NoSampler, Rgba8>
```
Commit: 6b0cb762af97579ca8ff5eea9be896169a1752b7
https://github.com/llvm/llvm-project/commit/6b0cb762af97579ca8ff5eea9be896169a1752b7
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
M clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp
Log Message:
-----------
[Clang] _default-movable_ should be based on the first declaration (#143661)
When the definition of a special member function was defaulted we would
not consider it user-provided, even when the first declaration was not
defaulted.
Fixes #143599
Commit: c71a2e688828ab3ede4fb54168a674ff68396f61
https://github.com/llvm/llvm-project/commit/c71a2e688828ab3ede4fb54168a674ff68396f61
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
Log Message:
-----------
[DebugInfo][RemoveDIs] Remove some debug intrinsic-only codepaths (#143451)
These are opportunistic deletions as more places that make use of the
IsNewDbgInfoFormat flag are removed. It should (TM)(R) all be dead code
now that `IsNewDbgInfoFormat` should be true everywhere.
FastISel: we don't need to do debug-aware instruction counting any more,
because there are no debug instructions,
Autoupgrade: you can no-longer avoid autoupgrading of intrinsics to
records
DIBuilder: Delete the code for creating debug intrinsics (!)
LoopUtils: No need to handle debug instructions, they don't exist
Commit: 46d9abbba2ad63c0280d4248cc2349de78439294
https://github.com/llvm/llvm-project/commit/46d9abbba2ad63c0280d4248cc2349de78439294
Author: David Truby <david.truby at arm.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M flang/Maintainers.md
Log Message:
-----------
[flang] Add David Truby as maintainer for Flang on Windows (#142619)
Commit: 76197ea6f91f802467f2614e1217e99eb4037200
https://github.com/llvm/llvm-project/commit/76197ea6f91f802467f2614e1217e99eb4037200
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
Log Message:
-----------
Revert "[DebugInfo][RemoveDIs] Remove some debug intrinsic-only codepaths (#143451)"
This reverts commit c71a2e688828ab3ede4fb54168a674ff68396f61.
/me squints -- this is hitting an assertion I thought had been deleted,
will revert and investigate for a bit.
Commit: 6fb2a80189016bd4222b174ae4d72e47d0aa58ff
https://github.com/llvm/llvm-project/commit/6fb2a80189016bd4222b174ae4d72e47d0aa58ff
Author: Davide Grohmann <6573166+davidegrohmann at users.noreply.github.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M mlir/include/mlir/Target/SPIRV/SPIRVBinaryUtils.h
M mlir/lib/Target/SPIRV/SPIRVBinaryUtils.cpp
Log Message:
-----------
[mlir][spirv] Truncate Literal String size at max number words (#142916)
If not truncated the SPIRV serialization would not fail but instead
produce an invalid SPIR-V module.
---------
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 76e14deb4a6967388a9bf84db2feeac17a30c786
https://github.com/llvm/llvm-project/commit/76e14deb4a6967388a9bf84db2feeac17a30c786
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RegisterClassInfo.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/Target/Target.td
M llvm/lib/CodeGen/BreakFalseDeps.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.td
M llvm/test/CodeGen/X86/avx-cvt.ll
M llvm/test/CodeGen/X86/avx512-cvt.ll
M llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
M llvm/test/CodeGen/X86/avx512fp16-cvt.ll
M llvm/test/CodeGen/X86/avx512fp16-novl.ll
M llvm/test/CodeGen/X86/break-false-dep.ll
M llvm/test/CodeGen/X86/coalescer-commute1.ll
M llvm/test/CodeGen/X86/fast-isel-fptrunc-fpext.ll
M llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll
M llvm/test/CodeGen/X86/fast-isel-int-float-conversion.ll
M llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll
M llvm/test/CodeGen/X86/fast-isel-uint-float-conversion.ll
M llvm/test/CodeGen/X86/fcmp-logic.ll
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/X86/fold-load-unops.ll
M llvm/test/CodeGen/X86/fp-intrinsics.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
M llvm/test/CodeGen/X86/ftrunc.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/isel-int-to-fp.ll
M llvm/test/CodeGen/X86/pr34080.ll
M llvm/test/CodeGen/X86/pr37879.ll
M llvm/test/CodeGen/X86/pr38803.ll
M llvm/test/CodeGen/X86/rounding-ops.ll
M llvm/test/CodeGen/X86/scalar-int-to-fp.ll
M llvm/test/CodeGen/X86/select-narrow-int-to-fp.ll
M llvm/test/CodeGen/X86/split-extend-vector-inreg.ll
M llvm/test/CodeGen/X86/sse-cvttp2si.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
M llvm/test/CodeGen/X86/vec-strict-inttofp-128.ll
M llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
M llvm/test/CodeGen/X86/vec-strict-inttofp-512.ll
M llvm/test/CodeGen/X86/vec_int_to_fp.ll
M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
BreakFalseDeps picks the best register for undef operands if
instructions have false dependency. The problem is if the instruction is
close to the beginning of the function, ReachingDefAnalysis is over
optimism to the unused registers, which results in collision with
registers just defined in the caller.
This patch changes the selection of undef register in an reverse order,
which reduces the probability of register collisions between caller and
callee. It brings improvement in some of our internal benchmarks with
negligible effect on other benchmarks.
Commit: fa9e1a1515549124dd76ddc55a8a532795d51fae
https://github.com/llvm/llvm-project/commit/fa9e1a1515549124dd76ddc55a8a532795d51fae
Author: RonDahan101 <166982786+RonDahan101 at users.noreply.github.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
M llvm/test/CodeGen/AArch64/neon-scalarize-histogram.ll
Log Message:
-----------
[AArch64] Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (#138447)
This patch extends the llvm.histogram intrinsic to support additional
update operations beyond the existing add. Specifically, the new
supported operations are:
* umax: unsigned maximum
* umin: unsigned minimum
* uadd.sat: unsigned saturated addition
Based on the discussion from:
https://discourse.llvm.org/t/rfc-expanding-the-experimental-histogram-intrinsic/84673
Commit: 775ad3e49c83407b79dd5ad533204884cb8b23ce
https://github.com/llvm/llvm-project/commit/775ad3e49c83407b79dd5ad533204884cb8b23ce
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[flang][acc] Ensure all acc.loop get a default parallelism determination mode (#143623)
This PR updates the flang lowering to explicitly implement the OpenACC
rules:
- As per OpenACC 3.3 standard section 2.9.6 independent clause: A loop
construct with no auto or seq clause is treated as if it has the
independent clause when it is an orphaned loop construct or its parent
compute construct is a parallel construct.
- As per OpenACC 3.3 standard section 2.9.7 auto clause: When the parent
compute construct is a kernels construct, a loop construct with no
independent or seq clause is treated as if it has the auto clause.
- Loops in serial regions are `seq` if they have no other parallelism
marking such as gang, worker, vector.
For now the `acc.loop` verifier has not yet been updated to enforce
this.
Commit: 39ba888e1ff11b64ca9db358d96feb287aaa810b
https://github.com/llvm/llvm-project/commit/39ba888e1ff11b64ca9db358d96feb287aaa810b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-06-11 (Wed, 11 Jun 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .github/workflows/email-check.yaml
M .github/workflows/premerge.yaml
M bolt/test/AArch64/adr-relaxation.s
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AArch64ACLETypes.def
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/test/AST/ast-dump-aarch64-neon-types.c
A clang/test/CIR/CodeGen/ctor.cpp
M clang/test/CodeGen/AArch64/mixed-neon-types.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
M clang/test/CodeGenHLSL/group_shared.hlsl
A clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
A clang/test/Frontend/aarch64-print-enabled-extensions-cc1.c
A clang/test/Modules/constexpr-initialization-failure.cpp
M clang/test/OpenMP/distribute_simd_misc_messages.c
A clang/test/OpenMP/for_private_reduction_codegen.cpp
M clang/test/OpenMP/for_reduction_messages.cpp
M clang/test/OpenMP/for_simd_reduction_messages.cpp
M clang/test/OpenMP/sections_reduction_messages.cpp
M clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
M clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp
A clang/test/SemaHLSL/Semantics/position.ps.hlsl
A clang/test/SemaHLSL/Semantics/position.ps.size.hlsl
A clang/test/SemaHLSL/Semantics/position.vs.hlsl
M compiler-rt/test/hwasan/TestCases/Posix/dlerror.cpp
M compiler-rt/test/tysan/CMakeLists.txt
M flang-rt/include/flang-rt/runtime/work-queue.h
M flang/Maintainers.md
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Driver/darwin-version.f90
M flang/test/HLFIR/assign-side-effects.fir
M flang/test/HLFIR/memory-effects.fir
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops3.f90
M flang/test/Semantics/OpenMP/implicit-dsa.f90
M flang/test/Semantics/cuf21.cuf
A flang/test/Semantics/cuf22.cuf
A flang/test/Transforms/DoConcurrent/locality_specifiers_init_dealloc.mlir
A flang/test/Transforms/DoConcurrent/locality_specifiers_simple.mlir
M flang/tools/bbc/bbc.cpp
M libc/test/src/sys/prctl/linux/CMakeLists.txt
M libc/test/src/sys/prctl/linux/prctl_test.cpp
M libcxx/include/CMakeLists.txt
M libcxx/include/__bit/bit_ceil.h
M libcxx/include/__bit/bit_floor.h
M libcxx/include/__bit/bit_log2.h
M libcxx/include/__bit/bit_width.h
M libcxx/include/__bit/countl.h
M libcxx/include/__bit/countr.h
M libcxx/include/__bit/has_single_bit.h
M libcxx/include/__bit/popcount.h
M libcxx/include/__bit/rotate.h
M libcxx/include/__chrono/time_point.h
M libcxx/include/__concepts/arithmetic.h
M libcxx/include/__format/format_arg_store.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/__numeric/saturation_arithmetic.h
A libcxx/include/__type_traits/integer_traits.h
M libcxx/include/__type_traits/is_integral.h
R libcxx/include/__type_traits/is_signed_integer.h
R libcxx/include/__type_traits/is_unsigned_integer.h
M libcxx/include/__utility/cmp.h
M libcxx/include/chrono
M libcxx/include/module.modulemap.in
M libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_integer.compile.pass.cpp
M libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_signed_integer.compile.pass.cpp
M libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_unsigned_integer.compile.pass.cpp
A libcxx/test/std/time/time.point/time.point.arithmetic/op_++.pass.cpp
A libcxx/test/std/time/time.point/time.point.arithmetic/op_++int.pass.cpp
A libcxx/test/std/time/time.point/time.point.arithmetic/op_--.pass.cpp
A libcxx/test/std/time/time.point/time.point.arithmetic/op_--int.pass.cpp
M libunwind/cmake/config-ix.cmake
M libunwind/src/CMakeLists.txt
M lld/ELF/Relocations.cpp
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/Plugins/Language/CPlusPlus/Coroutines.cpp
M lldb/source/Plugins/Language/CPlusPlus/Coroutines.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/coroutine_handle/TestCoroutineHandle.py
M lldb/tools/debugserver/source/RNBRemote.cpp
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/RegisterClassInfo.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/PassManagerImpl.h
M llvm/include/llvm/Target/Target.td
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp
M llvm/lib/CodeGen/BreakFalseDeps.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/IRPrintingPasses.cpp
M llvm/lib/IR/LegacyPassManager.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IRPrinter/IRPrintingPasses.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86RegisterInfo.td
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AArch64/sve-rem.ll
M llvm/test/Assembler/drop-debug-info-nonzero-alloca.ll
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/aarch64-bif-gen.ll
M llvm/test/CodeGen/AArch64/aarch64-bit-gen.ll
M llvm/test/CodeGen/AArch64/abs.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
M llvm/test/CodeGen/AArch64/arm64-neon-v8.1a.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
M llvm/test/CodeGen/AArch64/arm64-vector-insertion.ll
M llvm/test/CodeGen/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/AArch64/f16-instructions.ll
M llvm/test/CodeGen/AArch64/faddsub.ll
M llvm/test/CodeGen/AArch64/fcopysign.ll
M llvm/test/CodeGen/AArch64/fcvt.ll
M llvm/test/CodeGen/AArch64/fdiv.ll
M llvm/test/CodeGen/AArch64/fminimummaximum.ll
M llvm/test/CodeGen/AArch64/fminmax.ll
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/fmul.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
M llvm/test/CodeGen/AArch64/fsqrt.ll
M llvm/test/CodeGen/AArch64/insertextract.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/llvm.exp10.ll
M llvm/test/CodeGen/AArch64/neon-scalarize-histogram.ll
M llvm/test/CodeGen/AArch64/popcount.ll
M llvm/test/CodeGen/AArch64/ptradd.ll
M llvm/test/CodeGen/AArch64/shift.ll
M llvm/test/CodeGen/AArch64/store.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AArch64/vecreduce-fadd-strict.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization-nan.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmaximum.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmin-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fminimum.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul-strict.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
M llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll
M llvm/test/CodeGen/AArch64/vector-lrint.ll
A llvm/test/CodeGen/MSP430/fcmp.ll
A llvm/test/CodeGen/RISCV/fpenv-xlen.ll
M llvm/test/CodeGen/RISCV/frm-write-in-loop.ll
M llvm/test/CodeGen/RISCV/rv32xandesperf.ll
M llvm/test/CodeGen/RISCV/rv64xandesperf.ll
A llvm/test/CodeGen/RISCV/select-cond.ll
M llvm/test/CodeGen/X86/avx-cvt.ll
M llvm/test/CodeGen/X86/avx512-cvt.ll
M llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
M llvm/test/CodeGen/X86/avx512fp16-cvt.ll
M llvm/test/CodeGen/X86/avx512fp16-novl.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
M llvm/test/CodeGen/X86/bmi-select-distrib.ll
M llvm/test/CodeGen/X86/break-false-dep.ll
A llvm/test/CodeGen/X86/bsf.ll
A llvm/test/CodeGen/X86/bsr.ll
M llvm/test/CodeGen/X86/coalescer-commute1.ll
M llvm/test/CodeGen/X86/fast-isel-fptrunc-fpext.ll
M llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll
M llvm/test/CodeGen/X86/fast-isel-int-float-conversion.ll
M llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll
M llvm/test/CodeGen/X86/fast-isel-uint-float-conversion.ll
M llvm/test/CodeGen/X86/fcmp-logic.ll
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/X86/fold-load-unops.ll
M llvm/test/CodeGen/X86/fold-masked-merge.ll
M llvm/test/CodeGen/X86/fp-intrinsics.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
M llvm/test/CodeGen/X86/ftrunc.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/isel-int-to-fp.ll
M llvm/test/CodeGen/X86/pr34080.ll
M llvm/test/CodeGen/X86/pr37879.ll
M llvm/test/CodeGen/X86/pr38803.ll
M llvm/test/CodeGen/X86/rounding-ops.ll
M llvm/test/CodeGen/X86/scalar-int-to-fp.ll
M llvm/test/CodeGen/X86/select-narrow-int-to-fp.ll
M llvm/test/CodeGen/X86/split-extend-vector-inreg.ll
M llvm/test/CodeGen/X86/sse-cvttp2si.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
M llvm/test/CodeGen/X86/vec-strict-inttofp-128.ll
M llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
M llvm/test/CodeGen/X86/vec-strict-inttofp-512.ll
M llvm/test/CodeGen/X86/vec_int_to_fp.ll
M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vl.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/verify.ll
M llvm/test/DebugInfo/Generic/sroa-extract-bits.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values-not_used_in_frame.ll
M llvm/test/Transforms/Coroutines/coro-debug-dbg.values.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/Coroutines/coro-debug.ll
M llvm/test/Transforms/IROutliner/outlining-debug-statements.ll
M llvm/test/Transforms/InstSimplify/fp-undef-poison.ll
M llvm/test/Transforms/MemCpyOpt/memset-memcpy-oversized.ll
M llvm/test/Transforms/MemCpyOpt/memset-memcpy-to-2x-memset.ll
M llvm/test/Transforms/MemCpyOpt/mixed-sizes.ll
M llvm/test/Transforms/MemCpyOpt/variable-sized-memset-memcpy.ll
M llvm/test/Transforms/ObjCARC/code-motion.ll
A llvm/test/Transforms/SROA/scalable-vectors-with-known-vscale.ll
M llvm/test/Transforms/SROA/scalable-vectors.ll
R llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/xor-to-or-disjoint.ll
A llvm/test/Verifier/RemoveDI/invalid-dbg-declare-operands.ll
A llvm/test/Verifier/dbg-declare-invalid-debug-loc.ll
M llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll
M llvm/test/Verifier/llvm.dbg.declare-address.ll
M llvm/test/Verifier/llvm.dbg.declare-expression.ll
M llvm/test/Verifier/llvm.dbg.declare-variable.ll
M llvm/test/Verifier/llvm.dbg.intrinsic-dbg-attachment.ll
M llvm/test/Verifier/llvm.dbg.value-expression.ll
M llvm/test/Verifier/llvm.dbg.value-value.ll
M llvm/test/Verifier/llvm.dbg.value-variable.ll
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M mlir/include/mlir/Dialect/Async/IR/AsyncOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Target/SPIRV/SPIRVBinaryUtils.h
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
M mlir/lib/Target/SPIRV/SPIRVBinaryUtils.cpp
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
M mlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
M mlir/test/Dialect/Bufferization/side-effects.mlir
M mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
A mlir/test/Dialect/Vector/side-effects.mlir
M mlir/test/IR/test-side-effects.mlir
M mlir/test/lib/IR/TestSideEffects.cpp
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
A openmp/runtime/test/worksharing/for/omp_for_private_reduction.cpp
M openmp/tools/archer/ompt-tsan.cpp
Log Message:
-----------
Merge branch 'main' into users/kparzysz/spr/a04-atomic-one
Compare: https://github.com/llvm/llvm-project/compare/3c38618fcebd...39ba888e1ff1
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