[all-commits] [llvm/llvm-project] 32ac7d: [test][AArch64] Adjust vector insertion lit tests ...

[Björn Pettersson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 32ac7dc2d21843091116b636777c174830cd2dd0
      https://github.com/llvm/llvm-project/commit/32ac7dc2d21843091116b636777c174830cd2dd0
  Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
  Date:   2025-06-11 (Wed, 11 Jun 2025)

  Changed paths:
    M llvm/test/CodeGen/AArch64/arm64-vector-insertion.ll

  Log Message:
  -----------
  [test][AArch64] Adjust vector insertion lit tests (#143101)

The test cases test_insert_v16i8_insert_2_undef_base and
test_insert_v16i8_insert_2_undef_base_different_valeus in
CodeGen/AArch64/arm64-vector-insertion.ll was leaving element 8 in the
vector as "undef" without any real explanation. It kind of looked like a
typo as the input IR looked like this
   %v.8 = insertelement <16 x i8> %v.7, i8 %a, i32 8
   %v.10 = insertelement <16 x i8> %v.7, i8 %a, i32 10
leaving %v.8 as unused.

This patch is cleaning up the tests a bit by adding separate test cases
to validate what is happening when skipping insert at index 8, while
amending the original tests cases to use %v.8 instead of %v.7 when
creating %v.10.



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