[all-commits] [llvm/llvm-project] 842377: [RISCV] Select signed bitfield insert for XAndesPe...

[Jim Lin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 842377882a3f52e345668751fa6d46ba4f7268d2
      https://github.com/llvm/llvm-project/commit/842377882a3f52e345668751fa6d46ba4f7268d2
  Author: Jim Lin <jim at andestech.com>
  Date:   2025-06-11 (Wed, 11 Jun 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/test/CodeGen/RISCV/rv32xandesperf.ll
    M llvm/test/CodeGen/RISCV/rv64xandesperf.ll

  Log Message:
  -----------
  [RISCV] Select signed bitfield insert for XAndesPerf (#143356)

This patch is similar to #142737

The XAndesPerf extension includes signed bitfield extraction
instruction `NDS.BFOS, which can extract the bits from 0 to Len - 1,
place them starting at bit Lsb, zero-filled the bits from 0 to Lsb -1, 
and sign-extend the result.

When Lsb == Msb, it is a special case where the Lsb will be set to 0
instead of being equal to the Msb.



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