[all-commits] [llvm/llvm-project] 823750: [flang][fir] Add fir.if -> scf.if and add filechec...

Aiden Grossman via All-commits all-commits at lists.llvm.org
Tue Jun 10 01:11:59 PDT 2025


  Branch: refs/heads/users/boomanaiden154/main.ci-refactor-out-some-early-exits-in-compute_projects
  Home:   https://github.com/llvm/llvm-project
  Commit: 823750d873dff1d03865900042fc9b58e0f7f9c3
      https://github.com/llvm/llvm-project/commit/823750d873dff1d03865900042fc9b58e0f7f9c3
  Author: Q <60785373+StarryCSF at users.noreply.github.com>
  Date:   2025-06-10 (Tue, 10 Jun 2025)

  Changed paths:
    M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
    A flang/test/Fir/FirToSCF/if.fir

  Log Message:
  -----------
  [flang][fir] Add fir.if -> scf.if and add filecheck test file (#142965)

This commmit is a supplement for
https://github.com/llvm/llvm-project/pull/140374.

RFC:https://discourse.llvm.org/t/rfc-add-fir-affine-optimization-fir-pass-pipeline/86190/6

---------

Co-authored-by: ZhiQiang Fan <zhiqiang.fan at terapines.com>


  Commit: 68870161e5d827d84f9cba30f741c31c4ff0be4f
      https://github.com/llvm/llvm-project/commit/68870161e5d827d84f9cba30f741c31c4ff0be4f
  Author: Paul Trojahn <paul.trojahn at gmail.com>
  Date:   2025-06-10 (Tue, 10 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll

  Log Message:
  -----------
  AMDGPU Mark permlane instructions as convergent (#142962)

Not sure if this is the right place to add this, but without explicitly
setting it as convergent, the permlanex16 instruction in the test sinks
into the second block.

Co-authored-by: Paul Trojahn <paul.trojahn at amd.com>


  Commit: 054646f335e8fbec1305c27af4d98227791ecf9f
      https://github.com/llvm/llvm-project/commit/054646f335e8fbec1305c27af4d98227791ecf9f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-06-10 (Tue, 10 Jun 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrInfo.cpp

  Log Message:
  -----------
  [X86] commuteInstructionImpl - assert that only MOVSDrr is being commuted to SHUFPDrri

Noticed while preparing for #142972


  Commit: e65d32316646e6203a3f4d4c9921edcddbb1c57d
      https://github.com/llvm/llvm-project/commit/e65d32316646e6203a3f4d4c9921edcddbb1c57d
  Author: David Rivera <davidriverg at gmail.com>
  Date:   2025-06-10 (Tue, 10 Jun 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
    M clang-tools-extra/docs/ReleaseNotes.rst
    M clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison.cpp

  Log Message:
  -----------
  [clang-tidy] Improve integer comparison by matching valid expressions outside implicitCastExpr (#134188)

Aims to fix #127471
Covered the edge case where an int expression is not necessarily
directly wrapped around an 'ImplicitCastExpr' which seemed to be a
requirement in 'use-integer-sign-comparison.cpp' check to trigger.

**For instance**:

```cpp
#include <vector>

bool f() {
  std::vector<int> v;
  unsigned int i = 0;

  return i >= v.size();
}
```


  Commit: 9312d5beb37208f30118ec7bc42737b1ecead086
      https://github.com/llvm/llvm-project/commit/9312d5beb37208f30118ec7bc42737b1ecead086
  Author: Brandon Wu <songwu0813 at gmail.com>
  Date:   2025-06-10 (Tue, 10 Jun 2025)

  Changed paths:
    M clang/include/clang/Basic/riscv_andes_vector.td
    M clang/include/clang/Basic/riscv_sifive_vector.td
    M clang/include/clang/Basic/riscv_vector.td
    M clang/include/clang/Basic/riscv_vector_common.td
    M clang/include/clang/Support/RISCVVIntrinsicUtils.h
    M clang/lib/Sema/SemaRISCV.cpp
    M clang/lib/Support/RISCVVIntrinsicUtils.cpp
    M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/zvfhmin-error.c
    M clang/test/Sema/rvv-required-features-invalid.c
    M clang/test/Sema/zvk-invalid-features.c
    M clang/test/Sema/zvk-invalid-zvknha.c
    M clang/test/Sema/zvk-target-attributes.c
    M clang/utils/TableGen/RISCVVEmitter.cpp

  Log Message:
  -----------
  [llvm][RISCV] Handle required features of intrinsic correctly (#143062)

Current approach generates intrinsic records when users specify
corresponding required features by using command line option.
However it's not able to handle features passed by using target
attributes correctly where each function might have different
features.
This patch resolves this by generating all of intrinsic records which
carry the required features in their function declaration using
attribute and check the required extensions in CheckBuiltinFunctionCall.

This should fix
[56592](https://github.com/llvm/llvm-project/issues/56592),
[134962](https://github.com/llvm/llvm-project/issues/134962) and
[121603](https://github.com/llvm/llvm-project/issues/121603)


  Commit: 80ea5f46df3e365a0a2112889bb91732167b6214
      https://github.com/llvm/llvm-project/commit/80ea5f46df3e365a0a2112889bb91732167b6214
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-06-10 (Tue, 10 Jun 2025)

  Changed paths:
    M .ci/compute_projects.py
    M .ci/compute_projects_test.py
    M .ci/monolithic-linux.sh
    M .github/workflows/premerge.yaml

  Log Message:
  -----------
  [CI] Migrate to runtimes build

This patch migrates the premerge pipeline to use LLVM_ENABLE_RUNTIMES to
build libc and compiler-rt.

Reviewers: DavidSpickett, tstellar, cmtice, lnihlen

Reviewed By: DavidSpickett

Pull Request: https://github.com/llvm/llvm-project/pull/142696


  Commit: edebe7cd0d739efce11132ba536faffd4fcd4120
      https://github.com/llvm/llvm-project/commit/edebe7cd0d739efce11132ba536faffd4fcd4120
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-06-10 (Tue, 10 Jun 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/modernize/UseIntegerSignComparisonCheck.cpp
    M clang-tools-extra/docs/ReleaseNotes.rst
    M clang-tools-extra/test/clang-tidy/checkers/modernize/use-integer-sign-comparison.cpp
    M clang/include/clang/Basic/riscv_andes_vector.td
    M clang/include/clang/Basic/riscv_sifive_vector.td
    M clang/include/clang/Basic/riscv_vector.td
    M clang/include/clang/Basic/riscv_vector_common.td
    M clang/include/clang/Support/RISCVVIntrinsicUtils.h
    M clang/lib/Sema/SemaRISCV.cpp
    M clang/lib/Support/RISCVVIntrinsicUtils.cpp
    M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/zvfhmin-error.c
    M clang/test/Sema/rvv-required-features-invalid.c
    M clang/test/Sema/zvk-invalid-features.c
    M clang/test/Sema/zvk-invalid-zvknha.c
    M clang/test/Sema/zvk-target-attributes.c
    M clang/utils/TableGen/RISCVVEmitter.cpp
    M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
    A flang/test/Fir/FirToSCF/if.fir
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6

[skip ci]


Compare: https://github.com/llvm/llvm-project/compare/1a30526afb7a...edebe7cd0d73

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