[all-commits] [llvm/llvm-project] 6f6dc9: [RISCV] Implement Feature Bits for B, E, H (#143436)
Sam Elliott via All-commits
all-commits at lists.llvm.org
Mon Jun 9 15:01:39 PDT 2025
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 6f6dc9c8ba8289e7dcdb16c33102cfd06608fa5c
https://github.com/llvm/llvm-project/commit/6f6dc9c8ba8289e7dcdb16c33102cfd06608fa5c
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-06-09 (Mon, 09 Jun 2025)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/riscv.c
M llvm/lib/Target/RISCV/RISCVFeatures.td
Log Message:
-----------
[RISCV] Implement Feature Bits for B, E, H (#143436)
As defined in riscv-non-isa/riscv-c-api-doc#109.
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