[all-commits] [llvm/llvm-project] c70c0a: [AArch64][InstCombine] Combine AES instructions wi...

[Ricardo Jesus via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c70c0a86a5b7b4c51d3be5ebbcc5cf291af4d843
      https://github.com/llvm/llvm-project/commit/c70c0a86a5b7b4c51d3be5ebbcc5cf291af4d843
  Author: Ricardo Jesus <rjj at nvidia.com>
  Date:   2025-06-09 (Mon, 09 Jun 2025)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/test/Transforms/InstCombine/AArch64/aes-intrinsics.ll

  Log Message:
  -----------
  [AArch64][InstCombine] Combine AES instructions with zero operands. (#142781)

We currently combine (AES (EOR (A, B)), 0) into (AES A, B) for Neon
intrinsics when the zero operand appears in the RHS of the AES
instruction.

This patch extends the combine to support AES SVE intrinsics and
the case where the zero operand appears in the LHS of the AES
instructions.



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