[all-commits] [llvm/llvm-project] fcc82c: [LoongArch] Precommit test case to show bug in Loo...

[Lu Weining via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fcc82cfa9394b2bd4380acdcf0e2854caee5a47a
      https://github.com/llvm/llvm-project/commit/fcc82cfa9394b2bd4380acdcf0e2854caee5a47a
  Author: Weining Lu <luweining at loongson.cn>
  Date:   2025-06-07 (Sat, 07 Jun 2025)

  Changed paths:
    A llvm/test/CodeGen/LoongArch/isel-optnone.ll

  Log Message:
  -----------
  [LoongArch] Precommit test case to show bug in LoongArchISelDagToDag

The optimization level should not be restored into O2.


  Commit: 90a52f4942961a5c32afc69d69470c6b7e5bcb8a
      https://github.com/llvm/llvm-project/commit/90a52f4942961a5c32afc69d69470c6b7e5bcb8a
  Author: Weining Lu <luweining at loongson.cn>
  Date:   2025-06-07 (Sat, 07 Jun 2025)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArch.h
    M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
    M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
    M llvm/test/CodeGen/LoongArch/O0-pipeline.ll
    M llvm/test/CodeGen/LoongArch/isel-optnone.ll
    M llvm/test/CodeGen/LoongArch/spill-ra-without-kill.ll

  Log Message:
  -----------
  [LoongArch] Pass OptLevel to LoongArchDAGToDAGISel correctly

Like many other targets did. And see RISCV for similar fix.

Fix https://github.com/llvm/llvm-project/issues/143239


Compare: https://github.com/llvm/llvm-project/compare/ca4dfca5c7b4...90a52f494296

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