[all-commits] [llvm/llvm-project] a23bd1: [RISCV] Remove artificial restriction on ShAmt fro...
Craig Topper via All-commits
all-commits at lists.llvm.org
Thu Jun 5 17:48:56 PDT 2025
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: a23bd179cce86c8635bc20b813ee84ebfeed8f5f
https://github.com/llvm/llvm-project/commit/a23bd179cce86c8635bc20b813ee84ebfeed8f5f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-06-05 (Thu, 05 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/and-shl.ll
Log Message:
-----------
[RISCV] Remove artificial restriction on ShAmt from (shl (and X, C2), C) -> (srli (slli X, C4), C4-C) isel. (#143010)
This code unnecessarily inherited a `ShAmt <= 32` check from an earlier
pattern.
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