[all-commits] [llvm/llvm-project] eca616: [RISCV] Fix schedule info for Zqvdotq (#142717)
Jim Lin via All-commits
all-commits at lists.llvm.org
Wed Jun 4 21:23:06 PDT 2025
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: eca616f376eccfeaccb01fcfc6c833e571b7f1e1
https://github.com/llvm/llvm-project/commit/eca616f376eccfeaccb01fcfc6c833e571b7f1e1
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-05 (Thu, 05 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZvqdotq.td
Log Message:
-----------
[RISCV] Fix schedule info for Zqvdotq (#142717)
The instructions in Zqvdotq is dot-product operation. So the schedule
info should be VIMulAdd rather than VIALU.
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