[all-commits] [llvm/llvm-project] afa517: [RISCV] Fold SRLIW+SLLI+ADD into SRLIW+SHXADD (#14...

[Piotr Fusik via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: afa517a3c2b21b366e60a6fd16b5f96e5e8a9f0c
      https://github.com/llvm/llvm-project/commit/afa517a3c2b21b366e60a6fd16b5f96e5e8a9f0c
  Author: Piotr Fusik <p.fusik at samsung.com>
  Date:   2025-06-04 (Wed, 04 Jun 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/test/CodeGen/RISCV/rv64zba.ll

  Log Message:
  -----------
  [RISCV] Fold SRLIW+SLLI+ADD into SRLIW+SHXADD (#142611)

This handles RV64 SRLIW, similarly to SRLI.

Also fixing the comments for SRLI combines that did not match the code.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications