[all-commits] [llvm/llvm-project] 1d4673: [X86] Use GFNI for LZCNT vXi8 ops (#141888)
Krzysztof Parzyszek via All-commits
all-commits at lists.llvm.org
Wed Jun 4 06:53:44 PDT 2025
Branch: refs/heads/users/kparzysz/spr/a04-atomic-one
Home: https://github.com/llvm/llvm-project
Commit: 1d467339449f75848a3257587df2e1592d0418b3
https://github.com/llvm/llvm-project/commit/1d467339449f75848a3257587df2e1592d0418b3
Author: 黃國庭 <we3223 at gmail.com>
Date: 2025-06-04 (Wed, 04 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/gfni-lzcnt.ll
Log Message:
-----------
[X86] Use GFNI for LZCNT vXi8 ops (#141888)
This PULL REQUEST implements vXi8 ctlz lowering for X86 using GFNI instructions
Fixes #140729
Commit: fef5096a8ac64c391a4d07dfbddb9f874b007e65
https://github.com/llvm/llvm-project/commit/fef5096a8ac64c391a4d07dfbddb9f874b007e65
Author: Carlos Alberto Enciso <Carlos.Enciso at sony.com>
Date: 2025-06-04 (Wed, 04 Jun 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
Log Message:
-----------
[llvm-debuginfo-analyzer][NFC] Move some functionality to LVReader. (#142740)
Hoist out from LVDWARFReader and LVBinaryReader some generic
code, so it can be available to other readers that do not share the
binary format.
Commit: b59c88835fd3f642b3c95331913e0565fb89a7b1
https://github.com/llvm/llvm-project/commit/b59c88835fd3f642b3c95331913e0565fb89a7b1
Author: David Truby <david.truby at arm.com>
Date: 2025-06-04 (Wed, 04 Jun 2025)
Changed paths:
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/predefined-macros-aarch64.f90
Log Message:
-----------
[flang] Add aarch64 processor defines (#142606)
This patch adds aarch64 specific processor defines when targeting
aarch64, similar to the ones for ppc64 and x86_64
Commit: c3746ff3229c57110f7895ff5b93e520cead0d1b
https://github.com/llvm/llvm-project/commit/c3746ff3229c57110f7895ff5b93e520cead0d1b
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-06-04 (Wed, 04 Jun 2025)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
A mlir/test/Conversion/MemRefToLLVM/memref-to-llvm-with-transforms.mlir
M mlir/test/lib/Conversion/CMakeLists.txt
A mlir/test/lib/Conversion/MemRefToLLVM/CMakeLists.txt
A mlir/test/lib/Conversion/MemRefToLLVM/TestMemRefToLLVMWithTransforms.cpp
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][Affine] Handle null parent op in getAffineParallelInductionVarOwner (#142025)
The issue occurs during a downstream pass which does dialect conversion,
where both
[`FuncOpConversion`](https://github.com/llvm/llvm-project/blob/cde67b6663f994fcb4ded28fd79b23a13d347c4a/mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp#L480)
and
[`SubviewFolder`](https://github.com/llvm/llvm-project/blob/cde67b6663f994fcb4ded28fd79b23a13d347c4a/mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp#L187)
are run together. The original starting IR is:
```mlir
module {
func.func @foo(%arg0: memref<100x100xf32>, %arg1: index, %arg2: index, %arg3: index, %arg4: index) -> memref<?x?xf32, strided<[100, 1], offset: ?>> {
%subview = memref.subview %arg0[%arg1, %arg2] [%arg3, %arg4] [1, 1] : memref<100x100xf32> to memref<?x?xf32, strided<[100, 1], offset: ?>>
return %subview : memref<?x?xf32, strided<[100, 1], offset: ?>>
}
}
```
After `FuncOpConversion` runs, the IR looks like:
```mlir
"builtin.module"() ({
"llvm.func"() <{CConv = #llvm.cconv<ccc>, function_type = !llvm.func<struct<(ptr, ptr, i64, array<2 x i64>, array<2 x i64>)> (ptr, ptr, i64, i64, i64, i64, i64, i64, i64, i64, i64)>, linkage = #llvm.linkage<external>, sym_name = "foo", visibility_ = 0 : i64}> ({
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: i64, %arg3: i64, %arg4: i64, %arg5: i64, %arg6: i64, %arg7: i64, %arg8: i64, %arg9: i64, %arg10: i64):
%0 = "memref.subview"(<<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>, <<UNKNOWN SSA VALUE>>) <{operandSegmentSizes = array<i32: 1, 2, 2, 0>, static_offsets = array<i64: -9223372036854775808, -9223372036854775808>, static_sizes = array<i64: -9223372036854775808, -9223372036854775808>, static_strides = array<i64: 1, 1>}> : (memref<100x100xf32>, index, index, index, index) -> memref<?x?xf32, strided<[100, 1], offset: ?>>
"func.return"(%0) : (memref<?x?xf32, strided<[100, 1], offset: ?>>) -> ()
}) : () -> ()
"func.func"() <{function_type = (memref<100x100xf32>, index, index, index, index) -> memref<?x?xf32, strided<[100, 1], offset: ?>>, sym_name = "foo"}> ({
}) : () -> ()
}) {llvm.data_layout = "", llvm.target_triple = ""} : () -> ()
```
The `<<UNKNOWN SSA VALUE>>`'s here are block arguments of a separate
unlinked block, which is disconnected from the rest of the IR (so not
only is the IR verifier-invalid, it can't even be parsed). This IR is
created by signature conversion in the dialect conversion infra.
Now `SubviewFolder` is applied, and the utility function here is called
on one of these disconnected block arguments, causing a crash.
The TestMemRefToLLVMWithTransforms pass is introduced to exercise the
bug, and it can be reused by other contributors in the future.
---------
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Co-authored-by: Rahul Kayaith <rkayaith at gmail.com>
Commit: 817af2ddf24bd6ef68d66d86904d0682dd5feda9
https://github.com/llvm/llvm-project/commit/817af2ddf24bd6ef68d66d86904d0682dd5feda9
Author: Callum Fare <callum at codeplay.com>
Date: 2025-06-04 (Wed, 04 Jun 2025)
Changed paths:
M offload/liboffload/API/CMakeLists.txt
Log Message:
-----------
[Offload] Fix missing dependencies in Offload API generation (#142776)
Thanks to @RossBrunton for spotting this.
We attempt to clang-format the generated Offload header files, but if
clang-format isn't available we just copy the generated files instead.
That fallback path was missing the correct dependencies.
Fixes #142756
Commit: b668b6439acb9057faadd788c9351a7d20bf140e
https://github.com/llvm/llvm-project/commit/b668b6439acb9057faadd788c9351a7d20bf140e
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-06-04 (Wed, 04 Jun 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
M llvm/test/CodeGen/AMDGPU/frem.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] legalize 16bit and 32bit use-def chain for moveToVALU in si-fix-sgpr-lowering (#138734)
Two changes in this patch:
1. Covered another case in legalizeOperandVALUt16 functions and the COPY
lowering, when SALU16 is used by SALU32, need to insert a reg_sequence
after moved to valu (previously only considered SALU32 used by SALU16
case)
2. Moved the useMI analysis into addUsersToMoveVALUList. Legalize the
targetted operand when needed.
Turn on frem test with true16 mode for gfx1150 which is failing before
this patch. A few bitcast tests also impacted by this change with some
v_mov being replaced to dual mov
Commit: 2636fd6af5805da1b45b57d54bbad1a7dd936139
https://github.com/llvm/llvm-project/commit/2636fd6af5805da1b45b57d54bbad1a7dd936139
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-06-04 (Wed, 04 Jun 2025)
Changed paths:
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/predefined-macros-aarch64.f90
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h
M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/X86/gfni-lzcnt.ll
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
A mlir/test/Conversion/MemRefToLLVM/memref-to-llvm-with-transforms.mlir
M mlir/test/lib/Conversion/CMakeLists.txt
A mlir/test/lib/Conversion/MemRefToLLVM/CMakeLists.txt
A mlir/test/lib/Conversion/MemRefToLLVM/TestMemRefToLLVMWithTransforms.cpp
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
M offload/liboffload/API/CMakeLists.txt
Log Message:
-----------
Merge branch 'main' into users/kparzysz/spr/a04-atomic-one
Compare: https://github.com/llvm/llvm-project/compare/b27c7cb1e806...2636fd6af580
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