[all-commits] [llvm/llvm-project] b668b6: [AMDGPU][True16][CodeGen] legalize 16bit and 32bit...

[Brox Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b668b6439acb9057faadd788c9351a7d20bf140e
      https://github.com/llvm/llvm-project/commit/b668b6439acb9057faadd788c9351a7d20bf140e
  Author: Brox Chen <guochen2 at amd.com>
  Date:   2025-06-04 (Wed, 04 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
    M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
    M llvm/test/CodeGen/AMDGPU/frem.ll

  Log Message:
  -----------
  [AMDGPU][True16][CodeGen] legalize 16bit and 32bit use-def chain for moveToVALU in si-fix-sgpr-lowering (#138734)

Two changes in this patch:
1. Covered another case in legalizeOperandVALUt16 functions and the COPY
lowering, when SALU16 is used by SALU32, need to insert a reg_sequence
after moved to valu (previously only considered SALU32 used by SALU16
case)
2. Moved the useMI analysis into addUsersToMoveVALUList. Legalize the
targetted operand when needed.

Turn on frem test with true16 mode for gfx1150 which is failing before
this patch. A few bitcast tests also impacted by this change with some
v_mov being replaced to dual mov



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