[all-commits] [llvm/llvm-project] 0d0215: [clang][AST] Reduce some AST node size. (#142585)

Tue Jun 3 14:49:07 PDT 2025

  Branch: refs/heads/users/vitalybuka/spr/promotemem2reg-optimize-memory-usage-in-promotemem2reg
  Home:   https://github.com/llvm/llvm-project
  Commit: 0d02150c3d7e8960ad0fe247baecfa76c7ce1129
      https://github.com/llvm/llvm-project/commit/0d02150c3d7e8960ad0fe247baecfa76c7ce1129
  Author: Haojian Wu <hokein.wu at gmail.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M clang/include/clang/AST/Expr.h
    M clang/include/clang/AST/ExprCXX.h
    M clang/include/clang/AST/Stmt.h
    M clang/include/clang/AST/StmtCXX.h
    M clang/lib/AST/Expr.cpp
    M clang/lib/AST/ExprCXX.cpp
    M clang/lib/Serialization/ASTReaderStmt.cpp
    M clang/lib/Serialization/ASTWriterStmt.cpp

  Log Message:
  -----------
  [clang][AST] Reduce some AST node size. (#142585)

This patch reduces the size of several AST nodes by moving some fields
into the free bitfield space in the base `Stmt` class:

* `CXXForRangeStmt`: 96 → 88 bytes
* `ChooseExpr`: 56 → 48 bytes
* `ArrayTypeTraitExpr`: 56 → 48 bytes
* `ExpressionTraitExpr`: 40 → 32 bytes
* `CXXFoldExpr`: 64 → 56 bytes
* `ShuffleExpr`: 40 → 32 bytes
* `PackIndexingExpr`: 48 → 40 bytes

There are no noticeable memory savings (`Expr/Stmt` memory usage
125,824,496 vs 125,826,336 bytes for `SemaExpr.cpp`) in my testing,
likely because these node types are not among the most common in typical
ASTs.

  Commit: 2863c640fa0d8ab183b0180becf948de7becb639
      https://github.com/llvm/llvm-project/commit/2863c640fa0d8ab183b0180becf948de7becb639
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV][NFC] Simplify ISD::SELECT Legality (#142650)

ISD::SELECT is legal by default, so this change to the conditional makes
it clearer that XTHeadCondMov and XMipsCMove both leave this operation
legal rather than custom expanding it.

  Commit: a144f58a7932a66139f6c570d353c0248d9073d4
      https://github.com/llvm/llvm-project/commit/a144f58a7932a66139f6c570d353c0248d9073d4
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll

  Log Message:
  -----------
  [RISCV] Expand test coverage for ri.vunzip2{a,b}

Cover cases that upcoming optimization changes will improve.

  Commit: 96336b233068a04b84915334af01eda3d571e301
      https://github.com/llvm/llvm-project/commit/96336b233068a04b84915334af01eda3d571e301
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
    M llvm/test/Transforms/AggressiveInstCombine/popcount.ll

  Log Message:
  -----------
  [AggressiveInstCombine] Improve popcount matching if the input has known zero bits (#142501)

If the input has known zero bits, InstCombine may have simplied one
of the expected And masks. Teach AggressiveInstCombine to use
MaskedValueIsZero to recover these missing bits.

Fixes #142042.

  Commit: d204aa9deb72b8dcaf5e5b5550871d0ebe982825
      https://github.com/llvm/llvm-project/commit/d204aa9deb72b8dcaf5e5b5550871d0ebe982825
  Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M lldb/scripts/framework-header-fix.sh
    A lldb/scripts/version-header-fix.py
    M lldb/source/API/CMakeLists.txt
    A lldb/test/Shell/Scripts/Inputs/lldb-defines.h
    A lldb/test/Shell/Scripts/TestVersionFixScript.test

  Log Message:
  -----------
  [lldb][headers] Create script to fix up versioning (#141116)

This commit creates a Python script that fixes up the versioning
information in lldb-defines.h. It also moves the build logic for fixing
up the lldb headers from being in the framework only to being in the
same location that we create the liblldb target.

  Commit: 3a51896ce80a58fe7fce869196317a497a29615a
      https://github.com/llvm/llvm-project/commit/3a51896ce80a58fe7fce869196317a497a29615a
  Author: David Green <david.green at arm.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/arm64-vqadd.ll
    M llvm/test/CodeGen/AArch64/arm64-vqsub.ll
    M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
    M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/usub_sat_vec.ll

  Log Message:
  -----------
  [AArch64] Add v1i64 addsat/subsat (#142342)

Add basic handling for v1i64 saddsat, ssubsat, uaddsat and usubsat. We
missed that these were not upgrading in #140454 due to a lack of test
coverage, and for some reason the generic v1i64 nodes were not being
treated as legal like they should.

Fixes #142323

  Commit: f4ca6d9f7115d3bcecdf25f73afc5516c97f9f58
      https://github.com/llvm/llvm-project/commit/f4ca6d9f7115d3bcecdf25f73afc5516c97f9f58
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-06-04 (Wed, 04 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    A llvm/test/CodeGen/AArch64/peephole-opt-analyzeCompare-subreg-use.mir

  Log Message:
  -----------
  AArch64: Skip analyzeCompare for subregister uses (#141654)

The API is broken and doesn't provide a way to report the used
subregister, so it's unsafe to use. This will produce illegal
folds if the subregister is silently dropped.

  Commit: 4bdcf5b51f9ea0fa30cfa2279d0943faf5446ecf
      https://github.com/llvm/llvm-project/commit/4bdcf5b51f9ea0fa30cfa2279d0943faf5446ecf
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-06-04 (Wed, 04 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h

  Log Message:
  -----------
  AArch64: Stop using StringSaver for runtime libcall names (#142544)

This redoes 43ba568daac098b286e1c1207deadd1f59d56cd7 to avoid
the statefulness.

  Commit: 18e94550e10eaec4302082cec24b02b3a9e97ea0
      https://github.com/llvm/llvm-project/commit/18e94550e10eaec4302082cec24b02b3a9e97ea0
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp

  Log Message:
  -----------
  ARM: Remove unused CondCode field from libcall table (#142616)

  Commit: 1340ecf0ba4b38bae9de9781da72b9a72abd3fbe
      https://github.com/llvm/llvm-project/commit/1340ecf0ba4b38bae9de9781da72b9a72abd3fbe
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    A llvm/test/Transforms/IndVarSimplify/add-nsw-zext-fold.ll
    A llvm/test/Transforms/LoopIdiom/add-nsw-zext-fold.ll

  Log Message:
  -----------
  [SCEV] Add more tests with zext(add C, %var)<nsw>.

Add extra test coverage for
https://github.com/llvm/llvm-project/pull/142599.

  Commit: f5a2f00da9b741f4f2fe925a434f608aa217cee2
      https://github.com/llvm/llvm-project/commit/f5a2f00da9b741f4f2fe925a434f608aa217cee2
  Author: Ian Wood <ianwood2024 at u.northwestern.edu>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M mlir/lib/Dialect/Utils/ReshapeOpsUtils.cpp
    M mlir/test/Dialect/Linalg/simplify-pack-unpack.mlir
    M mlir/test/Dialect/Tensor/canonicalize.mlir
    M mlir/unittests/Dialect/Utils/CMakeLists.txt
    R mlir/unittests/Dialect/Utils/ReshapeOpsUtilsTest.cpp

  Log Message:
  -----------
  Revert "[mlir][tensor] Loosen restrictions on folding dynamic reshapes" (#142639)

Reverts llvm/llvm-project#137963

---------

Signed-off-by: Ian Wood <ianwood2024 at u.northwestern.edu>

  Commit: f2adae57808996313dfec41a180454857ebd60d1
      https://github.com/llvm/llvm-project/commit/f2adae57808996313dfec41a180454857ebd60d1
  Author: Teresa Johnson <tejohnson at google.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/MemoryProfileInfo.h
    M llvm/lib/Analysis/MemoryProfileInfo.cpp
    M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
    M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
    A llvm/test/ThinLTO/X86/memprof-report-hinted-partial.ll
    A llvm/test/Transforms/PGOProfile/memprof_max_cold_threshold.test

  Log Message:
  -----------
  [MemProf] Optionally save context size info on largest cold allocations (#142507)

In order to allow selective reporting of context hinting during the LTO
link, and in the future to allow selective more aggressive cloning, add
an option to specify a minimum percent of the max cold size in the
profile summary. Contexts that meet that threshold will get context size
info metadata (and ThinLTO summary information) on the associated
allocations.

Specifying -memprof-report-hinted-sizes during the pre-LTO compile step
will continue to cause all contexts to receive this metadata. But
specifying -memprof-report-hinted-sizes only during the LTO link will
cause only those that meet the new threshold and have the metadata to
get reported.

To support this, because the alloc info summary and associated bitcode
requires the context size information to be in the same order as the
other context information, 0s are inserted for contexts without this
metadata. The bitcode writer uses a more compact format for the context
ids to allow better compression of the 0s.

As part of this change several helper methods are added to query whether
metadata contains context size info on any or all contexts.

  Commit: 0a3e9aa336d1926691e1353e7251ff0704c32a69
      https://github.com/llvm/llvm-project/commit/0a3e9aa336d1926691e1353e7251ff0704c32a69
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-06-04 (Wed, 04 Jun 2025)

  Changed paths:
    M llvm/lib/IR/RuntimeLibcalls.cpp
    A llvm/lib/IR/ZOSLibcallNames.def
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    R llvm/lib/Target/SystemZ/ZOSLibcallNames.def

  Log Message:
  -----------
  SystemZ: Move runtime libcall setting out of TargetLowering (#142622)

RuntimeLibcallInfo needs to be correct outside of codegen contexts.

  Commit: 857138b3bd4ab54cf509b32de2f4a94cde0685cb
      https://github.com/llvm/llvm-project/commit/857138b3bd4ab54cf509b32de2f4a94cde0685cb
  Author: Zequan Wu <zequanwu at google.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M llvm/test/tools/llvm-dwarfdump/X86/debug_info_addrx.s
    R llvm/test/tools/llvm-dwarfdump/X86/debug_info_crel.yaml

  Log Message:
  -----------
  [Test] Consolidate crel test coverage into existing file and remove redundant test. (#142644)

  Commit: ac4893dd77eeb67be830b0dac70ad28c4b4f0caf
      https://github.com/llvm/llvm-project/commit/ac4893dd77eeb67be830b0dac70ad28c4b4f0caf
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp

  Log Message:
  -----------
  [NFC][PromoteMem2Reg] Move IncomingVals, IncomingLocs, Worklist into class (#142468)

They are all DFS state related, as `Visited`. But `Visited` is already a
class member, so we make things more consistent and less
parameters to pass around.

By itself, the patch has little value, but it simplifies stuff in the
#142474.

For #142461

  Commit: 011ecc98bc889e8d80c32793e3ae1fc72ea6772e
      https://github.com/llvm/llvm-project/commit/011ecc98bc889e8d80c32793e3ae1fc72ea6772e
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M clang/include/clang/AST/Expr.h
    M clang/include/clang/AST/ExprCXX.h
    M clang/include/clang/AST/Stmt.h
    M clang/include/clang/AST/StmtCXX.h
    M clang/lib/AST/Expr.cpp
    M clang/lib/AST/ExprCXX.cpp
    M clang/lib/Serialization/ASTReaderStmt.cpp
    M clang/lib/Serialization/ASTWriterStmt.cpp
    M lldb/scripts/framework-header-fix.sh
    A lldb/scripts/version-header-fix.py
    M lldb/source/API/CMakeLists.txt
    A lldb/test/Shell/Scripts/Inputs/lldb-defines.h
    A lldb/test/Shell/Scripts/TestVersionFixScript.test
    M llvm/include/llvm/Analysis/MemoryProfileInfo.h
    M llvm/lib/Analysis/MemoryProfileInfo.cpp
    M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/IR/RuntimeLibcalls.cpp
    A llvm/lib/IR/ZOSLibcallNames.def
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    R llvm/lib/Target/SystemZ/ZOSLibcallNames.def
    M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
    M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
    M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
    M llvm/test/CodeGen/AArch64/arm64-vqadd.ll
    M llvm/test/CodeGen/AArch64/arm64-vqsub.ll
    A llvm/test/CodeGen/AArch64/peephole-opt-analyzeCompare-subreg-use.mir
    M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
    M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
    A llvm/test/ThinLTO/X86/memprof-report-hinted-partial.ll
    M llvm/test/Transforms/AggressiveInstCombine/popcount.ll
    A llvm/test/Transforms/IndVarSimplify/add-nsw-zext-fold.ll
    A llvm/test/Transforms/LoopIdiom/add-nsw-zext-fold.ll
    A llvm/test/Transforms/PGOProfile/memprof_max_cold_threshold.test
    M llvm/test/tools/llvm-dwarfdump/X86/debug_info_addrx.s
    R llvm/test/tools/llvm-dwarfdump/X86/debug_info_crel.yaml
    M mlir/lib/Dialect/Utils/ReshapeOpsUtils.cpp
    M mlir/test/Dialect/Linalg/simplify-pack-unpack.mlir
    M mlir/test/Dialect/Tensor/canonicalize.mlir
    M mlir/unittests/Dialect/Utils/CMakeLists.txt
    R mlir/unittests/Dialect/Utils/ReshapeOpsUtilsTest.cpp

  Log Message:
  -----------
  rebase

Created using spr 1.3.6

Compare: https://github.com/llvm/llvm-project/compare/e059bb686698...011ecc98bc88

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