[all-commits] [llvm/llvm-project] 8808a5: [NFC][clang] Move argument handling: Driver::Build...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Tue Jun 3 09:07:27 PDT 2025
Branch: refs/heads/users/vitalybuka/spr/main.nfcipromotemem2reg-dont-handle-the-first-successor-out-of-order
Home: https://github.com/llvm/llvm-project
Commit: 8808a543afd73e7c89d845d24161cec8aca46471
https://github.com/llvm/llvm-project/commit/8808a543afd73e7c89d845d24161cec8aca46471
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2025-06-02 (Mon, 02 Jun 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[NFC][clang] Move argument handling: Driver::BuildActions -> handleArguments (#142455)
This simply moves code for diagnosing misuse of arguments `/Fo`, `/Fa`,
and `/o` from `Driver::BuildActions` into `Driver::handleArguments`,
following the intention of 740f69b.
This change better aligns with the roles of `BuildActions` and
`handleArguments`.
Commit: f90cfb1350053418c004774968bad0b76c549e48
https://github.com/llvm/llvm-project/commit/f90cfb1350053418c004774968bad0b76c549e48
Author: Jim Lin <jim at andestech.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rv32xandesperf.ll
M llvm/test/CodeGen/RISCV/rv64xandesperf.ll
Log Message:
-----------
[RISCV] Select signed bitfield extracts for XAndesPerf (#142303)
The XAndesPerf extension includes signed bitfield extraction
instruction `NDS.BFOS`, which can extract the bits from LSB to MSB,
places them starting at bit 0, and sign-extends the result.
The testcase includes the two patterns that can be selected as
signed bitfield extracts: `ashr+shl` and `ashr+sext_inreg`
Commit: 559a9db5f5d06a6ebd62ef5bc66aa92b66840f2b
https://github.com/llvm/llvm-project/commit/559a9db5f5d06a6ebd62ef5bc66aa92b66840f2b
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
A llvm/test/CodeGen/LoongArch/calling-conv-half.ll
M llvm/test/CodeGen/LoongArch/fp16-promote.ll
A llvm/test/CodeGen/LoongArch/issue97975.ll
A llvm/test/CodeGen/LoongArch/issue97981.ll
Log Message:
-----------
[LoongArch] Custom lower FP_TO_FP16 and FP16_TO_FP to correct ABI of libcall (#141702)
This change passes 'half' in the lower 16 bits of an f32 value with F/D
ABI. LoongArch currently lacks a hardware extension for the fp16 data
type, and the ABI manual now documents the half-precision floating-point
type following FP calling conventions.
Previously, we maintained the 'half' type in its 16-bit format between
operations. Regardless of whether the F extension is enabled, the value
would be passed in the lower 16 bits of a GPR in its 'half' format.
With this patch, depending on the ABI in use, the value will be passed
either in an FPR or a GPR in 'half' format. This ensures consistency
with the bits location when the fp16 hardware extension is enabled.
Co-authored-by: WANG Rui <wangrui at loongson.cn>
Commit: 8c65f68330c77c27aae2ff58e883802760891cbb
https://github.com/llvm/llvm-project/commit/8c65f68330c77c27aae2ff58e883802760891cbb
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/CodeGen/Targets/LoongArch.cpp
A clang/test/CodeGen/LoongArch/__fp16-convert.c
M clang/test/CodeGen/LoongArch/abi-lp64d.c
Log Message:
-----------
[clang][LoongArch] Add support for the _Float16 type (#141703)
Enable _Float16 for LoongArch target. Additionally, this change fixes
incorrect ABI lowering of _Float16 in the case of structs containing
fp16 that are eligible for passing via GPR+FPR or FPR+FPR. Finally, it
also fixes int16 -> __fp16 conversion code gen, which uses generic LLVM
IR rather than llvm.convert.to.fp16 intrinsics.
Commit: d77c995f14634b98de4767afc296dc941b1a8cd0
https://github.com/llvm/llvm-project/commit/d77c995f14634b98de4767afc296dc941b1a8cd0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-02 (Mon, 02 Jun 2025)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
Log Message:
-----------
[DebugInfo] Avoid creating a temporary instance of std::string (NFC) (#142523)
lookupTarget accepts StringRef. We don't need to create a temporary
instance of std::string only to be converted back to StringRef.
Commit: 18f1b73b7257a8e3f649384a0701d855c4e79f8a
https://github.com/llvm/llvm-project/commit/18f1b73b7257a8e3f649384a0701d855c4e79f8a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-02 (Mon, 02 Jun 2025)
Changed paths:
M llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
Log Message:
-----------
[llvm-cfi-verify] Avoid creating temporary instances of std::string (NFC) (#142524)
symbolizeInlinedCode and symbolizeCode take StringRef as the first
parameter. We don't need to create temporary instances of std::string
only to be converted back to StringRef.
Commit: 106c8978bd232fc044e764507e11e57b7a791126
https://github.com/llvm/llvm-project/commit/106c8978bd232fc044e764507e11e57b7a791126
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-02 (Mon, 02 Jun 2025)
Changed paths:
M clang/lib/Index/CommentToXML.cpp
M clang/lib/Index/FileIndexRecord.cpp
M clang/lib/Index/IndexingAction.cpp
M clang/lib/Index/USRGeneration.cpp
Log Message:
-----------
[Index] Remove unused includes (NFC) (#142525)
These are identified by misc-include-cleaner. I've filtered out those
that break builds. Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
Commit: 972ecc31f72e16ae4a9337ce6bc85059404eaf4f
https://github.com/llvm/llvm-project/commit/972ecc31f72e16ae4a9337ce6bc85059404eaf4f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-06-02 (Mon, 02 Jun 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
Log Message:
-----------
[LoongArch] Fix a warning
This patch fixes:
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp:5354:7: error:
unused variable 'VT' [-Werror,-Wunused-variable]
Commit: c6c2b81e90e43d125d36c1d3ebddb5a713a11df7
https://github.com/llvm/llvm-project/commit/c6c2b81e90e43d125d36c1d3ebddb5a713a11df7
Author: Dudeldu <mustermann.informatik at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
A llvm/test/CodeGen/AArch64/fuse-addr-mode.mir
Log Message:
-----------
[AArch64] Fix invalid address-mode folding (#142167)
In some cases, we are too aggressive when folding an add-lsl into an
ldr/str due to an accidental truncation of the 64-bit scale to 32-bit.
In cases where we shift by more than 31 bits (which is valid for 64-bit
registers) we just drop the shift...
Commit: 09967917e72a3c8f02138cc0906644c0db719fbc
https://github.com/llvm/llvm-project/commit/09967917e72a3c8f02138cc0906644c0db719fbc
Author: mikael-nilsson-arm <33650793+mikael-nilsson-arm at users.noreply.github.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
Log Message:
-----------
[CodeGenPrepare] Fix signed overflow (#141487)
The signed addition could overflow which is undefined behavior, now the
code checks for it.
Commit: 56acb06bc6a1bbde6b1f1a3aa3633d049f1821dc
https://github.com/llvm/llvm-project/commit/56acb06bc6a1bbde6b1f1a3aa3633d049f1821dc
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/BasicBlockPathCloning.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
M llvm/lib/Target/ARM/ARMBranchTargets.cpp
A llvm/test/CodeGen/AArch64/callbr-asm-label-bti.ll
M llvm/test/CodeGen/AArch64/callbr-asm-label.ll
M llvm/test/CodeGen/AArch64/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/PowerPC/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll
M llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
M llvm/test/CodeGen/X86/basic-block-sections-cloning-invalid.ll
M llvm/test/CodeGen/X86/callbr-asm-blockplacement.ll
M llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
M llvm/test/CodeGen/X86/callbr-asm-destinations.ll
M llvm/test/CodeGen/X86/callbr-asm-label-addr.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs-pred-succ.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs.ll
M llvm/test/CodeGen/X86/callbr-asm-phi-placement.ll
M llvm/test/CodeGen/X86/callbr-asm-sink.ll
M llvm/test/CodeGen/X86/callbr-asm.ll
M llvm/test/CodeGen/X86/shrinkwrap-callbr.ll
M llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
Log Message:
-----------
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
In 'asm goto' statements ('callbr' in LLVM IR), you can specify one or
more labels / basic blocks in the containing function which the assembly
code might jump to. If you're also compiling with branch target
enforcement via BTI, then previously listing a basic block as a possible
jump destination of an asm goto would cause a BTI instruction to be
placed at the start of the block, in case the assembly code used an
_indirect_ branch instruction (i.e. to a destination address read from a
register) to jump to that location. Now it doesn't do that any more:
branches to destination labels from the assembly code are assumed to be
direct branches (to a relative offset encoded in the instruction), which
don't require a BTI at their destination.
This change was proposed in https://discourse.llvm.org/t/85845 and there
seemed to be no disagreement. The rationale is:
1. it brings clang's handling of asm goto in Arm and AArch64 in line
with gcc's, which didn't generate BTIs at the target labels in the first
place.
2. it improves performance in the Linux kernel, which uses a lot of 'asm
goto' in which the assembly language just contains a NOP, and the
label's address is saved elsewhere to let the kernel self-modify at run
time to swap between the original NOP and a direct branch to the label.
This allows hot code paths to be instrumented for debugging, at only the
cost of a NOP when the instrumentation is turned off, instead of the
larger cost of an indirect branch. In this situation a BTI is
unnecessary (if the branch happens it's direct), and since the code
paths are hot, also a noticeable performance hit.
Implementation:
`SelectionDAGBuilder::visitCallBr` is the place where 'asm goto' target
labels are handled. It calls `setIsInlineAsmBrIndirectTarget()` on each
target `MachineBasicBlock`. Previously it also called
`setMachineBlockAddressTaken()`, which made `hasAddressTaken()` return
true, which caused a BTI to be added in the Arm backends.
Now `visitCallBr` doesn't call `setMachineBlockAddressTaken()` any more
on asm goto targets, but `hasAddressTaken()` also checks the flag set by
`setIsInlineAsmBrIndirectTarget()`. So call sites that were using
`hasAddressTaken()` don't need to be modified. But the Arm backends
don't call `hasAddressTaken()` any more: instead they test two more
specific query functions that cover all the reasons `hasAddressTaken()`
might have returned true _except_ being an asm goto target.
Testing:
The new test `AArch64/callbr-asm-label-bti.ll` is testing the actual
change, where it expects not to see a `bti` instruction after
`[[LABEL]]`. The rest of the test changes are all churn, due to the
flags on basic blocks changing. Actual output code hasn't changed in any
of the existing tests, only comments and diagnostics.
Further work:
`RISCVIndirectBranchTracking.cpp` and `X86IndirectBranchTracking.cpp`
also call `hasAddressTaken()` in a way that might benefit from using the
same more specific check I've put in `ARMBranchTargets.cpp` and
`AArch64BranchTargets.cpp`. But I'm not sure of that, so in this commit
I've only changed the Arm backends, and left those alone.
Commit: 06f779b69d8294b296ee9dd14b82f0e2fe59899f
https://github.com/llvm/llvm-project/commit/06f779b69d8294b296ee9dd14b82f0e2fe59899f
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/CodeGen/LoongArch/targetattr.c
A clang/test/Sema/attr-target-loongarch.c
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
Log Message:
-----------
Reland "[Clang][LoongArch] Support target attribute for function" (#142546)
This relands #140700. I have updated the test case('targetattr.c') to
resolve the test failure.
Original PR resulted in test fail:
https://lab.llvm.org/buildbot/#/builders/11/builds/16173
https://lab.llvm.org/buildbot/#/builders/202/builds/1531
Original description:
Followup to #140700.
Commit: 6206d7d3e1979e7f3e66538614f9f44413a16905
https://github.com/llvm/llvm-project/commit/6206d7d3e1979e7f3e66538614f9f44413a16905
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConstantPoolLoads - correctly merge constant pool loads by pointer and chain (#139575)
We were merging with a larger constant pool load if it didn't have any
chain dependencies (and implicitly assuming all uses were on the vector
value), instead we should flip this, explicitly check for uses of the
vector value and merge the memory chain dependencies with
makeEquivalentMemoryOrdering.
As these are constant pool loads we shouldn't expect any changes here,
but we should be consistent with how we merge/reuse loads - an upcoming
patch for other loads will do the same as we will see changes there.
Commit: 347273db2f33938e8f35de7b6c384d042b890052
https://github.com/llvm/llvm-project/commit/347273db2f33938e8f35de7b6c384d042b890052
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
A clang/test/DebugInfo/KeyInstructions/coerced-packed.c
A clang/test/DebugInfo/KeyInstructions/coerced-ptr.c
A clang/test/DebugInfo/KeyInstructions/coerced-through-memory.c
A clang/test/DebugInfo/KeyInstructions/coerced.c
Log Message:
-----------
[KeyInstr][Clang] Coerced store atoms (#134653)
[KeyInstr][Clang] Coerced store atoms
This patch is part of a stack that teaches Clang to generate Key Instructions
metadata for C and C++.
RFC:
https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
The feature is only functional in LLVM if LLVM is built with CMake flag
LLVM_EXPERIMENTAL_KEY_INSTRUCTIONs. Eventually that flag will be removed.
Commit: b4ded99a4a34d736537a98be6a1873944b8ffe82
https://github.com/llvm/llvm-project/commit/b4ded99a4a34d736537a98be6a1873944b8ffe82
Author: Michele Scuttari <michele.scuttari at outlook.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M mlir/include/mlir/IR/SymbolTable.h
Log Message:
-----------
[MLIR] Make SymbolTableCollection methods virtual (#141760)
The `LockedSymbolTable` class not only encapsulate a `SymbolTableCollection`, but also extends it. However, the methods of `SymbolTableCollection` are not marked as `virtual`, and therefore methods receiving a `SymbolTableCollection` would always call the base methods even if the object was a subclass. The proposed changes consist in marking the base methods as `virtual`.
Commit: b107dbb46769ace9ee6b2bf116e8168fc4fb56eb
https://github.com/llvm/llvm-project/commit/b107dbb46769ace9ee6b2bf116e8168fc4fb56eb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/vector-interleave.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] Reuse X86ISD::SUBV_BROADCAST_LOAD for subvector loads across chains (#142381)
Improve handling of folding a (small) vector load that is also loaded as a X86ISD::SUBV_BROADCAST_LOAD node to just (freely) extract the bottom subvector - similar to #139575 we should be checking the SUBV_BROADCAST_LOAD has uses of the loaded value, and not that the out chain isn't empty to ensure its actually used, we must also call makeEquivalentMemoryOrdering to ensure the out chains are correctly merged to handle any aliasing with later load/stores.
This PR is a little messy as it has 2 other inter-dependent changes to avoid regressions - now that we're properly merging subvector loads, we can drop the oneuse limit on the "vperm2x128(load(p),undef) -> broadcast128(p+offset)" and "insert_subvector(load256(p),load128(p),0) -> broadcast128(p)" folds.
Commit: 9a15e3e3e25df03720990ca7acb4edca6e299afd
https://github.com/llvm/llvm-project/commit/9a15e3e3e25df03720990ca7acb4edca6e299afd
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/utils/release/bump-version.py
Log Message:
-----------
[llvm][utils] Correct misleading comment in bump-version.py
It's using packaging not distutils.
Relates to https://github.com/llvm/llvm-project/issues/54337#issuecomment-2932029662
Commit: 2eab83f6187c82c56535a77a44f1fc1cac860686
https://github.com/llvm/llvm-project/commit/2eab83f6187c82c56535a77a44f1fc1cac860686
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Remove CanonicalIV when dissolving loop regions (NFC). (#142372)
Directly replace the canonical IV when we dissolve the containing
region. That ensures that it won't get removed before the region gets
removed, which would result in an invalid region.
This removes the current ordering constraint between
convertToConcreteRecipes and dissolving regions.
PR: https://github.com/llvm/llvm-project/pull/142372
Commit: d4df0745203ea78a2c863095995213e63cbc5e01
https://github.com/llvm/llvm-project/commit/d4df0745203ea78a2c863095995213e63cbc5e01
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
Log Message:
-----------
[AArch64][SME] Store SME attributes in AArch64FunctionInfo (NFC) (#142362)
The SMEAttrs class is tiny (simply a wrapper around a bitmask).
Constructing SMEAttrs from a llvm::Function is relatively expensive (as
we have to redo the checks for every SME attribute). So let's just
construct the SMEAttrs as part of the AArch64FunctionInfo and reuse the
parsed attributes where possible.
Commit: e1276ece7080e284dba6acf45d0702f614fa72f5
https://github.com/llvm/llvm-project/commit/e1276ece7080e284dba6acf45d0702f614fa72f5
Author: David Green <david.green at arm.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-neon-v8.1a.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage for arm64-neon-v8.1a.ll. NFC
Commit: 130080fab11cde5efcb338b77f5c3b31097df6e6
https://github.com/llvm/llvm-project/commit/130080fab11cde5efcb338b77f5c3b31097df6e6
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-no-agprs-violations.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-elf.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
A llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-large.ll
A llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-leaf.ll
A llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-use-inactive.ll
A llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
M llvm/test/CodeGen/AMDGPU/multi-call-resource-usage-mcexpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/register-count-comments.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/unnamed-function-resource-info.ll
M llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
A llvm/test/CodeGen/AMDGPU/vgpr-count-compute.ll
A llvm/test/CodeGen/AMDGPU/vgpr-count-graphics.ll
Log Message:
-----------
[AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (#133242)
Don't count register uses when determining the maximum number of
registers used by a function. Count only the defs. This is really an
underestimate of the true register usage, but in practice that's not
a problem because if a function uses a register, then it has either
defined it earlier, or some other function that executed before has
defined it.
In particular, the register counts are used:
1. When launching an entry function - in which case we're safe because
the register counts of the entry function will include the register
counts of all callees.
2. At function boundaries in dynamic VGPR mode. In this case it's safe
because whenever we set the new VGPR allocation we take into account
the outgoing_vgpr_count set by the middle-end.
The main advantage of doing this is that the artificial VGPR arguments
used only for preserving the inactive lanes when using the
llvm.amdgcn.init.whole.wave intrinsic are no longer counted. This
enables us to allocate only the registers we need in dynamic VGPR mode.
---------
Co-authored-by: Thomas Symalla <5754458+tsymalla at users.noreply.github.com>
Commit: be9334a68eaa2605e127ffa0d3b2dc13ff1d7af4
https://github.com/llvm/llvm-project/commit/be9334a68eaa2605e127ffa0d3b2dc13ff1d7af4
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmNeon/CMakeLists.txt
A mlir/include/mlir/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.h
A mlir/include/mlir/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.td
A mlir/include/mlir/Dialect/ArmNeon/TransformOps/CMakeLists.txt
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Dialect/ArmNeon/CMakeLists.txt
A mlir/lib/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.cpp
A mlir/lib/Dialect/ArmNeon/TransformOps/CMakeLists.txt
M mlir/test/Dialect/ArmNeon/lower-to-arm-neon.mlir
R mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
R mlir/test/lib/Dialect/ArmNeon/TestLowerToArmNeon.cpp
M mlir/test/lib/Dialect/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[MLIR] Add `apply_patterns.arm_neon.vector_contract_to_i8mm` TD Op (#140251)
This patch wraps `populateLowerContractionToSMMLAPatternPatterns` into a
new TD Op `apply_patterns.arm_neon.vector_contract_to_i8mm` .
It also removes the "test-lower-to-arm-neon" pass.
Commit: 3374263a08d17263195df4e39d513d624fc06e5e
https://github.com/llvm/llvm-project/commit/3374263a08d17263195df4e39d513d624fc06e5e
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M flang/test/Lower/namelist.f90
Log Message:
-----------
[flang] Harden testcase by changing variable name. (#142363)
I noticed that this testcase was failing in a CI build because it has a
`CHECK-NOT: bbb` while `bbb` could appear in the hashed global variable
name. Improved the test by changing this name to `ggg` which can't
appear in a hex string.
Commit: 9289604cf6690faa31527055ea6238c0bbf9453a
https://github.com/llvm/llvm-project/commit/9289604cf6690faa31527055ea6238c0bbf9453a
Author: Michele Scuttari <michele.scuttari at outlook.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
Log Message:
-----------
[MLIR] Use cached symbol tables in `getFuncOpsOrderedByCalls` (#141967)
Address TODO regarding the recomputation of symbol tables. The signature of the `getFuncOpsOrderedByCalls` function is modified to receive the collection of cached symbol tables.
Commit: 75ec944e38eedfc9357171697bceabe98dd9fadb
https://github.com/llvm/llvm-project/commit/75ec944e38eedfc9357171697bceabe98dd9fadb
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M lldb/test/Shell/Commands/command-image-dump-ast.test
Log Message:
-----------
[lldb][test] Disable image dump ast test on Windows
Again I think this requires DWARF. In theory we could use the PDB
file but I suspect that PDB file is in fact empty, because we
tell clang to produce DWARF.
So on Windows, first thing is we cannot run the expressions:
(lldb) expr A(); A1(); BA1(); AB();
error: <user expression 1>:1:1: 'A' has unknown return type; cast the call to its declared return type
1 | A(); A1(); BA1(); AB();
| ^~~
...and so on...
And then the AST is all unknown functions:
(lldb) image dump ast
Dumping clang ast for 4 modules.
TranslationUnitDecl 0x2b3bb591870 <<invalid sloc>> <invalid sloc> <undeserialized declarations>
|-FunctionDecl 0x2b3bb592970 <<invalid sloc>> <invalid sloc> mainCRTStartup 'unsigned long (void *)'
| `-ParmVarDecl 0x2b3bb592a20 <<invalid sloc>> <invalid sloc> 'void *'
`-FunctionDecl 0x2b3bb592ad8 <<invalid sloc>> <invalid sloc> __scrt_common_main_seh 'int ()' static
So I'm just going to disable this test on Windows, it's pretty
clear why it doesn't work and we have no plans to make it work.
Commit: 95ea4366dbaceed6b593dd0093fef8a8376d8755
https://github.com/llvm/llvm-project/commit/95ea4366dbaceed6b593dd0093fef8a8376d8755
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/docs/UsersManual.rst
Log Message:
-----------
[clang][docs] Add docs for CCC_OVERRIDE_OPTIONS. (#142396)
As was noted in
https://github.com/llvm/llvm-project/pull/140556#discussion_r2118160690,
there is no documentation for `CCC_OVERRIDE_OPTIONS`. This adds the
missing documentation. The information is duplicate of what we have for
`FCC_OVERRIDE_OPTIONS` in flang. Once this goes in and available at
https://clang.llvm.org/docs/UsersManual.html then the flang
documentation can be changed to refer to it.
Commit: 3108cbdfe94ab9ad38c745f1e78aea56fdf9d291
https://github.com/llvm/llvm-project/commit/3108cbdfe94ab9ad38c745f1e78aea56fdf9d291
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Log Message:
-----------
[RISCV][NFC] Simplify the creation of Scheduler (#142553)
If `createMachineScheduler`/`createPostMachineScheduler` return a
`nullptr`, then we will call `createSchedLive`/`createSchedPostRA`
anyway.
We can always create the Scheduler first and simplify the following
conditions.
Commit: 75c3ff8c0b29f374d31ba99e51852f7f6851a6c8
https://github.com/llvm/llvm-project/commit/75c3ff8c0b29f374d31ba99e51852f7f6851a6c8
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
R compiler-rt/lib/builtins/aarch64/sme-libc-mem-routines.S
A compiler-rt/lib/builtins/aarch64/sme-libc-memcpy-memmove.c
A compiler-rt/lib/builtins/aarch64/sme-libc-memset-memchr.c
A compiler-rt/lib/builtins/aarch64/sme-libc-opt-memcpy-memmove.S
A compiler-rt/lib/builtins/aarch64/sme-libc-opt-memset-memchr.S
R compiler-rt/lib/builtins/aarch64/sme-libc-routines.c
Log Message:
-----------
[compiler-rt][AArch64] Provide basic implementations of SME memcpy/memmove in case of strictly aligned memory access (#138250)
The existing implementations, written in assembly, make use of unaligned
accesses for performance reasons. They are not compatible with strict
aligned configurations, i.e. with `-mno-unaligned-access`.
If the functions are used in this scenario, an exception is raised due
to unaligned memory accesses.
This patch reintroduces vanilla implementations for these functions to
be used in strictly aligned configurations. The actual code is largely
based on the code from https://github.com/llvm/llvm-project/pull/77496
Commit: 0838bd60b4c2fedc31b9cba218847781cd4dca50
https://github.com/llvm/llvm-project/commit/0838bd60b4c2fedc31b9cba218847781cd4dca50
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[DenseMap] Fix MSVC buildbot failure in lookup_or (#142268)
4bf67cd ([DenseMap] Fix constness issues with lookup_or) introduced a
buildbot failure:
https://lab.llvm.org/buildbot/#/builders/63/builds/6559
The patch deviates from the spec and MSVC complains, where it doesn't
bind an lvalue to an rvalue reference. Fix it by qualifying the argument
of lookup_or with remove_cv_t.
Proof: https://godbolt.org/z/sjTvGMbce
Commit: ba57ff66a38fee139e762f7dd2d3e3b17eebf022
https://github.com/llvm/llvm-project/commit/ba57ff66a38fee139e762f7dd2d3e3b17eebf022
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
Log Message:
-----------
[LAA] Improve code in findForkedSCEVs (NFC) (#140384)
Commit: 742e84dc5de1c084a51a15f42bdc149302166a84
https://github.com/llvm/llvm-project/commit/742e84dc5de1c084a51a15f42bdc149302166a84
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Log Message:
-----------
SelectionDAG: Use unique_ptr for SwiftErrorValueTracking (#142532)
Commit: 6565e07a17785044797f446258c256b3cec7abff
https://github.com/llvm/llvm-project/commit/6565e07a17785044797f446258c256b3cec7abff
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Port ArmNeon after #140251 (#142569)
Commit be9334a68eaa2605e127ffa0d3b2dc13ff1d7af4
Commit: fa36822bfb14d0bc982d41e634af829d15b13764
https://github.com/llvm/llvm-project/commit/fa36822bfb14d0bc982d41e634af829d15b13764
Author: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/modernize/deprecated-headers.rst
Log Message:
-----------
NFC: fix typo in tidy modernize-deprecated-headers docs
Commit: 16c13e5f7c8d574d796b3196548edc58b942b52b
https://github.com/llvm/llvm-project/commit/16c13e5f7c8d574d796b3196548edc58b942b52b
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaCXX/libstdcxx_common_type_hack.cpp
M clang/test/SemaCXX/libstdcxx_explicit_init_list_hack.cpp
M clang/test/SemaCXX/libstdcxx_pair_swap_hack.cpp
Log Message:
-----------
Revert "[Clang] Improve infrastructure for libstdc++ workarounds" (#142432)
Reverts llvm/llvm-project#141977
This causes CI failure that I am unable to reproduce.
https://lab.llvm.org/buildbot/#/builders/168/builds/12688
Commit: 7547ff5cad3d4eb14a13abf36d7230fea7b775a6
https://github.com/llvm/llvm-project/commit/7547ff5cad3d4eb14a13abf36d7230fea7b775a6
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/CodeGen/X86/fminimum-fmaximum-i686.ll
M llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
M llvm/test/CodeGen/X86/fp128-libcalls.ll
Log Message:
-----------
[X86] Consistently use f128 libcalls (#142386)
On x86, the `*l` libcalls are for 80-bit extended precision. `fp128`
needs to use the `*f128` libcalls instead.
Add a few missing ones, esp. for FP min/max.
Also use the `f128` libcalls on x86-32. I believe the situation there is
the same as on x86-64.
Commit: 020ab696bd3938a508f4e704f3616e4438638086
https://github.com/llvm/llvm-project/commit/020ab696bd3938a508f4e704f3616e4438638086
Author: Pawan Nirpal <pawan.anil.nirpal at intel.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86InstrFragments.td
Log Message:
-----------
[X86][NFC] Remove fild/fist c++ predicates from PatFrag (#142562)
Drop the c++ predicates and use MemoryVT for memory size check for FILD
and FIST.
Commit: 038dc2c63b2db744be6afeea74b18be4938149e9
https://github.com/llvm/llvm-project/commit/038dc2c63b2db744be6afeea74b18be4938149e9
Author: Weibo He <NewSigma at 163.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
Log Message:
-----------
[CoroSplit] Always erase lifetime intrinsics for spilled allocas (#142551)
If the control flow between `lifetime.start` and `lifetime.end` is too
complex, it is acceptable to give up the optimization opportunity and
collect the alloca to the frame. However, storing to the frame will
lengthen the lifetime of the alloca, and the sanitizer will complain. I
propose we always erase lifetime intrinsics of spilled allocas.
Fix #124612
---------
Co-authored-by: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Commit: ddfeecf4c588d525bad3a7e19601d714fd708363
https://github.com/llvm/llvm-project/commit/ddfeecf4c588d525bad3a7e19601d714fd708363
Author: Luke Lau <luke at igalia.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Convert to concrete recipes before dissolving loop regions. NFCI (#141999)
After updating #118638 on tip of tree, expanding
VPWidenIntOrFpInductionRecipes fails because it needs the loop region to
get the latch to insert the increment into:
VPBasicBlock *ExitingBB =
Plan->getVectorLoopRegion()->getExitingBasicBlock();
Builder.setInsertPoint(ExitingBB,
ExitingBB->getTerminator()->getIterator());
auto *Next = Builder.createNaryOp(AddOp, {Prev, Inc}, Flags,
WidenIVR->getDebugLoc(), "vec.ind.next");
However after #117506, the region is dissolved so it doesn't work.
This shuffles the dissolveLoopRegions steps to be after
convertToConcreteRecipes so we can use the region when expanding
VPWidenIntOrFpInductionRecipes
Commit: 9a2d4d176ad290eb556f27a990880acad99cc163
https://github.com/llvm/llvm-project/commit/9a2d4d176ad290eb556f27a990880acad99cc163
Author: Luke Lau <luke at igalia.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
Log Message:
-----------
[SelectionDAG][AArch64] Legalize power of 2 vector.[de]interleaveN (#141513)
After https://github.com/llvm/llvm-project/pull/139893, we now have
[de]interleave intrinsics for factors 2-8 inclusive, with the plan to
eventually get the loop vectorizer to emit a single intrinsic for these
factors instead of recursively deinterleaving (to support scalable
non-power-of-2 factors and to remove the complexity in the interleaved
access pass).
AArch64 currently supports scalable interleaved groups of factors 2 and
4 from the loop vectorizer. For factor 4 this is currently emitted as a
series of recursive [de]interleaves, and normally converted to a target
intrinsic in the interleaved access pass.
However if for some reason the interleaved access pass doesn't catch it,
the [de]interleave4 intrinsic will need to be lowered by the backend.
This patch legalizes the node and any other power-of-2 factor to smaller
factors, so if a target can lower [de]interleave2 it should be able to
handle this without crashing.
Factor 3 will probably be more complicated to lower so I've left it out
for now. We can disable it in the AArch64 cost model when implementing
the loop vectorizer changes.
Commit: 9c52b177ea27778e904908c974e8113ed637dd69
https://github.com/llvm/llvm-project/commit/9c52b177ea27778e904908c974e8113ed637dd69
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
A lldb/test/Shell/Expr/TestClangModulesDeclLookup.test
Log Message:
-----------
[lldb][test] Add test for looking up decls in Clang modules for C++
Adds coverage for the code-path where
`ClangExpressionDeclMap::FindExternalVisibleDecls` finds a decl inside
of a Clang module (without explicitly having to import the module on the
LLDB CLI). AFAICT, we had not tests for this.
`LookupFunction` will try to find a `FunctionDecl` in debug-info. But if
no debug-info exists, it will ask the `ClangModulesDeclVendor` to search
for the function with the specified name in any of the Clang modules
that got added to it in `SetupDeclVendor`.
Commit: 878badc44d2e16d0439e435b1e00bf3a3d51d683
https://github.com/llvm/llvm-project/commit/878badc44d2e16d0439e435b1e00bf3a3d51d683
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M mlir/test/Dialect/ArmNeon/lower-to-arm-neon.mlir
Log Message:
-----------
[MLIR][AArch64] Add an extra test for Neon I8MM (NFC) (#135777)
Commit: 4949a791da64a1fb07445d65f59b146e34a1bd14
https://github.com/llvm/llvm-project/commit/4949a791da64a1fb07445d65f59b146e34a1bd14
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
X86: Start moving setLibcallName calls out of TargetLowering (#142539)
Commit: c48c91a92e50e7e01ab9befa1ff7f3bc9662ecac
https://github.com/llvm/llvm-project/commit/c48c91a92e50e7e01ab9befa1ff7f3bc9662ecac
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M lldb/test/API/functionalities/thread/jump/TestThreadJump.py
Log Message:
-----------
[lldb][test] XFAIL TestThreadJump.py on older Clang versions
Failing on the macOS matrix bot for Clang-15 with the following error:
```
07:16:08 FAIL: LLDB (/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/clang_1501_build/bin/clang-arm64) :: test_jump_offset_dwarf (TestThreadJump.ThreadJumpTestCase)
07:16:08 UNSUPPORTED: LLDB (/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/clang_1501_build/bin/clang-arm64) :: test_jump_offset_dwo (TestThreadJump.ThreadJumpTestCase) (test case does not fall in any category of interest for this run)
07:16:08 Restore dir to: /Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/lldb-build/tools/lldb/test
07:16:08 ======================================================================
07:16:08 FAIL: test_jump_offset_dsym (TestThreadJump.ThreadJumpTestCase)
07:16:08 Test Thread Jump by negative or positive offset
07:16:08 ----------------------------------------------------------------------
07:16:08 Traceback (most recent call last):
07:16:08 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 1804, in test_method
07:16:08 return attrvalue(self)
07:16:08 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/test/API/functionalities/thread/jump/TestThreadJump.py", line 112, in test_jump_offset
07:16:08 self.expect(f"print {var_2}", substrs=[var_2_value])
07:16:08 File "/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/llvm-project/lldb/packages/Python/lldbsuite/test/lldbtest.py", line 2512, in expect
07:16:08 self.fail(log_msg)
07:16:08 AssertionError: Ran command:
07:16:08 "print var_2"
07:16:08
07:16:08 Got output:
07:16:08 (int) 20
07:16:08
07:16:08 Expecting sub string: "40" (was not found)
```
Commit: 05547fc3ec803b779beefeb52d21ef76cf00413f
https://github.com/llvm/llvm-project/commit/05547fc3ec803b779beefeb52d21ef76cf00413f
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M lldb/test/Shell/Expr/TestClangModulesDeclLookup.test
Log Message:
-----------
[lldb][test] XFAIL TestClangModulesDeclLookup on Linux
Failing on the Linux bots with:
```
+ /home/worker/2.0.1/lldb-x86_64-debian/build/bin/FileCheck /home/worker/2.0.1/lldb-x86_64-debian/llvm-project/lldb/test/Shell/Expr/TestClangModulesDeclLookup.test
/home/worker/2.0.1/lldb-x86_64-debian/llvm-project/lldb/test/Shell/Expr/TestClangModulesDeclLookup.test:56:15: error: CHECK-NEXT: expected string not found in input
^
<stdin>:38:26: note: scanning from here
(lldb) expression foo(50)
^
<stdin>:41:34: note: possible intended match here
(lldb) target modules dump ast --filter foo
^
```
Commit: 0107c9333cee3fb7af0dbffdce07422fe6b82bfa
https://github.com/llvm/llvm-project/commit/0107c9333cee3fb7af0dbffdce07422fe6b82bfa
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/AMDGPU/freeze-binary.ll
Log Message:
-----------
[DAG] canCreateUndefOrPoison โ mark fneg/fadd/fsub/fmul/fdiv/frem as not poison generating (#142345)
After revisiting the LLVM Language Reference Manual, it is confirmed
that
plain floating-point operations (`fneg`, `fadd`, `fsub`, `fmul`, `fdiv`,
and `frem`)
propagate poison but do not inherently create new poison values. Thus,
`SelectionDAG::canCreateUndefOrPoison` should return `false` for these
operations by default.
Poison generation in FP instructions occurs only when specific fast-math
flags (`nnan`, `ninf`, or the collective fast) are present, as these
flags
explicitly convert NaN or Inf results into poison.
References:
- [`fneg` instruction
documentation](https://llvm.org/docs/LangRef.html#fneg-instruction)
- [`fadd` instruction
documentation](https://llvm.org/docs/LangRef.html#fadd-instruction)
- [`fsub` instruction
documentation](https://llvm.org/docs/LangRef.html#fsub-instruction)
- [`fmul` instruction
documentation](https://llvm.org/docs/LangRef.html#fmul-instruction)
- [`fdiv` instruction
documentation](https://llvm.org/docs/LangRef.html#fdiv-instruction)
- [`frem` instruction
documentation](https://llvm.org/docs/LangRef.html#frem-instruction)
- [Fast-Math Flags
documentation](https://llvm.org/docs/LangRef.html#fast-math-flags)
Commit: 4b2cb118bc5825c309724d536053c6f9817e2eb9
https://github.com/llvm/llvm-project/commit/4b2cb118bc5825c309724d536053c6f9817e2eb9
Author: Morris Hafner <mmha at users.noreply.github.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
A clang/test/CIR/CodeGen/binop.c
M clang/test/CIR/CodeGen/binop.cpp
A clang/test/CIR/CodeGen/ternary.cpp
Log Message:
-----------
[CIR] Upstream lowering of conditional operators to TernaryOp (#138156)
This patch adds visitors for BinLAnd, BinLOr and
AbstractConditionalOperator. Note that this patch still lacks visitation
of OpaqueValueExpr which is needed for the GNU ?: operator.
---------
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: d9a5f7b118bfc9ab4b7325fae25073729d8e08be
https://github.com/llvm/llvm-project/commit/d9a5f7b118bfc9ab4b7325fae25073729d8e08be
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/IR/ConstantFold.cpp
M llvm/test/Transforms/InstSimplify/compare.ll
Log Message:
-----------
[ConstantFold] Constant fold icmp of boolean scalable vectors (#142528)
Closes https://github.com/llvm/llvm-project/issues/142447.
Commit: 6fe62e906c939797e128eeb4529cabbcbbe974b5
https://github.com/llvm/llvm-project/commit/6fe62e906c939797e128eeb4529cabbcbbe974b5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Use SelectionDAG::getExtractSubvector/getInsertSubvector in X86 extractSubVector/insertSubVector helpers. NFC.
Commit: 3ddc1e1cf397bd495f5aa42b04630561a9e6bf47
https://github.com/llvm/llvm-project/commit/3ddc1e1cf397bd495f5aa42b04630561a9e6bf47
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M lldb/test/Shell/Expr/TestClangModulesDeclLookup.test
Log Message:
-----------
[lldb][test] XFAIL TestClangModulesDeclLookup.test on win-remote-linux
Failing on the `lldb-remote-linux-win` buildbot with:
```
| (lldb) expression foo(50)
| ^
| <stdin>:54:34: note: possible intended match here
| (lldb) target modules dump ast --filter foo
| ^
|
| Input file: <stdin>
| Check file: C:\buildbot\as-builder-10\lldb-x-aarch64\llvm-project\lldb\test\Shell\Expr\TestClangModulesDeclLookup.test
|
| -dump-input=help explains the following input dump.
|
| Input was:
| <<<<<<
| .
| .
| .
| 46: 5 foo(10);
| 47: -> 6 return 0;
| 48: ^
| 49: 7 }
| 50: 8
| 51: (lldb) expression foo(50)
| next:57'0 X error: no match found
| 52: ^~~~~~
| next:57'0 ~~~~~~~~
| 53: error: 'foo' has unknown return type; cast the call to its declared return type
| next:57'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| 54: (lldb) target modules dump ast --filter foo
| next:57'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| next:57'1 ? possible intended match
| 55: Dumping clang ast for 4 modules.
| next:57'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| >>>>>>
`-----------------------------
error: command failed with exit status: 1
```
Fixes https://github.com/llvm/llvm-project/issues/142590
Commit: ec96c0c072ef3f78813c378949c00e1c07aa44e5
https://github.com/llvm/llvm-project/commit/ec96c0c072ef3f78813c378949c00e1c07aa44e5
Author: Donรกt Nagy <donat.nagy at ericsson.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
Log Message:
-----------
[analyzer] Fix tagging of PostAllocatorCall (#142132)
By design the `Location` data member of a `CheckerContext` is always a
`ProgramPoint` which is tagged with the currently active checker (note
that all checker classes are subclasses of `ProgramPointTag`). This
ensures that exploded nodes created by the checker are by default tagged
by the checker object unless the checker specifies some other tag (e.g.
a note tag) when it calls the `addTransition`-like method that creates
the node.
This was followed by all the `CheckerManager::runCheckersForXXX`
methods, except for `runCheckerForNewAllocator`, where the
implementation constructed the `PostAllocatorCall` program point which
was used to create the `CheckerContext` without passing
`checkFn.Checker` as the tag of the program point.
This commit elimintates this inconsistency and adds an assertion to the
constructor of `CheckerContext` to ensure that this invariant will be
upheld even if we e.g. add a new program point kind.
I strongly suspect that this is a non-functional change because program
point tags are a vestigial feature in the codebase that barely affect
anything -- but e.g. their presence affects the infamous node
reclamation process, so I'm not marking this as NFC.
Commit: c9968f4a04e055353f0667a16bcf34f1b3d855a5
https://github.com/llvm/llvm-project/commit/c9968f4a04e055353f0667a16bcf34f1b3d855a5
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaCXX/libstdcxx_common_type_hack.cpp
M clang/test/SemaCXX/libstdcxx_explicit_init_list_hack.cpp
M clang/test/SemaCXX/libstdcxx_pair_swap_hack.cpp
Log Message:
-----------
[Clang] Improve infrastructure for libstdc++ workarounds (Reland) (#142592)
Reland with debug traces to try to understand a bug that only happens on
one CI configuration
===
This introduces a way detect the libstdc++ version,
use that to enable workarounds.
The version is cached.
This should make it easier in the future to find and remove
these hacks.
I did not find the need for enabling a hack between or after
specific versions, so it's left as a future exercise.
We can extend this fature to other libraries as the need arise.
===
Commit: d36c6f91a9daf5746ddc5127ac65b9c6ff198135
https://github.com/llvm/llvm-project/commit/d36c6f91a9daf5746ddc5127ac65b9c6ff198135
Author: Javier Lopez-Gomez <javier.lopez.gomez at proton.me>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
A llvm/include/llvm/DebugInfo/CodeView/CodeViewLanguages.def
Log Message:
-----------
[DebugInfo][CodeView] Move codeview::SourceLanguage enumerators to CodeViewLanguages.def (NFC) (#141750)
This PR proposes moving out enumerators for `codeview::SourceLanguage`
to a separate CodeViewLanguages.def file, following the same guideline
that in other parts of LLVM, and in particular the `TypeRecordKind`
(enumerators in CodeViewTypes.def) or `SymbolRecordKind` (enumerators in
CodeViewSymbols.def).
This is a non-functional change, and has been labeled as such. This
change helps for https://github.com/llvm/llvm-project/pull/137223, and
possibly other future changes.
Commit: e97f42e931208878e3ec30052fb65b6a3cef7b4e
https://github.com/llvm/llvm-project/commit/e97f42e931208878e3ec30052fb65b6a3cef7b4e
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M offload/test/sanitizer/ptr_outside_alloc_1.c
M offload/test/sanitizer/ptr_outside_alloc_2.c
M offload/test/sanitizer/use_after_free_1.c
M offload/test/sanitizer/use_after_free_2.c
Log Message:
-----------
[OpenMP][Offload] Fix typo in error message (#142589)
It appears that the spelling was incorrect in those test cases. At least
on machines with ROCm version > 6.3.
I had no chance to test with ROCm version version < 6.2 and would be
interested in the result if someone has the chance.
Commit: c75acb6f8bce3cb41bf21ef9e491ff16ae18dde7
https://github.com/llvm/llvm-project/commit/c75acb6f8bce3cb41bf21ef9e491ff16ae18dde7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/lib/AST/ByteCode/Boolean.h
M clang/lib/AST/ByteCode/Floating.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Source.h
M clang/test/AST/ByteCode/fixed-point.cpp
Log Message:
-----------
[clang][bytecode] Remove some unused code (#142580)
Remove unused functions and add tests for fixed-point to bool casts,
which work.
Commit: 0555594195c8a39ea3469fb4ded211960fde385b
https://github.com/llvm/llvm-project/commit/0555594195c8a39ea3469fb4ded211960fde385b
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
A clang/test/DebugInfo/KeyInstructions/for.c
Log Message:
-----------
[KeyInstr][Clang] For stmt atom (#134646)
This patch is part of a stack that teaches Clang to generate Key Instructions
metadata for C and C++.
RFC:
https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
The feature is only functional in LLVM if LLVM is built with CMake flag
LLVM_EXPERIMENTAL_KEY_INSTRUCTIONs. Eventually that flag will be removed.
Commit: dedef408d759b50360ae8a7ef2ba13ba6931b4d8
https://github.com/llvm/llvm-project/commit/dedef408d759b50360ae8a7ef2ba13ba6931b4d8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/amdgpu-toolchain-opencl.cl
M clang/test/Driver/amdgpu-toolchain.c
Log Message:
-----------
Reapply "[AMDGPU] Use the AMDGPUToolChain when targeting C/C++ directly" (#125744)
Summary:
This reverts commit 740e6aeccdb2f8eeee549ba80b15ff3d5dd3392e.
After discussions it was determined that the behavior for IR inputs
needs to be maintained at least for now. In the future we should put a
deprecation notice on this behavior. This patch keeps the old behavior
for OpenCL and IR inputs, while others will be standalone. This is good
enough for standard compile flows.
Commit: 41a4b04a5d1fd9f82553d56ce5d5937e1c16d679
https://github.com/llvm/llvm-project/commit/41a4b04a5d1fd9f82553d56ce5d5937e1c16d679
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
A clang/test/DebugInfo/KeyInstructions/cast.c
A clang/test/DebugInfo/KeyInstructions/new.cpp
Log Message:
-----------
[NFC][KeyInstr][Clang] Add some additional tests (#134654)
[KeyInstr][Clang] For stmt atom (#134646)
This patch is part of a stack that teaches Clang to generate Key Instructions
metadata for C and C++.
RFC:
https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
The feature is only functional in LLVM if LLVM is built with CMake flag
LLVM_EXPERIMENTAL_KEY_INSTRUCTIONs. Eventually that flag will be removed.
Commit: 8e50e882a847a8fd51ee8ec22fea5df192b14c06
https://github.com/llvm/llvm-project/commit/8e50e882a847a8fd51ee8ec22fea5df192b14c06
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/test/DebugInfo/KeyInstructions/for.c
M clang/test/DebugInfo/KeyInstructions/switch.c
Log Message:
-----------
[KeyInstr][Clang] Break and Continue stmt atoms
[KeyInstr][Clang] For stmt atom (#134646)
This patch is part of a stack that teaches Clang to generate Key Instructions
metadata for C and C++.
RFC:
https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
The feature is only functional in LLVM if LLVM is built with CMake flag
LLVM_EXPERIMENTAL_KEY_INSTRUCTIONs. Eventually that flag will be removed.
Commit: 3a8b48862ad69cb07b53b6f386442b3bef4dae40
https://github.com/llvm/llvm-project/commit/3a8b48862ad69cb07b53b6f386442b3bef4dae40
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
A llvm/test/Transforms/LoopUnroll/peel-last-iteration-with-guards.ll
M llvm/test/Transforms/LoopUnroll/peel-last-iteration-with-variable-trip-count.ll
Log Message:
-----------
[LoopPeel] Add tests for peeling last iteration with loop guards.
Add additional test coverage for peeling the last iteration where
information from loop guards is needed.
Commit: 5520ab3d501284209dfaafaf6a3b381c3b0dcea9
https://github.com/llvm/llvm-project/commit/5520ab3d501284209dfaafaf6a3b381c3b0dcea9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Add ComputeAnyOfResult VPInstruction (NFC) (#141932)
Add a dedicated opcode for any-of reduction, similar to
https://github.com/llvm/llvm-project/pull/132689 and
https://github.com/llvm/llvm-project/pull/132690.
The patch also explictly adds the start value to not require
RecurrenceDescriptor during execute. It also allows freezing the start
value to make it poison-safe.
PR: https://github.com/llvm/llvm-project/pull/141932
Commit: 6716d4eaa8526f8c0bc04efebd7e98649b35ef98
https://github.com/llvm/llvm-project/commit/6716d4eaa8526f8c0bc04efebd7e98649b35ef98
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Prefer DenseMap::lookup over find (NFC) (#141809)
Apart from the stylistic improvement, lookup has the nice property of
returning a default-constructed object on failure-to-find, while find
returns the end iterator, which cannot be dereferenced.
Commit: b1703ad38d5bbdb5ede49fb06dc7d63582359b30
https://github.com/llvm/llvm-project/commit/b1703ad38d5bbdb5ede49fb06dc7d63582359b30
Author: Marcos Maronas <marcos.maronas at intel.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
M llvm/test/CodeGen/SPIRV/OpVariable_order.ll
M llvm/test/CodeGen/SPIRV/empty-logical.ll
M llvm/test/CodeGen/SPIRV/empty-module.ll
M llvm/test/CodeGen/SPIRV/global-var-name-align.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/AddUint64.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/acos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/all.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/any.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/atan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/atan2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/clamp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cosh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/countbits.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cross.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/degrees.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/distance.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_i8packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_u8packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/faceforward.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbitlow.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/floor.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmad.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/frac.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier_with_group_sync.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/length.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/lerp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/normalize.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/radians.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/round.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rsqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/saturate.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sinh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/step.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tanh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/trunc.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umin.ll
M llvm/test/CodeGen/SPIRV/inline/type.coop-matrix.ll
M llvm/test/CodeGen/SPIRV/inline/type.ll
M llvm/test/CodeGen/SPIRV/inline/type.undef.ll
M llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint.ll
Log Message:
-----------
[SPIRV] Change how to detect OpenCL/Vulkan Env and update tests accordingly. (#129689)
A new test added for spirv-friendly builtins for
SPV_KHR_bit_instructions unveiled that current mechanism to detect
whether SPIRV Backend is in OpenCL environment or Vulkan environment was
not good enough. This PR updates how to detect the environment and all
the tests accordingly.
*UPDATE*: the new approach is having a new member in `SPIRVSubtarget` to
represent the environment. It can be either OpenCL, Kernel or Unknown.
If the triple is explicit, we can directly set it at the creation of the
`SPIRVSubtarget`, otherwise we just leave it unknown until we find other
information that can help us set the environment. For now, the only
other information we use to set the environment is `hlsl.shader`
attribute at `SPIRV::ExecutionModel::ExecutionModel
getExecutionModel(const SPIRVSubtarget &STI, const Function &F)`. Going
forward we should consider also specific instructions that are
Kernel-exclusive or Shader-exclusive.
---------
Co-authored-by: marcos.maronas <mmaronas at smtp.igk.intel.com>
Commit: aac1f85393e74b643d08c948c3c2da156a231073
https://github.com/llvm/llvm-project/commit/aac1f85393e74b643d08c948c3c2da156a231073
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
A flang/include/flang/Semantics/openmp-dsa.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Semantics/CMakeLists.txt
A flang/lib/Semantics/openmp-dsa.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/common-block.f90
M flang/test/Semantics/OpenMP/copyprivate03.f90
M flang/test/Semantics/OpenMP/default-clause.f90
M flang/test/Semantics/OpenMP/do05-positivecase.f90
M flang/test/Semantics/OpenMP/do20.f90
M flang/test/Semantics/OpenMP/forall.f90
M flang/test/Semantics/OpenMP/implicit-dsa.f90
M flang/test/Semantics/OpenMP/reduction08.f90
M flang/test/Semantics/OpenMP/reduction09.f90
M flang/test/Semantics/OpenMP/reduction11.f90
M flang/test/Semantics/OpenMP/scan2.f90
M flang/test/Semantics/OpenMP/symbol01.f90
M flang/test/Semantics/OpenMP/symbol02.f90
M flang/test/Semantics/OpenMP/symbol03.f90
M flang/test/Semantics/OpenMP/symbol04.f90
M flang/test/Semantics/OpenMP/symbol05.f90
M flang/test/Semantics/OpenMP/symbol06.f90
M flang/test/Semantics/OpenMP/symbol07.f90
M flang/test/Semantics/OpenMP/symbol08.f90
M flang/test/Semantics/OpenMP/symbol09.f90
Log Message:
-----------
[flang][OpenMP] Explicitly set Shared DSA in symbols (#142154)
Before this change, OmpShared was not always set in shared symbols.
Instead, absence of private flags was interpreted as shared DSA.
The problem was that symbols with no flags, with only a host
association, could also mean "has same DSA as in the enclosing
context". Now shared symbols behave the same as private and can be
treated the same way.
Because of the host association symbols with no flags mentioned
above, it was also incorrect to simply test the flags of a given
symbol to find out if it was private or shared. The function
GetSymbolDSA() was added to fix this. It would be better to avoid
the need of these special symbols, but this would require changes
to how symbols are collected in lowering.
Besides that, some semantic checks need to know if a DSA clause
was used or not. To avoid confusing implicit symbols with DSA
clauses a new flag was added: OmpExplicit. It is now set for all
symbols with explicitly determined data-sharing attributes.
With the changes above, AddToContextObjectWithDSA() and the symbol
to DSA map could probably be removed and the DSA could be obtained
directly from the symbol, but this was not attempted.
Some debug messages were also added, with the "omp" DEBUG_TYPE, to
make it easier to debug the creation of implicit symbols and to
visualize all associations of a given symbol.
Fixes #130533
Fixes #140882
Commit: bb75f655b08d0758bd91650ec2fe1004673da462
https://github.com/llvm/llvm-project/commit/bb75f655b08d0758bd91650ec2fe1004673da462
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/lib/Linker/IRMover.cpp
M llvm/test/Linker/opaque.ll
M llvm/test/Linker/pr22807.ll
M llvm/test/Linker/type-unique-dst-types.ll
Log Message:
-----------
[IRMover] Don't consider opaque types isomorphic to other types (#138241)
The type mapping in IRMover currently has a decent amount of complexity
related to establishing isomorphism between opaque struct types and
non-opaque struct types. I believe that this is both largely useless at
this point (after some recent clarifications, essentially the only place
where opaque types can still appear are external gobals) and has never
been entirely correct in the first place (because it does this in part
purely based on name rather than use, which means that we effectively
end up assigning semantics to the type name, which is illegal).
As such, I'd like to remove this functionality entirely.
Commit: e29eb6637d6b8ee54f746a9c914304f83309c4ee
https://github.com/llvm/llvm-project/commit/e29eb6637d6b8ee54f746a9c914304f83309c4ee
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/PPExpressions.cpp
M clang/test/SemaCXX/libstdcxx_pair_swap_hack.cpp
Log Message:
-----------
[Clang] Slightly tweak the code to try to fix a potential codegen issue in #142592
Commit: d9df71045441e02d33cd01fad203862c7efd637e
https://github.com/llvm/llvm-project/commit/d9df71045441e02d33cd01fad203862c7efd637e
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParsePragma.cpp
A clang/test/Sema/Inputs/builtin-system-header.h
A clang/test/Sema/builtin-pragma-intrinsic-namespace.cpp
A clang/test/Sema/builtin-pragma-intrinsic.c
Log Message:
-----------
[clang][Sema] Fix and reapply 'Declare builtins used in #pragma intrinsic #138205' (#142019)
I had to revert https://github.com/llvm/llvm-project/pull/138205 in
https://github.com/llvm/llvm-project/pull/141994 because it broke the
Chrome build.
The problem came down to the following:
```c++
unsigned __int64 _umul128(unsigned __int64, unsigned __int64,
unsigned __int64 *);
namespace {}
#pragma intrinsic(_umul128)
void foo() {
unsigned __int64 carry;
unsigned __int64 low = _umul128(0, 0, &carry);
}
```
When processing the `#pragma intrinsic` line, we do a name lookup to see
if the builtin was previously declared. In this case the lookup fails
because the current namespace of the parser and sema is the above
namespace scope. The processing of the pragma happens as part of the
namespace close parsing. This is usually fine because most pragmas don't
care about scopes. However, that's not true for this and other MS
pragmas.
To fix this, we change the `#pragma intrinsic` processing to be the same
as other MS pragmas such as "optimize". Those are processed like a
declaration, and because of that we have the correct current scope, so
the lookup succeeds.
I added a test case that locks down the Chrome fix, as well as manually
tested the Chrome build and confirmed it passed.
Commit: 2e70da3fba14f9ff0b29f65fed174f075d94d9a4
https://github.com/llvm/llvm-project/commit/2e70da3fba14f9ff0b29f65fed174f075d94d9a4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Partially address string literal uniqueness (#142555)
This still leaves the case of the
constexpr auto b3 = name1() == name1();
test from cxx20.cpp broken.
Commit: aab79c41b2cc16d542072a5a2fad4ac8855ba9ff
https://github.com/llvm/llvm-project/commit/aab79c41b2cc16d542072a5a2fad4ac8855ba9ff
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M llvm/include/llvm/MC/MCDwarf.h
M llvm/lib/MC/MCDwarf.cpp
A llvm/test/DebugInfo/X86/DW_AT_LLVM_stmt_seq_sec_offset_empty_func.ll
Log Message:
-----------
[DebugInfo] Fix issue with debug line table offsets for empty functions (#142253)
This patch addresses an issue where an anonymous DWARF line table symbol
could be inadvertently defined multiple times, leading to an "symbol ''
is already defined" error during assembly or object file emission. This
issue happens for empty functions when
`-emit-func-debug-line-table-offsets` is enabled.
The root cause is the creation of the "end sequence" entry for a DWARF
line table. This entry was sometimes created by copying the last
existing line table entry. If this last entry was a special one (created
for the purpose of marking the position in the line table stream and
having an anonymous symbol attached), the copied end-sequence entry
would also incorrectly reference this same anonymous symbol.
Consequently, when the line table was finally emitted, the DWARF
emission logic would attempt to emit a label for this anonymous symbol
twice, triggering the redefinition error.
The fix ensures that when an end-sequence line table entry is created,
it does not inherit any special stream label from the entry it might
have been based on, thereby preventing the duplicate label emission.
Commit: dc297cbc9ad2a0a18b530708c39b13bd431bf237
https://github.com/llvm/llvm-project/commit/dc297cbc9ad2a0a18b530708c39b13bd431bf237
Author: Md Abdullah Shahneous Bari <98356296+mshahneo at users.noreply.github.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
Log Message:
-----------
[mlir][memref][spirv] Add conversion for memref.extract_aligned_pointer_as_index to SPIR-V (#86750)
Converts memref.extract_aligned_pointer_as_index to spirv.ConvertPtrToU.
Index conversion is done based on 'use-64bit-index' option.
Commit: 7797824297e17d4c02fbb1cb904c7919f21af47e
https://github.com/llvm/llvm-project/commit/7797824297e17d4c02fbb1cb904c7919f21af47e
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M mlir/include/mlir/Target/SPIRV/Deserialization.h
M mlir/lib/Target/SPIRV/Deserialization/Deserialization.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/TranslateRegistration.cpp
Log Message:
-----------
[mlir][spirv] Allow disabling control flow structurization (#140561)
Currently some control flow patterns cannot be structurized into
existing SPIR-V MLIR constructs, e.g., conditional early exits (break).
Since the support for early exit cannot be currently added
(https://github.com/llvm/llvm-project/pull/138688#pullrequestreview-2830791677)
this patch enables structurizer to be disabled to keep
the control flow unstructurized. By default, the control flow is
structurized.
Commit: 10024363dd04b08279c24e7948a2e0e8e2a57b6f
https://github.com/llvm/llvm-project/commit/10024363dd04b08279c24e7948a2e0e8e2a57b6f
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
A clang/test/DebugInfo/KeyInstructions/for-range.cpp
Log Message:
-----------
[KeyInstr][Clang] For range stmt atoms (#134647)
This patch is part of a stack that teaches Clang to generate Key Instructions
metadata for C and C++.
RFC:
https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
The feature is only functional in LLVM if LLVM is built with CMake flag
LLVM_EXPERIMENTAL_KEY_INSTRUCTIONs. Eventually that flag will be removed.
Commit: 038b1620467d48df7abd99b38165133c4f13dce6
https://github.com/llvm/llvm-project/commit/038b1620467d48df7abd99b38165133c4f13dce6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsBase.td
Log Message:
-----------
clang: Fix wrong C++ marker in tablegen file (#142534)
Commit: 407a3389900b3971d836c84abdb6c9ff8728aee8
https://github.com/llvm/llvm-project/commit/407a3389900b3971d836c84abdb6c9ff8728aee8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
github: Add lib/CodeGen to PR autolabeler (#138131)
Try to exclude SelectionDAG and GlobalISel since those have
their own labels
Commit: 986254ee0702cee4effccc2e818ea32455aae9a0
https://github.com/llvm/llvm-project/commit/986254ee0702cee4effccc2e818ea32455aae9a0
Author: A. Jiang <de34 at live.cn>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/test/SemaCXX/type-traits.cpp
Log Message:
-----------
[Clang] Implement LWG3819 for `__reference_meows_from_temporary` (#142554)
Also fix use cases for function reference binding
(`__reference_binds_to_temporary` is also affected despite being
deprecated).
Commit: 52cf598c78ce2652146a806717cb4eb7898f0214
https://github.com/llvm/llvm-project/commit/52cf598c78ce2652146a806717cb4eb7898f0214
Author: Tony Varghese <tonypalampalliyil at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-and.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-b.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-c.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-xor.ll
Log Message:
-----------
[NFC][PowerPC] Add testcases for locking down the xxeval instruction support for ternary operators (#141601)
NFC patch to add testcases for locking down the support of ternary
operators using the `xxsel` instructions. Currently ternary operators
are supoprted by emitting `xxsel` instructions instead of `xxeval`.
Co-authored-by: Tony Varghese <tony.varghese at ibm.com>
Commit: e6529dcedb3955706a8af5710591f1ac1bac26a3
https://github.com/llvm/llvm-project/commit/e6529dcedb3955706a8af5710591f1ac1bac26a3
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
R clang/test/DebugInfo/KeyInstructions/for-range.cpp
Log Message:
-----------
Revert "[KeyInstr][Clang] For range stmt atoms" (#142630)
Reverts llvm/llvm-project#134647
Bot failure:
https://lab.llvm.org/buildbot/#/builders/144/builds/26730/steps/6/logs/FAIL__Clang__terminate-statements_cpp
Commit: b78bc35d1629e9a07e0c6c677c5a1f477934b659
https://github.com/llvm/llvm-project/commit/b78bc35d1629e9a07e0c6c677c5a1f477934b659
Author: Callum Fare <callum at codeplay.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M offload/CMakeLists.txt
R offload/include/Shared/OffloadErrcodes.inc
R offload/include/Shared/OffloadError.h
M offload/liboffload/API/CMakeLists.txt
M offload/liboffload/CMakeLists.txt
R offload/liboffload/include/generated/OffloadAPI.h
R offload/liboffload/include/generated/OffloadEntryPoints.inc
R offload/liboffload/include/generated/OffloadFuncs.inc
R offload/liboffload/include/generated/OffloadImplFuncDecls.inc
R offload/liboffload/include/generated/OffloadPrint.hpp
M offload/liboffload/src/Helpers.hpp
M offload/plugins-nextgen/CMakeLists.txt
M offload/plugins-nextgen/common/CMakeLists.txt
A offload/plugins-nextgen/common/include/OffloadError.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/OffloadError.cpp
Log Message:
-----------
[Offload] Don't check in generated files (#141982)
Previously we decided to check in files that we generate with tablegen.
The justification at the time was that it helped reviewers unfamiliar
with `offload-tblgen` see the actual changes to the headers in PRs.
After trying it for a while, it's ended up causing some headaches and is
also not how tablegen is used elsewhere in LLVM.
This changes our use of tablegen to be more conventional. Where
possible, files are still clang-formatted, but this is no longer a hard
requirement. Because `OffloadErrcodes.inc` is shared with libomptarget
it now gets generated in a more appropriate place.
Commit: 6ca59aae8e13168467f743c749a36bd9c5074b41
https://github.com/llvm/llvm-project/commit/6ca59aae8e13168467f743c749a36bd9c5074b41
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/Headers/crash-instantiated-in-scope-cxx-modules6.cpp
Log Message:
-----------
[clang][modules] Fix lambda and its enclosing function are not loaded from same module. (#142467)
This is a follow-up fix to
https://github.com/llvm/llvm-project/pull/109167.
Previously, we stored a mapping between the enclosing function and the
lambda class declaration. When loading the enclosing function, we also
loaded the corresponding lambda class declaration. However, loading the
lambda class declaration does not guarantee that its call operator (a
`CXXMethodDecl`) is loaded as well.
As a result, if the lambda call operator is later loaded from a
different module, we can end up with a `DeclRefExpr` that refers to a
`VarDecl` from a different module โ leading to inconsistencies.
To fix this, we should ensure the lambda call operator itself is loaded.
Fixes #141582
Commit: 769c42f4a552a75c8c38870ddc1b50d2ea874e4e
https://github.com/llvm/llvm-project/commit/769c42f4a552a75c8c38870ddc1b50d2ea874e4e
Author: A. Jiang <de34 at live.cn>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M libcxx/include/__memory/compressed_pair.h
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.ctor/pointer_deleter.pass.cpp
Log Message:
-----------
[libc++] Fix padding calculation for function reference types (#142125)
#109028 caused `sizeof` to be sometimes applied to function reference
types, which makes a program ill-formed. This PR handles reference types
by specializations to prevent such bogus `sizeof` expression to be
instantiated.
Fixes #142118.
Commit: d0fb83531b07f608da064ed98e6213f32a5544e9
https://github.com/llvm/llvm-project/commit/d0fb83531b07f608da064ed98e6213f32a5544e9
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M libcxx/test/std/input.output/iostream.forward/iosfwd.pass.cpp
Log Message:
-----------
[libc++] Remove invalid char_traits instantiations from a test (#142016)
We had a test which created invalid char_traits instantiations for
non-character types. This patch removes them.
Commit: 0ee9f757751e678d5b9b94c349c53bf9e9398b53
https://github.com/llvm/llvm-project/commit/0ee9f757751e678d5b9b94c349c53bf9e9398b53
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-06-03 (Tue, 03 Jun 2025)
Changed paths:
M .github/new-prs-labeler.yml
M clang-tools-extra/docs/clang-tidy/checks/modernize/deprecated-headers.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/BuiltinsBase.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
M clang/lib/AST/ByteCode/Boolean.h
M clang/lib/AST/ByteCode/Floating.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Source.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/Targets/LoongArch.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Index/CommentToXML.cpp
M clang/lib/Index/FileIndexRecord.cpp
M clang/lib/Index/IndexingAction.cpp
M clang/lib/Index/USRGeneration.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/fixed-point.cpp
A clang/test/CIR/CodeGen/binop.c
M clang/test/CIR/CodeGen/binop.cpp
A clang/test/CIR/CodeGen/ternary.cpp
A clang/test/CodeGen/LoongArch/__fp16-convert.c
M clang/test/CodeGen/LoongArch/abi-lp64d.c
A clang/test/CodeGen/LoongArch/targetattr.c
A clang/test/DebugInfo/KeyInstructions/cast.c
A clang/test/DebugInfo/KeyInstructions/coerced-packed.c
A clang/test/DebugInfo/KeyInstructions/coerced-ptr.c
A clang/test/DebugInfo/KeyInstructions/coerced-through-memory.c
A clang/test/DebugInfo/KeyInstructions/coerced.c
A clang/test/DebugInfo/KeyInstructions/for.c
A clang/test/DebugInfo/KeyInstructions/new.cpp
M clang/test/DebugInfo/KeyInstructions/switch.c
M clang/test/Driver/amdgpu-toolchain-opencl.cl
M clang/test/Driver/amdgpu-toolchain.c
A clang/test/Headers/crash-instantiated-in-scope-cxx-modules6.cpp
A clang/test/Sema/Inputs/builtin-system-header.h
A clang/test/Sema/attr-target-loongarch.c
A clang/test/Sema/builtin-pragma-intrinsic-namespace.cpp
A clang/test/Sema/builtin-pragma-intrinsic.c
M clang/test/SemaCXX/type-traits.cpp
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
R compiler-rt/lib/builtins/aarch64/sme-libc-mem-routines.S
A compiler-rt/lib/builtins/aarch64/sme-libc-memcpy-memmove.c
A compiler-rt/lib/builtins/aarch64/sme-libc-memset-memchr.c
A compiler-rt/lib/builtins/aarch64/sme-libc-opt-memcpy-memmove.S
A compiler-rt/lib/builtins/aarch64/sme-libc-opt-memset-memchr.S
R compiler-rt/lib/builtins/aarch64/sme-libc-routines.c
A flang/include/flang/Semantics/openmp-dsa.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Semantics/CMakeLists.txt
A flang/lib/Semantics/openmp-dsa.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Lower/namelist.f90
M flang/test/Semantics/OpenMP/common-block.f90
M flang/test/Semantics/OpenMP/copyprivate03.f90
M flang/test/Semantics/OpenMP/default-clause.f90
M flang/test/Semantics/OpenMP/do05-positivecase.f90
M flang/test/Semantics/OpenMP/do20.f90
M flang/test/Semantics/OpenMP/forall.f90
M flang/test/Semantics/OpenMP/implicit-dsa.f90
M flang/test/Semantics/OpenMP/reduction08.f90
M flang/test/Semantics/OpenMP/reduction09.f90
M flang/test/Semantics/OpenMP/reduction11.f90
M flang/test/Semantics/OpenMP/scan2.f90
M flang/test/Semantics/OpenMP/symbol01.f90
M flang/test/Semantics/OpenMP/symbol02.f90
M flang/test/Semantics/OpenMP/symbol03.f90
M flang/test/Semantics/OpenMP/symbol04.f90
M flang/test/Semantics/OpenMP/symbol05.f90
M flang/test/Semantics/OpenMP/symbol06.f90
M flang/test/Semantics/OpenMP/symbol07.f90
M flang/test/Semantics/OpenMP/symbol08.f90
M flang/test/Semantics/OpenMP/symbol09.f90
M libcxx/include/__memory/compressed_pair.h
M libcxx/test/std/input.output/iostream.forward/iosfwd.pass.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.ctor/pointer_deleter.pass.cpp
M lldb/test/API/functionalities/thread/jump/TestThreadJump.py
M lldb/test/Shell/Commands/command-image-dump-ast.test
A lldb/test/Shell/Expr/TestClangModulesDeclLookup.test
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
A llvm/include/llvm/DebugInfo/CodeView/CodeViewLanguages.def
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/BasicBlockPathCloning.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/IR/ConstantFold.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/ARM/ARMBranchTargets.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/CodeGen/AArch64/arm64-neon-v8.1a.ll
A llvm/test/CodeGen/AArch64/callbr-asm-label-bti.ll
M llvm/test/CodeGen/AArch64/callbr-asm-label.ll
M llvm/test/CodeGen/AArch64/callbr-asm-outputs-indirect-isel.ll
A llvm/test/CodeGen/AArch64/fuse-addr-mode.mir
M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-no-agprs-violations.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-elf.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
A llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
A llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-large.ll
A llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-leaf.ll
A llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-use-inactive.ll
A llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
M llvm/test/CodeGen/AMDGPU/multi-call-resource-usage-mcexpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/register-count-comments.ll
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/unnamed-function-resource-info.ll
M llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
A llvm/test/CodeGen/AMDGPU/vgpr-count-compute.ll
A llvm/test/CodeGen/AMDGPU/vgpr-count-graphics.ll
A llvm/test/CodeGen/LoongArch/calling-conv-half.ll
M llvm/test/CodeGen/LoongArch/fp16-promote.ll
A llvm/test/CodeGen/LoongArch/issue97975.ll
A llvm/test/CodeGen/LoongArch/issue97981.ll
M llvm/test/CodeGen/PowerPC/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-and.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-b.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-c.ll
A llvm/test/CodeGen/PowerPC/xxeval-vselect-x-xor.ll
M llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
M llvm/test/CodeGen/RISCV/rv32xandesperf.ll
M llvm/test/CodeGen/RISCV/rv64xandesperf.ll
M llvm/test/CodeGen/SPIRV/OpVariable_order.ll
M llvm/test/CodeGen/SPIRV/empty-logical.ll
M llvm/test/CodeGen/SPIRV/empty-module.ll
M llvm/test/CodeGen/SPIRV/global-var-name-align.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/AddUint64.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/acos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/all.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/any.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/atan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/atan2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ceil.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/clamp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cos.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cosh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/countbits.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cross.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/degrees.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/distance.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_i8packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_u8packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/faceforward.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbithigh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/firstbitlow.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/floor.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmad.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/fmin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/frac.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier_with_group_sync.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/length.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/lerp.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log2.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/normalize.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/radians.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reflect.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/round.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/rsqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/saturate.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sinh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/smin.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sqrt.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/step.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tan.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tanh.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/trunc.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umax.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/umin.ll
M llvm/test/CodeGen/SPIRV/inline/type.coop-matrix.ll
M llvm/test/CodeGen/SPIRV/inline/type.ll
M llvm/test/CodeGen/SPIRV/inline/type.undef.ll
M llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/basic-block-sections-cloning-invalid.ll
M llvm/test/CodeGen/X86/callbr-asm-blockplacement.ll
M llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
M llvm/test/CodeGen/X86/callbr-asm-destinations.ll
M llvm/test/CodeGen/X86/callbr-asm-label-addr.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs-pred-succ.ll
M llvm/test/CodeGen/X86/callbr-asm-outputs.ll
M llvm/test/CodeGen/X86/callbr-asm-phi-placement.ll
M llvm/test/CodeGen/X86/callbr-asm-sink.ll
M llvm/test/CodeGen/X86/callbr-asm.ll
M llvm/test/CodeGen/X86/fminimum-fmaximum-i686.ll
M llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
M llvm/test/CodeGen/X86/fp128-libcalls.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/shrinkwrap-callbr.ll
M llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
M llvm/test/CodeGen/X86/vector-interleave.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
A llvm/test/DebugInfo/X86/DW_AT_LLVM_stmt_seq_sec_offset_empty_func.ll
M llvm/test/Linker/opaque.ll
M llvm/test/Linker/pr22807.ll
M llvm/test/Linker/type-unique-dst-types.ll
M llvm/test/Transforms/InstSimplify/compare.ll
A llvm/test/Transforms/LoopUnroll/peel-last-iteration-with-guards.ll
M llvm/test/Transforms/LoopUnroll/peel-last-iteration-with-variable-trip-count.ll
M llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
M llvm/utils/release/bump-version.py
M mlir/include/mlir/Dialect/ArmNeon/CMakeLists.txt
A mlir/include/mlir/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.h
A mlir/include/mlir/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.td
A mlir/include/mlir/Dialect/ArmNeon/TransformOps/CMakeLists.txt
M mlir/include/mlir/IR/SymbolTable.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/include/mlir/Target/SPIRV/Deserialization.h
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Dialect/ArmNeon/CMakeLists.txt
A mlir/lib/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.cpp
A mlir/lib/Dialect/ArmNeon/TransformOps/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserialization.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/TranslateRegistration.cpp
M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
M mlir/test/Dialect/ArmNeon/lower-to-arm-neon.mlir
R mlir/test/lib/Dialect/ArmNeon/CMakeLists.txt
R mlir/test/lib/Dialect/ArmNeon/TestLowerToArmNeon.cpp
M mlir/test/lib/Dialect/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
M offload/CMakeLists.txt
R offload/include/Shared/OffloadErrcodes.inc
R offload/include/Shared/OffloadError.h
M offload/liboffload/API/CMakeLists.txt
M offload/liboffload/CMakeLists.txt
R offload/liboffload/include/generated/OffloadAPI.h
R offload/liboffload/include/generated/OffloadEntryPoints.inc
R offload/liboffload/include/generated/OffloadFuncs.inc
R offload/liboffload/include/generated/OffloadImplFuncDecls.inc
R offload/liboffload/include/generated/OffloadPrint.hpp
M offload/liboffload/src/Helpers.hpp
M offload/plugins-nextgen/CMakeLists.txt
M offload/plugins-nextgen/common/CMakeLists.txt
A offload/plugins-nextgen/common/include/OffloadError.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/OffloadError.cpp
M offload/test/sanitizer/ptr_outside_alloc_1.c
M offload/test/sanitizer/ptr_outside_alloc_2.c
M offload/test/sanitizer/use_after_free_1.c
M offload/test/sanitizer/use_after_free_2.c
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[๐๐ฝ๐ฟ] changes introduced through rebase
Created using spr 1.3.6
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/4b5dc19b3597...0ee9f757751e
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list