[all-commits] [llvm/llvm-project] f90cfb: [RISCV] Select signed bitfield extracts for XAndes...

[Jim Lin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f90cfb1350053418c004774968bad0b76c549e48
      https://github.com/llvm/llvm-project/commit/f90cfb1350053418c004774968bad0b76c549e48
  Author: Jim Lin <jim at andestech.com>
  Date:   2025-06-03 (Tue, 03 Jun 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/test/CodeGen/RISCV/rv32xandesperf.ll
    M llvm/test/CodeGen/RISCV/rv64xandesperf.ll

  Log Message:
  -----------
  [RISCV] Select signed bitfield extracts for XAndesPerf (#142303)

The XAndesPerf extension includes signed bitfield extraction
instruction `NDS.BFOS`, which can extract the bits from LSB to MSB,
places them starting at bit 0, and sign-extends the result.

The testcase includes the two patterns that can be selected as
signed bitfield extracts: `ashr+shl` and `ashr+sext_inreg`



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