[all-commits] [llvm/llvm-project] 458307: [compiler-rt][RISC-V] ILP32E/LP64E Save/Restore Gr...

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 458307694ebd0c9d58f17f18d7bf09de88608efe
      https://github.com/llvm/llvm-project/commit/458307694ebd0c9d58f17f18d7bf09de88608efe
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2025-06-02 (Mon, 02 Jun 2025)

  Changed paths:
    M compiler-rt/lib/builtins/riscv/restore.S
    M compiler-rt/lib/builtins/riscv/save.S

  Log Message:
  -----------
  [compiler-rt][RISC-V] ILP32E/LP64E Save/Restore Grouping (#95398)

This changes the save/restore procedures to save/restore registers one
by one - to match the stack alignment for the ILP32E/LP64E ABIs, rather
than the larger batches of the conventional ABIs. The implementations of
the save routines are not tail-shared, to reduce the number of
instructions. I think this also helps code size but I need to check this
again.

I would expect (but haven't measured) that the majority of functions
compiled for the ILP32E/LP64E ABIs will in fact use both callee-saved
registers, and therefore there are still savings to be had, but I think
those can come later, with more data (especially if those changes are
just to the instruction sequences we use to save the registers, rather
than the number and alignment of how this is done).

This is a potential break for all of the ILP32E/LP64E ABI - we may
instead have to teach the compiler to emit the CFI information correctly
for the grouping we already have implemented (because that grouping
matches GCC). It depends on how intentional we think the grouping is in
the original ILP32E/LP64E save/restore implementation was, and whether
we think we can fix that now.



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