[all-commits] [llvm/llvm-project] d9a470: [MLIR] Fix incorrect slice contiguity inference in...

Momchil Velikov via All-commits all-commits at lists.llvm.org
Mon Jun 2 09:11:02 PDT 2025


  Branch: refs/heads/users/momchil-velikov/memref-contig-slice
  Home:   https://github.com/llvm/llvm-project
  Commit: d9a470e098553dbac74e81f98e0077718f6d9ed1
      https://github.com/llvm/llvm-project/commit/d9a470e098553dbac74e81f98e0077718f6d9ed1
  Author: Momchil Velikov <momchil.velikov at arm.com>
  Date:   2025-06-02 (Mon, 02 Jun 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/Utils/IndexingUtils.h
    M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
    M mlir/lib/Dialect/Utils/IndexingUtils.cpp
    M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
    M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
    M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir

  Log Message:
  -----------
  [MLIR] Fix incorrect slice contiguity inference in `vector::isContiguousSlice`

Previously, slices were sometimes marked as non-contiguous when
they were actually contiguous. This occurred when the vector type had
leading unit dimensions, e.g., `vector<1x1x...x1xd0xd1x...xdn-1xT>``.
In such cases, only the trailing n dimensions of the memref need to be
contiguous, not the entire vector rank.

This affects how `FlattenContiguousRowMajorTransfer{Read,Write}Pattern`
flattens `transfer_read` and `transfer_write`` ops. The pattern used
to collapse a number of dimensions equal the vector rank, which
may be is incorrect when leading dimensions are unit-sized.

This patch fixes the issue by collapsing only as many trailing memref
dimensions as are actually contiguous.



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