[all-commits] [llvm/llvm-project] b5cf03: [AArch64][SME] Fix accessing the emergency spill s...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b5cf03033251a642b184b2e0ea6bdac171c17702
      https://github.com/llvm/llvm-project/commit/b5cf03033251a642b184b2e0ea6bdac171c17702
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-06-02 (Mon, 02 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
    A llvm/test/CodeGen/AArch64/framelayout-scavengingslot-stack-hazard.mir
    M llvm/test/CodeGen/AArch64/stack-hazard.ll

  Log Message:
  -----------
  [AArch64][SME] Fix accessing the emergency spill slot with hazard padding (#142190)

This patch fixes an issue where when hazard padding was enabled locals,
including the emergency spill slot, could not be directly addressed.

Generally, this is fine, we can materialize the constant offset in a
scratch register, but if there's no register free we need to spill, and
if we can't even reach the emergency spill slot then we fail to compile.

This patch fixes this by ensuring that if a function has variable-sized
objects and is likely to have hazard padding we enable the base pointer.
Then if we know a function has hazard padding, place the emergency spill
slot next to the BP/SP, to ensure it can be directly accessed without
stepping over any hazard padding.



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