[all-commits] [llvm/llvm-project] a920da: AMDGPU: Handle vectors in copysign sign type combine

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu/handle-vectors-fcopysign-combine-sign
  Home:   https://github.com/llvm/llvm-project
  Commit: a920da71a063afbc9b6519e1fd81e78129a35b72
      https://github.com/llvm/llvm-project/commit/a920da71a063afbc9b6519e1fd81e78129a35b72
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-05-30 (Fri, 30 May 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll

  Log Message:
  -----------
  AMDGPU: Handle vectors in copysign sign type combine

This avoids some ugly codegen on pre-16-bit instruction targets now
from annoying f16 legalization effects. This also avoids regressions
on newer targets in a future patch.



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