[all-commits] [llvm/llvm-project] 777163: [RISCV][test] Improve test robustness. [NFCI] (#14...

[Francesco Petrogalli via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 777163ca99edd23deb5bedfd8b941cb46c96500d
      https://github.com/llvm/llvm-project/commit/777163ca99edd23deb5bedfd8b941cb46c96500d
  Author: Francesco Petrogalli <francesco.petrogalli at apple.com>
  Date:   2025-05-27 (Tue, 27 May 2025)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-zve64f.mir

  Log Message:
  -----------
  [RISCV][test] Improve test robustness. [NFCI] (#141268)

In a0b6cfd9752742ff599364545ca9996cee67ef9b the literal in the test
needed to be updated because of the changes in the enums generated by
tablegen.

We can achieve the same "reguse" constraint with a PseudoRET
instruction.



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