[all-commits] [llvm/llvm-project] 841c8d: [LV] Add tests for more interleave group factors o...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 841c8d48a62dc62bf8a23883225fd88d6848e45c
      https://github.com/llvm/llvm-project/commit/841c8d48a62dc62bf8a23883225fd88d6848e45c
  Author: Luke Lau <luke at igalia.com>
  Date:   2025-05-26 (Mon, 26 May 2025)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll

  Log Message:
  -----------
  [LV] Add tests for more interleave group factors on AArch64 and RISC-V. NFC

The plan is to eventually add support for scalably vectorizing these for
non-power-of-2 factors, see https://github.com/llvm/llvm-project/pull/139893

Simultaneously, we need to add a test to make sure we don't generate
@llvm.vector.[de]interleave3 for AArch64 if we can't lower it (yet)



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