[all-commits] [llvm/llvm-project] 38cec0: AMDGPU/GlobalISel: add RegBankLegalize rules for b...

[Petar Avramovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 38cec041d377cf57d17bf9228e946d5bbe317d81
      https://github.com/llvm/llvm-project/commit/38cec041d377cf57d17bf9228e946d5bbe317d81
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2025-05-26 (Mon, 26 May 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sbfx.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ubfx.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sbfx.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ubfx.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract (#132381)

Divergent S32 instruction is available, for S64 need to lower to S32.
Uniform instructions available for both S32 and S64 but need to pack
bitfield offset and size of bitfield into S32. Uniform instruction is
straight up selected since there is no available isel pattern.



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