[all-commits] [llvm/llvm-project] bbca78: [PowerPC] vector shift word/double by element size...

[RolandF77 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bbca78fbcbc42c4e0c2618077dbbc01d43aa5358
      https://github.com/llvm/llvm-project/commit/bbca78fbcbc42c4e0c2618077dbbc01d43aa5358
  Author: RolandF77 <55763885+RolandF77 at users.noreply.github.com>
  Date:   2025-05-23 (Fri, 23 May 2025)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.h
    M llvm/test/CodeGen/PowerPC/mul-const-vector.ll
    M llvm/test/CodeGen/PowerPC/pr47891.ll
    M llvm/test/CodeGen/PowerPC/signbit-shift.ll
    M llvm/test/CodeGen/PowerPC/vselect-constants.ll

  Log Message:
  -----------
  [PowerPC] vector shift word/double by element size - 1 use all ones (#139794)

Vector shift word or double requires a shift amount vector of 31 or 63
which is too big for splat immediate and requires a multi-instruction
sequence. However the PPC instructions only use 5 or 6 bits of the shift
amount vector elements so an all ones mask, which we can generate
efficiently, works.



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