[all-commits] [llvm/llvm-project] 9b4de7: [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq ...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9b4de7d8850d0e66cd49224cef8de17a41e1746a
      https://github.com/llvm/llvm-project/commit/9b4de7d8850d0e66cd49224cef8de17a41e1746a
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-05-22 (Thu, 22 May 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/test/CodeGen/RISCV/rvv/zvqdotq-sdnode.ll

  Log Message:
  -----------
  [RISCV] Lower PARTIAL_REDUCE_[S/U]MLA via zvqdotq (#140950)

The semantics of the PARTIAL_REDUCE_SMLA with i32 result element, and i8
sources corresponds to vqdot. Analogously PARTIAL_REDUCE_UMLA
corresponds to vqdotu. There is currently no vqdotsu equivalent.

This patch is a starting place. We can extend this quite a bit more, and
I plan to take a look at the fixed vector lowering, the TTI hook to
drive loop vectorizer, and to try to integrate the reduction based
lowering I'd added for zvqdotq into this flow.



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