[all-commits] [llvm/llvm-project] 1fdf02: [LLVM][CodeGen] Add convenience accessors for Mach...

[Rahul Joshi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1fdf02ad5a4ca155017eea22688365a20aab077c
      https://github.com/llvm/llvm-project/commit/1fdf02ad5a4ca155017eea22688365a20aab077c
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2025-05-22 (Thu, 22 May 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/BranchFoldingPass.h
    M llvm/include/llvm/CodeGen/ExecutionDomainFix.h
    M llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
    M llvm/include/llvm/CodeGen/GlobalISel/Legalizer.h
    M llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
    M llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
    M llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
    M llvm/include/llvm/CodeGen/IndirectThunks.h
    M llvm/include/llvm/CodeGen/LiveDebugVariables.h
    M llvm/include/llvm/CodeGen/MachineCSE.h
    M llvm/include/llvm/CodeGen/MachineCopyPropagation.h
    M llvm/include/llvm/CodeGen/MachineFunction.h
    M llvm/include/llvm/CodeGen/MachineLateInstrsCleanup.h
    M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
    M llvm/include/llvm/CodeGen/PatchableFunction.h
    M llvm/include/llvm/CodeGen/PostRASchedulerList.h
    M llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
    M llvm/include/llvm/CodeGen/RegAllocFast.h
    M llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
    M llvm/include/llvm/CodeGen/RegisterCoalescerPass.h
    M llvm/include/llvm/CodeGen/RemoveLoadsIntoFakeUses.h
    M llvm/include/llvm/CodeGen/ShrinkWrap.h
    M llvm/include/llvm/CodeGen/TailDuplication.h
    M llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
    M llvm/lib/CodeGen/BranchFolding.cpp
    M llvm/lib/CodeGen/BreakFalseDeps.cpp
    M llvm/lib/CodeGen/FuncletLayout.cpp
    M llvm/lib/CodeGen/GlobalISel/Combiner.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
    M llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
    M llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
    M llvm/lib/CodeGen/GlobalISel/Localizer.cpp
    M llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
    M llvm/lib/CodeGen/GlobalISel/Utils.cpp
    M llvm/lib/CodeGen/IfConversion.cpp
    M llvm/lib/CodeGen/ImplicitNullChecks.cpp
    M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
    M llvm/lib/CodeGen/MIRPrinter.cpp
    M llvm/lib/CodeGen/MachineBasicBlock.cpp
    M llvm/lib/CodeGen/MachineCSE.cpp
    M llvm/lib/CodeGen/MachineCopyPropagation.cpp
    M llvm/lib/CodeGen/MachineFunction.cpp
    M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
    M llvm/lib/CodeGen/MachineOutliner.cpp
    M llvm/lib/CodeGen/MachineSink.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/lib/CodeGen/PHIElimination.cpp
    M llvm/lib/CodeGen/PatchableFunction.cpp
    M llvm/lib/CodeGen/PeepholeOptimizer.cpp
    M llvm/lib/CodeGen/PostRASchedulerList.cpp
    M llvm/lib/CodeGen/ProcessImplicitDefs.cpp
    M llvm/lib/CodeGen/PrologEpilogInserter.cpp
    M llvm/lib/CodeGen/RegAllocBase.cpp
    M llvm/lib/CodeGen/RegAllocBasic.cpp
    M llvm/lib/CodeGen/RegAllocFast.cpp
    M llvm/lib/CodeGen/RegAllocGreedy.cpp
    M llvm/lib/CodeGen/RegAllocPBQP.cpp
    M llvm/lib/CodeGen/RegisterCoalescer.cpp
    M llvm/lib/CodeGen/RegisterScavenging.cpp
    M llvm/lib/CodeGen/RemoveLoadsIntoFakeUses.cpp
    M llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    M llvm/lib/CodeGen/ShrinkWrap.cpp
    M llvm/lib/CodeGen/StackMapLivenessAnalysis.cpp
    M llvm/lib/CodeGen/TailDuplication.cpp
    M llvm/lib/CodeGen/TargetInstrInfo.cpp
    M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
    M llvm/lib/CodeGen/VirtRegMap.cpp

  Log Message:
  -----------
  [LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (#140002)

Add per-property has<Prop>/set<Prop>/reset<Prop> functions to
MachineFunctionProperties.



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