[all-commits] [llvm/llvm-project] f72a8e: [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseud...

[Sudharsan Veeravalli via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f72a8ee489368dd20c1392b122b0736aa7c8ada1
      https://github.com/llvm/llvm-project/commit/f72a8ee489368dd20c1392b122b0736aa7c8ada1
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-05-22 (Thu, 22 May 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
    M llvm/test/CodeGen/RISCV/xqcibi.ll

  Log Message:
  -----------
  [RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (#140698)

Not adding them was leading to a crash when trying to expand these
pseudo instructions.

I've also fixed the register class types for the Xqcibi instructions in
these pseudo instructions which was incorrect and was exposed by the
machine verifier while running the test case added in this patch.

Fixes #140697



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